Abstract: An organic light emitting diode and a method for manufacturing the same. The organic light emitting diode includes an anodic conductive layer, an organic EL layer, and a cathodic conductive layer formed from Ag or an alloy of Ag, or the like, sequentially laminated on a substrate, such that a two-dimensional lattice structure is provided on a surface of the cathodic conductive layer on an organic EL layer side, an extraction wavelength and a distance between centers of concave portions or convex portions in the two-dimensional lattice structure are within a region surrounded by specific coordinates in a graph illustrating a relationship between the light extraction wavelength and the distance, and the depth of the concave portions or a height of the convex portions is 12 nm to 180 nm.

Abstract: A method of manufacturing an integrated circuit is provided. According to the method, a layered fin including a plurality of sacrificial layers and semiconductor layers wherein two adjacent semiconductor layers are separated by the sacrificial layer is provided on a semiconductor substrate. A gate over the layered fin and a spacer surrounding a sidewall of the gate are then formed. The sacrificial layers are subsequently removed to provide a structure in which two adjacent semiconductor layers are separated by a gap. The method further includes forming an insulator in the gap and forming source and drain regions located on the layered fin. The insulator includes a high-K dielectric material surrounded by a low-K dielectric material, both of which are in contact with the two adjacent semiconductor layers.

Abstract: A method of assembling a semi-hermetic semiconductor package includes bonding a semiconductor die having bond pads to a top side of a base region of a package substrate having vertical side walls that are hollow which define an inner open volume (gap) having an adhesive or thermoplastic material therein. There are a plurality of metal terminals providing top terminal contacts on the top side of the base region and bottom terminal contacts on a bottom side or below the base region. The bond pads are coupled to the top terminal contacts. A lid is placed which provides a top for the semiconductor package, where the lid extends to vertically oriented end protrusions so that the protrusions are positioned within the adhesive or thermoplastic material to secure the protrusions within the adhesive or thermoplastic material to provide a seal for the semiconductor package.

Abstract: An embodiment of the invention provides a method for forming a chip package which includes: providing a substrate having a first surface and a second surface, wherein at least two conducting pads are disposed on the first surface of the substrate; partially removing the substrate from the second surface of the substrate to form at least two holes extending towards the first surface, wherein the holes correspondingly and respectively align with one of the conducting pads; after the holes are formed, partially removing the substrate from the second substrate to form at least a recess extending towards the first surface, wherein the recess overlaps with the holes; forming an insulating layer on a sidewall and a bottom of the trench and on sidewalls of the holes; and forming a conducting layer on the insulating layer, wherein the conducting layer electrically contacts with one of the conducting pads.

Abstract: Light emitting diodes (“LEDs”) with N-polarity and associated methods of manufacturing are disclosed herein. In one embodiment, a method for forming a light emitting diode on a substrate having a substrate material includes forming a nitrogen-rich environment at least proximate a surface of the substrate without forming a nitrodizing product of the substrate material on the surface of the substrate. The method also includes forming an LED structure with a nitrogen polarity on the surface of the substrate with a nitrogen-rich environment.

Abstract: The present invention discloses a thin film transistor, a method of manufacturing the thin film transistor, a display substrate and a display apparatus.

Abstract: An interposer of a package system includes a first probe pad disposed adjacent to a first surface of the interposer. A second probe pad is disposed adjacent to the first surface of the interposer. A first bump of a first dimension is disposed adjacent to the first surface of the interposer. The first bump is electrically coupled with the first probe pad. A second bump of the first dimension is disposed adjacent to the first surface of the interposer. The second bump is electrically coupled with the second probe pad. The second bump is electrically coupled with the first bump through a redistribution layer (RDL) of the interposer.

Abstract: A thin film transistor (TFT) device is provided. The TFT device includes a first conductive layer including a gate electrode and a connection pad. The TFT device further includes a first dielectric layer covering the gate electrode, and a semiconductor layer disposed on the dielectric layer and overlapping the gate electrode. The TFT device further includes a second dielectric layer disposed on the semiconductor layer and the first dielectric layer so as to expose first and second portions of the semiconductor layer and the connection pad. The TFT device further includes a second conductive layer which includes a source electrode portion covering the first portion of the semiconductor layer; a pixel electrode portion extending to the source electrode portion; a drain electrode portion covering the second portion of the semiconductor layer; and an interconnection portion disposed on the connection pad and extending to the drain electrode portion.

Abstract: A semiconductor device includes a substrate having a fin structure, the fin structure having a height in a substantially perpendicular direction to the substrate, and having consecutive upper and lower portions along the height, the lower portion being closer to the substrate than the upper portion. The semiconductor device further includes a gate structure wrapping around a portion of the fin structure, the gate structure having a gate dielectric layer disposed around the fin structure, and a gate electrode layer disposed over the gate dielectric layer. The gate electrode layer includes a first gate metal layer formed along both sides of the lower portion of the fin structure, the first gate metal layer having a first workfunction, and a second gate metal layer formed disposed over the first gate metal layer and wrapped around the upper portion of the fin structure, the second gate metal layer having a second workfunction. The first and the second workfunctions are different.

Abstract: According to example embodiments, an electronic device includes channel layer including a graphene layer electrically contacting a quantum dot layer including a plurality of quantum dots, a first electrode and a second electrode electrically connected to the channel layer, respectively, and a gate electrode configured to control an electric current between the first electrode and the second electrode via the channel layer. A gate insulating layer may be between the gate electrode and the channel layer.

Abstract: System for wafer-level phosphor deposition. A method for phosphor deposition on a semiconductor wafer that has a plurality of LED dies includes the operations of covering the semiconductor wafer with a selected thickness of photo resist material, removing portions of the photo resist material to expose portions of the semiconductor wafer so that electrical contacts associated with the plurality of LED dies remain unexposed, and depositing phosphor on the exposed portions of the semiconductor wafer.

Abstract: A spectroscopic sensor has plural angle limiting filters that limit incident angles of incident lights, plural light band-pass filters that transmit specific wavelengths, and plural photodiodes to which corresponding transmitted lights are input. The spectroscopic sensor is a semiconductor device in which the angle limiting filters, the light band-pass filters, and the photodiodes are integrated, and, assuming that the surface on which impurity regions for the photodiodes are formed is a front surface of a semiconductor substrate, holes for receiving lights are formed in the impurity regions from the rear surface side.

Abstract: An electronic device includes a semiconductor substrate, an insulating material-filled layer and a vertical conductor. The semiconductor substrate has a vertical hole extending in a thickness direction thereof. The insulating material-filled layer is a ring-shaped layer filled in the vertical hole for covering an inner periphery thereof and includes an organic insulating material or an inorganic insulating material mainly of a glass and a nanocomposite ceramic. The nanocomposite ceramic has a specific resistance of greater than 1014 ?·cm at room temperature and a relative permittivity of 4 to 9. The vertical conductor is a solidified metal body filled in an area surrounded by the insulating material-filled layer.

Abstract: This invention relates to the field of silicon microphone technology, more specifically, to a method for fabricating a MEMS microphone using multi-cavity SOT wafer by Si—Si fusion bonding technology, which comprises a multi-cavity silicon backplate and a monocrystalline silicon diaphragm, both are separated with a layer of silicon dioxide to form the capacitor of the MEMS microphone. The monocrystalline silicon diaphragm has advantages such as low residual stress and good uniformity, which increase the yield and sensitivity of MEMS silicon microphone; the diaphragm comprises tiny release-assistant holes, spring structures with anchors and bumps which can quickly release the residual stress and reduce the probability of stiction between the backplate and the silicon diaphragm. This structure will further improve yield and reliability of MEMS microphone.

Abstract: A light emitting device includes a mounting substrate having a reflective layer that defines spaced apart anode and cathode pads, and a gap between them. A light emitting diode die is flip-chip mounted on the mounting substrate, such that the anode contact of the LED die is bonded to the anode pad and the cathode contact of the LED die is bonded to the cathode pad. A lens extends from the mounting substrate to surround the LED die. The reflective layer extends on the mounting substrate to cover substantially all of the mounting substrate that lies beneath the lens, excluding the gap, and may also extend beyond the lens.

Abstract: Spin Torque Transfer (STT) memory cell structures and methods are described herein. One or more STT memory cell structures comprise a STT stack including: a pinned ferromagnetic material in contact with an antiferromagnetic material; a tunneling barrier material positioned between a ferromagnetic storage material and the pinned ferromagnetic material; a multiferroic material in contact with the ferromagnetic storage material; and a first electrode and a second electrode, wherein the antiferromagnetic material, the pinned ferromagnetic material, and the ferromagnetic storage material are located between the first electrode and the second electrode. The STT memory cell structure can include a third electrode and a fourth electrode, wherein at least a first portion of the multiferroic material is located between the third and the fourth electrode.

Abstract: Fingerprint sensing circuit packages and methods of making such packages may comprise a first substrate having a top side and a bottom side; the top side comprising a fingerprint image sensing side over which a user's fingerprint is swiped; the bottom side comprising a metal layer forming a fingerprint sensing circuit image sensor structure; and a sensor control circuit housed in a sensor control circuit package mounted on the metal layer. The sensor control circuit may comprise an integrated circuit die contained within the sensor control circuit package. The fingerprint sensing circuit package may also have a second substrate attached to the bottom side of the first substrate having a second substrate bottom side on which is placed connector members connecting the fingerprint sensing circuit package to a device using a fingerprint image generated from the fingerprint sensing circuitry contained in the fingerprint sensing circuitry package.

Abstract: A horizontal LED die is flip-chip mounted on a mounting substrate to define a gap that extends between the closely spaced apart anode and cathode contacts of the LED die, and between the closely spaced apart anode and cathode pads of the substrate. An encapsulant is provided on the light emitting diode die and the mounting substrate. The gap is configured to prevent sufficient encapsulant from entering the gap that would degrade operation of the LED.

Abstract: The present disclosure provides a FinFET device and method of fabricating a FinFET device. The method includes providing a substrate, forming a fin structure on the substrate, forming a gate structure including a gate dielectric and gate electrode, the gate structure overlying a portion of the fin structure, forming a protection layer over another portion of the fin structure, and thereafter performing an implantation process to form source and drain regions.

Abstract: A silicon carbide semiconductor device includes a silicon carbide substrate, a gate insulating film, a gate electrode, an interlayer insulating film, and a gate interconnection. The silicon carbide substrate includes: a first impurity region; a second impurity region provided on the first impurity region; and a third impurity region provided on the second impurity region so as to be separated from the first impurity region. A trench has a side portion and a bottom portion, the side portion extending to the first impurity region through the third impurity region and the second impurity region, the bottom portion being located in the first impurity region. When viewed in across section, the interlayer insulating film extends from above the third impurity region to above the gate electrode so as to cover the corner portion.