Abstract: The present disclosure relates to Class D amplifier circuitry comprising: an input for receiving an input signal; first and second output nodes for driving a load connected between the first and second output nodes. A first driver stage is provided for switching the first node between a first supply rail and a second supply rail, and a second driver stage is provided for switching the second node between the first supply rail and the second supply rail. The Class D amplifier circuitry also includes first driver control circuitry configured to receive a first carrier wave and control the switching of the first driver stage based in part on the first carrier wave; second driver control circuitry configured to receive a second carrier wave and control the switching of the second driver stage based in part on the second carrier wave; and a carrier wave generator configured to provide the first carrier wave and the second carrier wave.

Abstract: One example includes a differential amplifier, a voltage weighting element, coupled to a voltage source which provides an input voltage, to provide a reference voltage with a constant power limit when the input voltage varies, an error amplifier configured to receive and compare the reference voltage provided from the voltage weighting element and a feedback sensed voltage provided from the differential amplifier to identify whether the sensed voltage exceeds the reference voltage, and a pulse width modulation (PWM) controller, coupled to a power transformer and the error amplifier, that reduces a transformer input current provided to the power transformer based on the comparison of the reference voltage from the voltage weighting element and the feedback sensed voltage from the differential amplifier.

Abstract: Configurable amplifier systems are described in which the power supply rail of a linear amplifier, e.g., a class A amplifier, is modulated by a switching amplifier, e.g., a class D amplifier, that may also be configured to operate independently of the linear amplifier. Techniques are also described by which the standing current of the output stage of a linear amplifier is modulated based on the input signal to the linear amplifier or based on modulation of the power supply rail of the linear amplifier.

Abstract: A device to reduce distortion in an amplifier includes an input transistor configured to generate a voltage based on an input signal. The device further includes a diode connected transistor that is configured to sink the current. The diode connected transistor includes an output terminal, and a control terminal, where the output terminal is coupled to a control terminal. The device further includes a current source circuit that coupled to the control terminal. The device additionally includes an impedance element that coupled to the output terminal at a first node and to the control terminal and the current source circuit at a second node.

Abstract: In electronic circuits having various gain states, small gain phase shift differences required among various gain states may pose a challenging problem. The disclosed methods and devices provide solution to such challenge. Electronic circuits are described wherein a first path including an amplifier may be bypassed by a second path including only passive elements and for gain states smaller than 0 dB. In such electronic circuits, a phase shifter included in the second path can be adjusted to address the required phase shift among various gain states.

Abstract: A MOSFET has a current conduction path between source and drain terminals. A gate terminal of the MOSFET receives an input signal to facilitate current conduction in the current conduction path as a result of a gate-to-source voltage reaching a threshold voltage. A body terminal of the MOSFET is coupled to body voltage control circuitry that is sensitive to the voltage at the gate terminal of the MOSFET. The body voltage control circuitry responds to a reduction in the voltage at the gate terminal of the MOSFET by increasing the body voltage of the MOSFET at the body terminal of the MOSFET. As a result, there is reduction in the threshold voltage. The circuit configuration is applicable to amplifier circuits, comparator circuits and current mirror circuits.

Abstract: In a general aspect, a circuit can include an input circuit configured to receive an input signal, and an amplifier circuit coupled with the input circuit. The amplifier circuit can include an amplifier, and first and second feedback paths. The first feedback path can be from a positive output to a negative input of the amplifier, and the second feedback path can be from a negative output to a positive input of the first amplifier. The circuit can also include a loop circuit configured to provide a local feedback loop for the first amplifier and configured to control current flow into the positive input of the first amplifier and current flow into the negative input of the first amplifier. The circuit can also include a control circuit that is configured to enable the loop circuit in response to a magnitude of the input signal exceeding a threshold.

Abstract: An amplifier comprising a gain stage with a feedback network comprising two ports between which at least three capacitors are connected in series and between each pair of capacitors a resistor is connected to a predetermined voltage. The gain stage is provided in a feedback loop over a primary amplifier.

Abstract: An amplifier system having first and second interleaved half bridge stages and a coupled inductor. The coupled inductor has a primary winding and a secondary winding, a first end of the primary winding is coupled to the first half bridge stage at a first node, a second end of the primary winding is coupled to the load, a first end of the secondary winding is coupled to the load, a second end of the secondary winding is coupled to the second half bridge stage at a second node. An inductor circuit is coupled between the first and second half bridge stages and a first end of a load circuit.

Abstract: A differential transimpedance amplifier includes a first pair of common-gate amplifiers having a first NMOS transistor and a second NMOS transistor configured in a cross-coupling topology using a first capacitor and a second capacitor, a second pair of common-gate amplifiers comprising a first PMOS transistor and a second PMOS transistor configured in a cross-coupling topology using a third capacitor and a fourth capacitor, wherein an output of the first pair of common-gate amplifiers and an output of the second pair of common-gate amplifiers are coupled via a fifth capacitor and a sixth capacitor.

Abstract: A bias device includes a transistor, a bias circuit, and an impedance unit. The transistor has a first terminal, a second terminal for providing a first bias voltage to an input terminal of an amplifier, and a control terminal. The bias circuit has a first terminal, a second terminal coupled to a first system voltage terminal for receiving a first system voltage, and a third terminal coupled to the control terminal of the first transistor for providing a second bias voltage to the control terminal of the first transistor. The impedance unit has a first terminal for receiving a first reference voltage, a second terminal coupled to the first terminal of the bias circuit. The first impedance unit adjusts the input impedance looking into the second terminal of the first transistor according to a frequency of a radio frequency signal received from the input terminal of the amplifier.

Abstract: A distortion compensation apparatus executes a process including: Performing distortion compensation that compensates in advance for a nonlinear distortion occurring when a transmission signal is amplified by a power amplifier; determining whether power of the transmission signal is smaller than a predetermined threshold; holding a gain relating to the distortion compensation or a result of the distortion compensation when the power of the transmission signal is determined to be smaller than the predetermined threshold; and outputting to the power amplifier, when the power of the transmission signal is determined to be smaller than the predetermined threshold, the result of the distortion compensation, and outputting to the power amplifier, when the power of the transmission signal is determined to be equal to or greater than the predetermined threshold, a result of distortion compensation performed using the held, gain, or the held result of the distortion compensation.

Abstract: At least one embodiment relates to a radio-frequency (RF) power amplifier system for amplifying a first RF signal. The RF power amplifier system includes a RF power amplifier being configured to amplify a second RF signal. The RF power amplifier system also includes a control loop for controlling a power level of the second RF signal. The control loop includes a RF output power determining unit for determining a power level of the amplified second RF signal. The control loop also includes a gain determining unit for determining an actual large signal gain based on the determined power level of the amplified second RF signal and a power level of the second RF signal. Further, the control loop includes an attenuator for attenuating the first RF signal and for providing the attenuated first RF signal to the RF power amplifier as the second RF signal.

Abstract: A power amplifier circuit includes a first transistor having an emitter electrically connected to a common potential, a base to which a first high-frequency signal is input, and a collector from which a third high-frequency signal is output; a second transistor having an emitter electrically connected to the common potential, a base to which a second high-frequency signal is input, and a collector from which a fourth high-frequency signal is output; a first capacitance circuit electrically connected between the collector of the second transistor and the base of the first transistor; and a second capacitance circuit electrically connected between the collector of the first transistor and the base of the second transistor.

Abstract: Example embodiments provide a device that includes a power transformer with a first output voltage terminal providing a first voltage and a second output voltage terminal providing a second voltage, a voltage regulator coupled to one or more of the first output voltage terminal and the second output voltage terminal, and a power storage element that stores power supplied by the second output voltage, and the first output voltage terminal supplies power to a remote entity until a load power requirement of the remote entity exceeds a threshold power level at which time the power storage element is used to provide power from the second output voltage terminal to the remote entity.

Abstract: Circuits for protecting devices, such as gallium nitride (GaN) devices, and operating methods thereof are described. Such circuits may include a temperature sensor configured to sense the temperature of at least a portion of a device, and a phase shifter configured to shift the phase of the signal output by the device, when the sensed temperature is outside a safe temperature range, e.g., above a predefined temperature threshold. The phase may be shifted discretely or continuously. These circuits safeguard devices from damaging operating conditions to prolong the operating life of the protected devices.

Abstract: An amplifier includes: a first input transistor connected to a first input, a first output, and a power source or a ground, a second input transistor connected to a second input, a second output, and the power source or the ground; a first replica transistor connected to the first input, a detection node, and the power source or the ground; a second replica transistor connected to the second input, the detection node, and the power source or the ground; and a bias transistor connected to a bias voltage, the detection node, and the power source or the ground.

Abstract: An operational transconductance amplifier, that may include a first differential pair that comprises a first transistor and a second transistor that are coupled to each other at a certain node; wherein the first differential pair is configured to convert a differential input voltage to first and second output currents; a current source that is coupled to the certain node and may include an adjustable current sources; and a feedback unit that is coupled to the certain node and is configured to (a) receive the differential input voltage, and maintain a voltage of the certain node substantially fixed regardless of changes in the differential input voltage.

Abstract: Described is high-current drive class AB operational trans-conductance amplifier (OTA) output that can operate under low supply voltages (e.g., below 0.9 V) while maintaining desired functionality (e.g., reliable startup behavior, well-defined biasing currents, phase margins for improved stability) over a broad range of process, voltage, and temperature variations. The class AB OTA comprises a pre-amplifier stage, and a differential OTA output stage coupled to the pre-amplifier stage, wherein the differential OTA output stage comprises at least four folded cascode transistors.

Abstract: A circuit (200) for testing failure of a connection between a radio frequency, RF, integrated circuit (201) and external circuitry (204), the circuit comprising: an amplifier (205) having first and second input paths (215, 216) and first and second output paths (206, 207); a first power detector (208, 209) coupled to one of said first or second output paths; at least one connection (211) between said first and second output paths (206, 207) and said external circuitry (204), connecting said outputs to a RF combiner (210) said external circuitry; at least one disabling circuit (230, 232, 234, 236, 240, 242, 260, 262) coupled to at least one of said first and second output paths (206, 207) or at least one of said first and second input path (215, 216), before said path reaches said power detector (208, 209); for disabling one of said inputs or outputs; wherein when said input or output path is disabled (206, 207), and a signal is output along the enabled output path (206, 207), the power detector (208, 209) on