Abstract: A technique for managing storage of compressed data includes generating and enforcing a minimum slot size requirement. The minimum slot size is based at least in part on collected performance metrics that indicate a degree of compressibility of data received, compressed, and written by the data storage system. As new data arrive, the new data are compressed and stored in slots at least as big as the minimum slot size, in many cases effecting an over-allocation of storage space and improving the likelihood that subsequent overwrites will fit into existing slots.

Abstract: An access device may be implemented to provide one or more access channels to non-volatile memory. Memory mapping implemented at the access device may direct a memory controller of the access device to perform access requests, replacing an initial storage location with a different storage location to access in the non-volatile memory device. Address scrambling, encryption, and other modifications to performing an access request may be implemented at the access device, in some embodiments, in addition to the memory mapping techniques.

Abstract: A computer-implemented method, a computer program product, and a computer system for reordering a sequence of files based on compression rates in data transfer. A host determines predicted compression rates of first files that are to be saved onto a first tape, based on a relationship between compression rates and file attributes of second files that have been saved on a second tape. The host reorders a sequence of the first files stored in host cache storage and generates a new sequence of transferring the first files from the host cache storage to the tape drive hosting the first tape, based on the predicted compression rates of the first files. The host transfers the first files to the tape drive hosting the first tape and writes the first files to the first tape, according to the new sequence.

Abstract: Parallel mark processing is disclosed including traversing first objects in a virtual machine heap based on correspondences between memory blocks in the virtual machine heap and N marking threads, pushing a first pointer of a first object into a private stack of a marking thread corresponding to a memory block, the first object being located in the memory block, performing first mark processing of the first object based on a push-in condition of the first pointer, and after traversal of the first objects has been completed, launching the N marking threads to cause the N marking threads to synchronously perform mark processing used in garbage collection based on push-in conditions of first pointers in respective private stacks of the first pointers.

Abstract: Systems and methods for synchronizing write credits between a host device and a media controller of a memory system comprising a non-volatile memory (NVM), wherein the host device is configured to maintain a write credit (WC) counter implemented in a memory controller of the host device. The WC counter tracks and limits the number of outstanding write commands which may be issued to the NVM. The host device may query the memory system to obtain status of the available write buffer space in the media controller, and adjust the WC counter based on any detected errors in the write buffer space reported in metadata of read packets sent from the memory system.

Abstract: A method and an apparatus for a memory device including a dynamically updated portion of compressed memory for a virtual memory are described. The memory device can include an uncompressed portion of memory separate from the compressed portion of memory. The virtual memory may be capable of mapping a memory address to the compressed portion of memory. A memory region allocated in the uncompressed portion of memory can be compressed into the compressed portion of memory. As a result, the memory region can become available (e.g. after being compressed) for future allocation requested in the memory device. The compressed portion of memory may be updated to store the compressed memory region. The compressed memory region may be decompressed back to the uncompressed portion in the memory device in response to a request to access data in the compressed memory region.

Abstract: An integrated circuit device includes a memory controller coupleable to a memory. The memory controller to schedule memory accesses to regions of the memory based on memory timing parameters specific to the regions. A method includes receiving a memory access request at a memory device. The method further includes accessing, from a timing data store of the memory device, data representing a memory timing parameter specific to a region of the memory cell circuitry targeted by the memory access request. The method also includes scheduling, at the memory controller, the memory access request based on the data.

Abstract: A distributed memory system including a plurality of chips, a plurality of nodes that are distributed across the plurality of chips such that each node is comprised within a chip, each node includes a dedicated local memory and a processor core, and each local memory is configured to be accessible over network communication, a network interface for each node, the network interface configured such that a corresponding network interface of each node is integrated in a coherence domain of the chip of the corresponding node, wherein each of the network interfaces are configured to support a one-sided operation, the network interface directly reading or writing in the dedicated local memory of the corresponding node without involving a processor core, and the one-sided operation is configured such that the processor core of a corresponding node uses a protocol to directly inject a remote memory access for read or write request to the network interface of the node, the remote memory access request allowing to read

Abstract: A data storage system can scan one or more information stores of primary storage and analyze the metadata of files stored in the one or more information stores of primary storage to identify multiple, possibly relevant, secondary copy operations that can be performed on the files. The storage system can also identify primary storage usage information of each file during the scan and use that information to generate reports regarding the usage of the primary storage.

Abstract: A tape drive-implemented method for encrypting metadata on a magnetic tape, the tape drive-implemented method, according to one embodiment, includes: writing an index to a magnetic tape. The index includes: metadata corresponding to a file stored on the magnetic tape, and metadata corresponding to a directory structure of the file. The tape drive-implemented method additionally includes: using a first key to encrypt a first portion of the metadata in the index corresponding to the file, and using a second key to encrypt a first portion of the metadata in the index corresponding to the directory structure of the file. Other systems, methods, and computer program products are described in additional embodiments.

Abstract: A storage system receives a write request which specifies a logical volume address associated with a RAID group, and makes a first determination whether write target data in accordance with the write request exists in a cache memory. When the first determination result is negative, the storage system makes a second determination whether at least one of one or more conditions is met, the condition being that random write throughput performance is expected to increase by asynchronous de-staging processing of storing the write target data in the RAID group asynchronously to write processing performed in response to the write request. When the second determination result is negative, the storage system selects, for the write request, synchronous storage processing, which is processing of storing the write target data in the RAID group in the write processing and for which a load on a processor is lower than the asynchronous de-staging processing.

Abstract: An apparatus for selecting a memory management method includes a memory condition module that determines memory parameters of host memory and device memory prior to a device executing a function and a memory selection module that selects a memory management method based on the memory parameters. The apparatus includes and an implementation module that implements the selected memory management method in association with execution of the function.

Abstract: A computer-implemented method according to one embodiment includes identifying a plurality of storage resources. Additionally, the method includes creating a storage capacity, where the storage capacity has a first plurality of associated attributes. Further, the method includes defining one or more data volumes for the storage capacity, where each of the one or more data volumes has a second plurality of associated attributes and inherits the first plurality of associated attributes. Further still, the method includes configuring one or more volume shares for each data volume, where each of the volume shares has a third plurality of associated attributes and inherits the first plurality of associated attributes as well as the second plurality of associated attributes.

Abstract: A technique for operating a file system in a NAS (network attached storage) cluster deploys a file system on a thin LUN in block storage and unilaterally provisions storage space to the file system without extending provisioning activities to the LUN. Rather, the file system proceeds as if the storage space is available from the LUN without reserving space or confirming availability.

Abstract: A host computing arrangement is provided, which may include a host processor having a host operating system and host kernel associated therewith. The host processor may be configured to host a guest operating system, mirror a filesystem of the guest operating system via the host kernel, and generate caching criteria by scanning the mirrored filesystem. The host computing arrangement may further include a cache engine. The cache engine may be configured to process an I/O request from the guest operating system based on the caching criteria generated by the host processor.

Abstract: A contiguous region in memory may be configured to store data so that a first portion of the data is addressable using a first indexing scheme and a second portion of the data is addressable using a second indexing scheme. The first portion of the data may include information which may be used by one entity and the second portion of the data may include different information which may be used by another entity.

Abstract: A method and system for accessing a memory for a data processing system. The method comprises sending a read request for a plurality of locations in the memory to read the plurality of locations in parallel based on an upper bound for reading the memory. The upper bound for a number of locations is based on a group of constraints for the memory. The method receives a summed value of a plurality of memory values in the plurality of locations in the memory.

Abstract: Object data, such as a key-value pair, are stored in a disk drive in conjunction with metadata associated with the object data. A key-value pair and metadata associated therewith are written in different locations in the disk drive, but as part of a single sequential write operation, such as when contents of a key-value buffer containing one or more key-value pairs are flushed to the disk drive. The key-value pair may be written during a first phase of the sequential write operation and the metadata may be written during a second phase of the sequential write operation that does not immediately precede or follow the first phase.

Abstract: A storage system shares a system memory of a host. An operation method of the storage system may include receiving a command including information about a shared memory from the host, receiving a stream command having no timeout from the host, and transmitting a first packet associated with the stream command to the host in response to the received stream command. The first packet includes information for accessing the shared memory.

Abstract: An option code providing circuit includes a plurality of resistive random access memory cells and a controller. The controller determines whether to provide a control signal to operate a heavy forming operation on the resistive random access memory cells or not. Wherein, the controller performs a read operation on the resistive random access memory cells to determine a bit number of the resistive random memory cell which is heavy formed, and the option code is determined by the bit number of resistive random access memory cell which is heavy formed or a bit number of the resistive random access memory cell which is not heavy formed.