Abstract: Provided in the present disclosure are a display panel and a display device. The display panel comprises: a base substrate; multiple contact electrodes, arranged on the base substrate in a non-display region of the display panel; an inorganic film layer, arranged on the side of the contact electrodes in proximity to the base substrate; the inorganic film layer comprising an inorganic material; an organic film layer, arranged on the side of the contact electrodes away from the base substrate; and a barrier layer, arranged on the side of the organic film layer away from the base substrate; the barrier layer comprising an inorganic material; and, the organic film layer being provided with openings in at least some gaps between adjacent contact electrodes.

Abstract: A light-emitting chip includes a light-emitting unit, first and second electrode units. The light-emitting unit includes first and second conductivity type semiconductor layers and an active layer. The first electrode unit includes two first electrodes which are spaced apart from each other by a first distance, and which are electrically connected to the first conductivity type semiconductor layer. The second electrode unit includes two second electrodes electrically connected to the second conductivity type semiconductor layer. The first and second electrode units are spaced apart from each other by a second distance, and the first distance is greater than the second distance.

Abstract: A display device and a method for fabricating the same are provided. The display device includes a support substrate, a light-emitting chip, and a thin film transistor. The light-emitting chip is disposed on a side of the support substrate. The thin film transistor is disposed on a side of the light-emitting chip away from the support substrate. The thin film transistor is connected to the light-emitting chip.

Abstract: A display device includes a light emitting element and an optical adjustment layer over the light emitting element. The optical adjustment layer includes a reflective film, a light transmitting wall over the reflection film, and a light transmitting film in contact with a side surface of the reflective film and a side surface of the light transmitting wall. A refractive index of the light transmitting wall is larger than a refractive index of the light transmitting film.

Abstract: A display panel and a display apparatus includes sub-pixels, and First and second regions arranged along a first direction. First sub-pixel groups in the first region and second sub-pixel groups in the second region are arranged along the first direction, and each include at least two sub-pixels arranged along the second direction. A number of the sub-pixels in the second sub-pixel group close to the first region is greater than a number of the sub-pixels in the second sub-pixel groups away from the first region. The first sub-region of the second region is closer to the first region than the second sub-region. From the first region to the second region, a variation rate of the numbers of the sub-pixels in the second sub-pixel groups in the first sub-region is greater than a variation rate of the numbers of the sub-pixels in the second sub-pixel groups in the second sub-region.

Abstract: A semiconductor device includes a diffusion barrier structure, a bottom electrode, a top electrode, a switching layer and a capping layer. The bottom electrode is over the diffusion barrier structure. The top electrode is over the bottom electrode. The switching layer is between the bottom electrode and the top electrode, and configured to store data. The capping layer is between the switching layer and the top electrode. The diffusion barrier structure includes a multiple-layer structure. A thermal conductivity of the diffusion barrier structure is greater than approximately 20 W/mK.

Abstract: A semiconductor device includes a substrate, a gate all around (GAA) device overlying the substrate, and a thin film transistor (TFT) overlying the GAA device, and a passive device overlying the TFT. The substrate, the GAA device, the TFT, and the passive device is subsequently stacked on each other and at least partially overlap with each other. A via includes a first end, a second end, and a middle portion of the via that is located between the first end and the second end of the via. The first end of the via is connected to the passive device and the second end of the via is connected to one layer of the GAA device. The middle portion of the via is laterally spaced apart from the TFT and the passive device.

Abstract: The present application provides a memory device. The memory device includes a semiconductor substrate including an isolation structure and an active area surrounded by the isolation structure; a fuse gate structure disposed over the active area; a device gate structure disposed over the active area and adjacent to the fuse gate structure; and a contact plug coupled to the active area and extending away from the semiconductor substrate, wherein at least a portion of the active area is disposed under the device gate structure. Further, a method of manufacturing the memory device is also disclosed.

Abstract: The present disclosure relates to oxide semiconductor transistors, methods of manufacturing the same, and/or memory devices including the oxide semiconductor transistors. The oxide semiconductor transistor includes first and second compound layers provided on a substrate, a channel layer in contact with the first and second compound layers, a first electrode facing a portion of the channel layer, a second electrode facing the first compound layer with the channel layer therebetween, and a third electrode facing the second compound layer with the channel layer therebetween. An oxygen concentration of a region of the channel layer facing the first electrode is greater than that of the remaining regions of the channel layer. A buffer layer may further be provided between the channel layer and the second and third electrodes. The first and second compound layers may include oxygen and a metal.

Abstract: A field-effect transistor and a method for controlling such is provided herein. The field-effect transistor includes a source terminal and a drain terminal arranged on a first side of a semiconductor layer and a single gate arranged on a second side of the semiconductor layer opposite the first side. The gate and the source terminal are arranged to overlap with a first common region of the semiconductor layer and the gate and the drain terminal are arranged to overlap with a second common region of the semiconductor layer.

Abstract: A display panel includes a substrate and display pixels. The display pixels are disposed on the substrate, and each of the display pixels includes pad sets, light-emitting devices, a first connecting wire, a second connecting wire, and first cutting regions. Each pad set has a first pad and a second pad. The light-emitting devices are electrically bonded to at least part of the pad sets. The first connecting wire is electrically connected to the first pads of a plurality of first pad sets of the pad sets. The second connecting wire is electrically connected to the second pads of the pad sets. The first cutting regions are disposed on one side of each of the first pad sets. Two first connecting portions of the first connecting wire and the second connecting wire connecting each of the first pad sets are located in one of the first cutting regions.

Abstract: According to one embodiment, a semiconductor substrate includes a first basement, a gate line, a source line, an insulating film, a first pixel electrode, and a first transistor and a second transistor connected parallel at positions between the source line and the first pixel electrode. Each of a first semiconductor layer of the first transistor and a second semiconductor layer of the second transistor includes a first region, a second region, and a channel region. The first semiconductor layer and the second semiconductor layer are in contact with a first surface that is a surface of the insulating film on the source line side. The channel region of each of the first semiconductor layer and the second semiconductor layer wholly overlaps the gate line.

Abstract: Provided is a photoelectric conversion element includes two electrodes forming a positive electrode and a negative electrode, at least one charge blocking layer arranged between the two electrodes, and a photoelectric conversion layer arranged between the two electrodes. The at least one charge blocking layer is an electron blocking layer or a hole blocking layer, and a potential of the charge blocking layer is bent.

Abstract: A display device includes a display layer comprising pixels, each of the pixels having at least one thin-film transistor, a connection line electrically connected to the at least one thin-film transistor, the connection line being exposed on a lower surface of the display layer through a first contact hole formed in the display layer, a barrier layer disposed on the lower surface of the display layer and including a second contact hole connected to the first contact hole, a lead line disposed on a lower surface of the barrier layer and electrically connected to the connection line through the second contact hole, a pad part disposed on the lower surface of the barrier layer and electrically connected to the lead line, and a lower film overlapping the lower surface of the barrier layer and the lead line.

Abstract: An array substrate includes a substrate, a plurality of first signal lines, a plurality of traces, a plurality of second signal lines, and a plurality of switching elements. The first signal lines are disposed on the substrate along a first direction. The traces are disposed on the substrate along a second direction different from the first direction, and one trace is electrically connected to one first signal line and crosses another one first signal line. The second signal lines are disposed on the substrate along the second direction, the second signal lines cross the first signal lines, and the traces and the second signal lines are formed of different conductive layers. The switching elements are disposed on the substrate, and one of the switching elements is electrically connected to a corresponding one first signal line and a corresponding one second signal line.

Abstract: A method includes forming a first electrode layer over a substrate, forming an ovonic threshold switch (OTS) material layer over the first electrode layer, microwave annealing the OTS material layer, and forming a second electrode layer over the OTS material layer.

Abstract: There is provided a resonator structure that obtains a highly accurate optical spectrum. The resonator structure includes a stacked structure that includes a semiconductor layer, a first resonator, a first reflection layer, a second resonator, a second reflection layer stacked in this order, allows light of a specific wavelength band to be transmitted therethrough, the semiconductor layer having a first average refractive index, the first resonator having a second average refractive index lower than the first average refractive index, and the first reflection layer having a third average refractive index higher than the second average refractive index.

Abstract: A transistor for detecting gases in the ambient air. The transistor includes a plurality of electrodes with one electrode being a gate electrode. At least one electrode is individually coated by a ceramic. An ionogel connects all electrodes with each other, the ionogel being an ionic liquid immobilized by a matrix. The use of such a transistor as an air-quality sensor is described. A process for making the transistor is also described. The process includes providing a plurality of electrodes, wherein one of the electrodes is a gate electrode; individually depositing a ceramic precursor on at least one of the plurality of electrodes; and connecting the plurality of electrodes with an ionogel, the ionogel being an ionic liquid immobilized by a matrix. A transistor produced by the process is also described.

Abstract: A method includes forming a gate stack over a semiconductor region, and forming a first gate spacer on a sidewall of the gate stack. The first gate spacer includes an inner sidewall spacer, and a dummy spacer portion on an outer side of the inner sidewall spacer. The method further includes removing the dummy spacer portion to form a trench, and forming a dielectric layer to seal a portion of the trench as an air gap. The air gap and the inner sidewall spacer in combination form a second gate spacer. A source/drain region is formed to have a portion on an outer side of the second gate spacer.

Abstract: A display panel includes: pixels, first wirings arranged in a second direction, second wirings arranged in a first direction, and first and second light-shielding strips that are disposed in a first region. First wirings passing through the first region include first wiring groups, and first wirings in each first wiring group are gathered in the first region to constitute a first gathering portion. Second wirings passing through the first region include second wiring groups, and second wirings in each second wiring group are gathered in the first region to constitute a second gathering portion. An orthographic projection of the first gathering portion on the display surface is located within an orthographic projection of a corresponding first light-shielding strip on the display surface. An orthographic projection of the second gathering portion on the display surface is located within an orthographic projection of a corresponding second light-shielding strip on the display surface.