Abstract: An automatically activated bus termination circuit in a repeater that is suitable for inclusion in a repeater stack including an end unit determination circuit is described. The end unit determination circuit includes a local input connector having an input sense pin. The input sense pin is configured to be connected to an input sense potential when the local input connector is connected to a remote output connector. A local output connector has an output sense pin. The output sense pin is configured to be connected to an output sense potential when the local output connector is connected to a remote input connector. A bus termination circuit is configured to be active when either the input sense pin is not connected to the input sense potential or the output sense pin is not connected to the output sense potential.

Abstract: An arbitration system and method provides self-arbitration among a plurality of processors or other entities vying for access to the bus or other shared resource. The entities vying for access to the shared resource present their respective priority values to an evaluation medium. The evaluation medium determines the highest priority value of those values presented, and provides this “winning” value to the competing entities. The entities compare the received “winning” value to their respective presented values. If an entity makes a positive comparison, that entity won the arbitration and is granted access to the shared resource.

Abstract: A video entertainment system includes a media processor for processing information. The media processor has a system bus with an external device connected thereto, a bus arbiter for providing the right to use the system bus to the external device in response to a request from the external device, a DRAM for storing a program supplied from the external device via the system bus, and digital signal processors for executing a predetermined process based on the program supplied from the DRAM. A CPU manages the process executed by the digital signal processors based on the program supplied from the DRAM.

Abstract: The invention discloses apparatus and process in which data files are distributed across a large scale data processing system to enable protection from the loss of data due to the failure of one or more fault domains. Specifically, the invention provides significant advances in data base management by distributing data across N fault domains using one or more of a multitude of deterministic functions to protect failure.

Abstract: When an AC adapter is connected to a LAN docker in a state “LAN docker connected, without AC adapter”, the state of a PC main body transits to a state “LAN docker connected, with AC adapter”. In this case, a system BIOS informs an OS of a change in docking state between the LAN docker and PC main body using “Dock_Changed”. With this information, the OS detects the presence of the LAN docker, i.e., a LAN controller, and sets a state wherein the PC main body can use the LAN controller.

Abstract: A data queue control submodule supporting a host processor and at least one peripheral device. The submodule includes a memory unit with a first memory portion for storing queue commands associated with each peripheral device and a second memory portion for storing peripheral device data. A queue control unit is also included in the submodule for controlling the flow of data between the peripheral devices and the host processor in accordance with the queue control commands. A port interface connects the queue control unit and the peripheral devices in response to a trigger event. The submodule further includes an event controller in communication with the host processor and the port interface for generating event triggers in response to data demands of either the host processor or the other peripheral devices. The present invention is advantageous in that it simplifies the design of each port interface and provides improved flexibility in the queue structure of the overall control system.

Abstract: An apparatus, method and system are provided for file synchronization for a fault tolerant network, and are both application and platform independent. The fault tolerant network generally includes an active network entity, such as a telecommunication server, and a standby network entity to assume the functionality of the active network entity in the event of a failure of the active network entity. The method of the present invention includes accessing a file within the active network entity, such as through a read or write request of any network application. A file access request within the active network entity is generated and transmitted to the standby network entity, which also performs the file access request. The standby network entity then generates and transmits a file access confirmation to the active network entity. The active network entity then determines whether the file access request of the active network entity has a corresponding file access confirmation from the standby network entity.

Abstract: A bus system for the serial transmission of digital data with a multiplicity of individual addressable bus transceivers (BT), which are connected by an only two-wire common bus, via which both synchronising signals and also digital data and energy are exchanged between the BTs. As the value of a bit, The result of an elementary logical operation (AND or OR) on the values of all simultaneously transmitting BTs with the same address is transmitted to all the receiving BTs with the same address simultaneously. Each BT includes its own time control and synchronising circuit with a time base, a bit counter, a byte counter and a comparator. With an identity between the imprinted address and that appearing on the bus a byte of digital data is transmitted serially via an I/O port The bus system can be put into operation and operated without the use of software, whereby polarisation errors in installation are excluded.

Abstract: A manufacturing control system used in the manufacture of semiconductor products. The system has a custom business logic controller which can be used to define and implement custom business logic that departs from the conventional business logic associated with the several elements of the manufacturing control system both rapidly and in real time. The custom business logic controller is implemented by defining desired business logic within the definitional environment of the controller. Where custom business logic is required, the manufacturing control system operates to activate the custom business logic controller, which then proceeds to execute the desired (custom) series of business logic units. Within this series, the custom business logic controller can execute a continuous series of business logic units, or certain business logic units can be executed conditionally, based on the success or failure of a prior business logic unit or units, or based on some other environmental condition.

Abstract: Run time modification of interrupt service routines in an embedded operating system installs a soft vectored interrupt service routine into the operating system kernel at the time of the kernel generation. The soft vectored interrupt service routine refers interrupt service calls to installable interrupt service routines that may be loaded subsequently on a real-time basis. In this way, flexible interrupt service routine response may be obtained for a wide variety of hardware combinations, unanticipated at the time of the generation of the operating system kernel.

Abstract: To transfer information between modules which are connected to a common bus, the module that wants to send information sends a request signal via a common bus request line. The module (bus master) which controls the bus activities, receives this signal, sends a command via the bus to all bus users, and thus starts a cycle of clock pulses. A particular clock pulse within a cycle is assigned to each bus user, during which it can send or receive one signal each along one or several predefined bus lines (FIG. 1).

Abstract: A field controller for use in a distributed control system including an area controller and at least one field controller. The field controller manages at least one controlled device in an industrial process operation. The field controller comprises a processor module segment through which it can control a selected number of devices, and it may also include one or more expansion module segments to enable it to control a larger number of controlled devices. The processor module segment includes a processor module and at least one local interface module for interfacing to a controlled device, and the expansion module segment includes interface modules for interfacing to other controlled devices. In the processor module segment, the processor module and said local interface module are interconnected by a bus segment, which is also connected to an upstream off-module connector.

Abstract: The invention provides an apparatus for testing input/output (I/O) interface in a computer system. The apparatus is capable of testing the I/O interface under real distance condition. The apparatus communicates with a first I/O interface in the computer system via a signal medium. The test apparatus includes a memory means, a clock generator for outputting a clock signal, an I/O interface communicating with the first I/O interface in the computer system via the signal medium, and a controller connected to the I/O interface. The controller operates synchronously with the clock signal for writing data transmitted from the I/O interface into the memory means, or reading out the data from the memory means and then transmitting the data to the first I/O interface through the I/O interface when a predetermined condition becomes effective.

Abstract: According to a transaction-based locking approach, a request for a first lock on a particular resource is received from a first process, wherein the first process is associated with a first transaction. A first lock on the particular resource is granted to the first process. A request for a second lock on the particular resource is received from a second process. A determination is made whether the second process is associated with the first transaction. If the second process is associated with the first transaction, then a second lock on the particular resource is granted to the second process prior to the first lock being released.

Abstract: A power save function remote control method for a system having a first information processing apparatus and at least one second information processing apparatus which are coupled via a network, includes a first step outputting a control signal which instructs a power save mode from the first information processing apparatus to the network, and a second step switching the second information processing apparatus to the power save mode in response to the control signal when a predetermined condition is satisfied in the second information processing apparatus.

Abstract: A self-repair method for a random access memory (RAM) array comprises writing a value to the memory array, reading a value from the memory array and comparing the read and write values to identify faulty memory cells in the memory array. An address of a newly-discovered faulty memory cell is compared to at least one address of at least one previously-discovered faulty memory cell. The address of the newly discovered faulty memory cell is stored if a column or row address of the newly-discovered faulty cell does not match any column or row address, respectively, of a previously-discovered faulty memory cell. Flags are set to indicate that a spare row or a spare column must replace the row or column, respectively, identified by the address of the previously-discovered faulty memory cell, if the row or column address of the newly-discovered memory cell matches the respective row or column address of the previously-discovered faulty memory cell.

Abstract: This invention provides a method of automatically adjusting interrupt frequency. The following steps are provided. First, a computer system is provided with an operating system able to deliver a plurality of interrupts with a first interrupt frequency. A counter is used to count a number of occurrences of the interrupt until the number reaches a predetermined number, and then the counter is reset to zero. The predetermined number is divided by the first interrupt frequency to obtain a product, and calculate an error between the product and an actual period of time elapsed for the predetermined number of interrupts is calculated. Lastly, the invention detects whether the error exceeds a predetermined range and adjusting the first interrupt frequency to limit the error within said predetermined range.

Abstract: A power supply converts an AC input voltage to a DC output voltage and supplies the DC output voltage to power devices. The power supply includes a housing, a transformer provided in the housing for reducing a voltage level of the AC input voltage and a thermal protection device thermally connected between the AC input voltage and the transformer for electrically disconnecting the AC input voltage from the transformer when activated responsive to the transformer exceeding a predetermined temperature. A rectifier is electrically connected to the transformer for rectifying the AC input voltage reduced by the transformer into the DC output voltage which is supplied to the power devices.

Abstract: Digital machine readable full color specifications of full color source images are embedded in the printed hardcopy versions of those images; typically through the use of a self-clocking glyph code to minimize the visual impact of the embedded data. This color specification then can be recovered from a hardcopy version of the original source image, even if the hardcopy is monochromatic. Thus, a digital highlight color copier can use this color specification to index into a plurality of different full-color to highlight-color transformse to select the transform or transorms that are most appropriate for rendering a highlight color copy of the source image.

Abstract: A control circuit for an electrical appliance having an inductive load includes a signal conditioning element, a control element, a power conditioning element, a power adjustment element, and a switching element. The control circuit is sensitive to input received from a sensor which in turn is sensitive to a touch on an outside of a conductive casing of the appliance or a sharp sound. A separate touch pad is used if the appliance has a non-conductive casing. The load is typically a motor for driving a fan unit. The fan unit may be used either independently or as part of an appliance such as a humidifier, dehumidifier, heater, or air purifier.