Abstract: The present invention relates to a server for further reducing the amount of information that needs to be sent from the server to a set of user devices associated with a multiuser interactive virtual environment. More specifically, a method of operation of a set of at least one server initially comprises receiving an input data stream representing a set of at least one characteristic of a first entity. The first entity inhabits a first location within the multiuser interactive virtual environment and is associated with a first user device. Next, the set of at least one server applies a recipient filter to the input data stream to identify a set of at least one user device that will be sent an output message. The output message represents the input data stream. The set of at least one user device comprises a second user device. The recipient filter is based upon the set of at least one characteristic. The second user device is associated with a second entity.

Abstract: An optical system including a first microcomputer having a first communication terminal and a second communication terminal, a second microcomputer having a third communication terminal which is connected to the first communication terminal and sends and receives data, and a non-volatile memory having a fourth communication terminal which is connected to the second communication terminal and able to receive data, the non-volatile memory storing contents even after power to the non-volatile memory is turned OFF. The first microcomputer reads first data which is stored in a first region of the non-volatile memory, from the non-volatile memory via the second communication terminal, transfers the first data from the first communication terminal to the second microcomputer immediately after power is supplied, and uses second data, which is stored in a second region of the non-volatile memory and which has been transferred via the second communication terminal, to perform processing.

Abstract: In a data processing system formed by one or more kinds of hardware modules each connected through a system bus, and additional hardware modules being added by connecting a frame containing one or more hardware modules to be added in accordance with request of a user, each of the processor modules includes: a detection unit for detecting a request of addition of the frame containing the hardware modules to be added; a specifying unit operatively connected to the detection unit for specifying a structure of hardware modules to be added when detecting the request; an addition unit operatively connected to the specifying unit for preparing new control tables for the hardware modules to be added based on the structure information in the specifying unit, and dynamically adding the new control tables to the present control tables which are already provided for the present hardware modules; and an initializing unit operatively connected to the specifying unit for initializing the hardware modules to be added.

Abstract: An arrangement which utilizes the system memory to store the wave tables used in the generation of high quality sound, and a direct memory access controller to rapidly transfer the portions of the wave tables stored in memory using the system bus so that a sound card may manipulate high quality sounds from wave tables stored directly in system memory without overloading the system bus and without the need for substantial additional memory on the sound card.

Abstract: A method and apparatus for detecting the presence of a stylus relative to an active area of a display screen. The method includes the steps of providing a number of sensors which are positioned to define a boundary surrounding an active area of the display screen, and transmitting an electromagnetic signal from the stylus to the sensors wherein the signal is indicative of the presence of the stylus relative to the active area.

Abstract: Missing interrupt handler (MIH) internal software features support a variable MIH timeout for I/O requests issued by an operating system (OS), when the same OS is involved with both an executing I/O request and a waiting I/O request. The OS varies its MIH timeout period without a signal from any I/O entity to prevent a false indication of a potential failure in a current I/O device operation. If a current I/O request has not completed when the OS senses the end of a primary MIH timeout period, started when issuing that request, the OS then scans the I/O program of that I/O request for any contained long-running command. (Most I/O requests complete during their primary MIH timeout period.) If a long command is found, the OS extends the MIH timeout period from the primary MIH timeout period to a long MIH timeout period, The latter gives the I/O device more time to complete its operation before the OS indicates it has a potential I/O error condition.

Abstract: An application specific integrated circuit (ASIC)/field programmable gate array (FPGA) which is a component of a wireless LAN controller including a local processor and a memory enables the controller to interface with both PCMCIA.TM. and AT.TM. host computer systems. The ASIC/FPGA enables communication between a radio frequency communication module, a local processor, and the host computer. The ASIC/FPGA also includes a throttle feature that decreases the access of the host computer in comparison to access of the local processor in order to enable the local processor to rapidly generate an acknowledge signal as required by various RF LAN specifications. During operation of the controller, data to be transmitted by the host computer onto the network is written by the host to an SRAM via the ASIC/FPGA, and the host commands the local processor via the ASIC/FPGA to forward the transmitted data to the RF communication module.

Abstract: An improved method and system for creating state machines in microcode. State machines are typically defined by a plurality having at least a combinations of current state, next state. Each one of the current states and next states are typically assigned unique values to distinguish them from other current states and next states, respectively. Upon an examination of the binary bit representations for the combinations, certain repetitive patterns become apparent between certain sections of the combinations. These recognized repetitive bit patterns are grouped and represented by linked lists and associated with one another to form the necessary relationship to define the represented combinations. Thus, saving memory and/or storage resources.

Abstract: In a communication method and apparatus, the load of a network is reduced by compressing data or changing the data compression method in accordance with a busy state of the network. A network's busy-state monitoring unit checks the busy state of the network, and data to be transmitted is compressed or the compression method is changed in accordance with the busy state, so that the amount of transmitted data is reduced, and the load of the network is reduced.

Abstract: A method and apparatus establishes and manages a connection between a computer client system and each of a plurality of server computer systems in parallel.

Abstract: A synchronous DMA burst transfer method is provided for transferring data between a host device and a peripheral drive device connected by an ATA bus. The method provides synchronous data transfer capability in an asynchronous system by having one device in charge of both a strobe signal and a data signal. When a host read or write command is delivered to the peripheral drive device, the peripheral device decides when to start the synchronous DMA burst. For a read command, the peripheral device requests the synchronous DMA burst then drives a data word onto the ATA bus after the host acknowledges that it is ready to begin the burst. After allowing time for the data signal to settle, the peripheral device toggles a strobe signal from a high state to a low state. The host sees the edge of the strobe signal at which time the host latches the data word on the bus. Additional data words can be driven on the bus and the strobe signal can be retoggled to latch the additional data words into the host.

Abstract: A gateway protocol wherein networks having differing transmission capabilities are linked through a common gateway. Data propagated by nodes on a lesser-capable network is considered base data while data transmissions on the more capable network are considered enhanced transmissions, wherein the enhanced data includes a base data component plus an enhanced data component. The gateway protocol in one embodiment processes communications between nodes on the differing networks. In a transmission going from the more-capable network to the lesser-capable network, the enhanced component of the data is stripped at the gateway while the base component is forwarded to the receiving node. In the opposite direction, a transmission from the lesser-capable network is processed at the gateway by having null data added to the base data where the enhanced data would be expected in the more-capable network protocol.

Abstract: When a write command is issued by a host computer data promptly transferred in response to the write command is stored in a write area of the data buffer. Thereafter, the start address of a read/write area is changed into the start address of the write area, data transferred from the host computer is stored in the data buffer to be sequential to the data stored in the write area. Thereafter, processing of sequentially the data stored in the read/write area in a magnetic disk is performed. When a read command is issued, the write area is set not to overlap the read/write area.

Abstract: A circuit using a single transistor to detect the interface type to Which a combination pointing device is connected. The pointing device may be connected to a PS/2 interface, which generates a voltage greater than or equal to 0 volts, or a serial interface which generates a negative voltage. The transistor is activated when connected to the serial interface, and is inactive when connected to the PS/2 interface. The output of the transistor is sensed by a microcontroller within the pointing device. The microcontroller generates data for transmission to the PS/2 interface if the transistor is not active, and generates data for transmission to the serial interface if the transistor is active. An I/O pin in the microcontroller is used to sense the interface type and can also be used as an output in which the microcontroller generates control signals for use by the pointing device. This multitasking operation reduces the required pin count of the microcontroller, thus reducing cost.

Abstract: A computer system including a PC Card socket or PCMCIA socket receiving a PC Card, wherein the PC Card socket communicates digital audio information to/from the computer's sound system. The present invention also comprises a PC Card ISDN terminal adapter which is compatible with the PCMCIA specification and which includes telephone answering device and full-duplex speakerphone capabilities. The computer system and PC Card of the present invention utilize one or more pins of the PCMCIA connector for digital audio communication between the computer's sound system and the PC Card. According to the present invention, the PC Card modem uses one or more high address pins to provide digital audio signals between the PC Card and the computer sound system.

Abstract: A computer system optimized for real-time applications which provides increased performance for real-time applications over current computer architectures. The system includes a dedicated multimedia engine coupled directly to the main memory which performs real-time operations, including audio and video functions, as well as others. The multimedia engine includes one or more DSP engines which couple through one or more I/O channels to respective video, audio and communication ports. The multimedia engine includes video ports for coupling to a video monitor, audio ports for coupling to speakers and one or more communication ports. Multimedia memory is coupled to the local memory bus and stores data for the multimedia engine. The multimedia memory in the multimedia engine comprises a portion of the main memory address space. Thus the multimedia is used for real-time or multimedia data and is also used by the CPU as overflow memory space.

Abstract: Bandwidth optimization between a microprocessor and a disc drive controller. Method and apparatus are disclosed for synchronizing asynchronous microprocessor writes to synchronous read/write channel operation. In this synchronization, bandwidth of the microprocessor is equal to or greater than the bandwidth of the disc controller. Both no ready line and ready line implementations are described.

Abstract: A method for compacting and storing date information in multiple calendar systems. Alphanumeric data corresponding to the day, month and year are entered, including "?" characters for values or individual digits that are unknown or uncertain. The year data is converted to a base eleven number for compaction and then further converted to a binary number for storage.

Abstract: A transmission system for sub-networks having different transmission protocols. Control codes which are assigned to a message in a source sub-network are converted at the transition with a first intermediate sub-network, into reference codes which are compatible with a reference protocol ("meta protocol"). Subsequently, control codes are assigned both to the message and to its reference codes, which control codes are compatible with the protocol in the first intermediate sub-network. At each subsequent sub-network transition, control codes are always assigned to both the message and to the reference codes, which control codes are compatible with the local protocol of the subsequent intermediate sub-network ("tunnelling"). At the interface of the last intermediate sub-network and the destination sub-network, after removing the local control codes, the reference codes are converted into control codes which are compatible with the local protocol of the destination sub-network.

Abstract: An apparatus and a method for routing data in a radio data communication system having one or more host computers, one or more intermediate base stations, and one or more RF terminals organizes the intermediate base stations into an optimal spanning-tree network to control the routing of data to and from the RF terminals and the host computer efficiently and dynamically. Communication between the host computer and the RF terminals is achieved by using the network of intermediate base stations to transmit the data.