Patents Examined by Prasith Thammavong
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Patent number: 10585804Abstract: Systems and methods for non-blocking implementation of cache flush instructions are disclosed. As a part of a method, data is accessed that is received in a write-back data holding buffer from a cache flushing operation, the data is flagged with a processor identifier and a serialization flag, and responsive to the flagging, the cache is notified that the cache flush is completed. Subsequent to the notifying, access is provided to data then present in the write-back data holding buffer to determine if data then present in the write-back data holding buffer is flagged.Type: GrantFiled: November 7, 2017Date of Patent: March 10, 2020Assignee: Intel CorporationInventors: Karthikeyan Avudaiyappan, Mohammad Abdallah
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Patent number: 10585801Abstract: Embodiments include methods, systems and computer readable media configured to execute a first kernel (e.g. compute or graphics kernel) with reduced intermediate state storage resource requirements. These include executing a first and second (e.g. prefetch) kernel on a data-parallel processor, such that the second kernel begins executing before the first kernel. The second kernel performs memory operations that are based upon at least a subset of memory operations in the first kernel.Type: GrantFiled: November 26, 2012Date of Patent: March 10, 2020Assignee: Advanced Micro Devices, Inc.Inventors: Nuwan S. Jayasena, James Michael O'Connor, Michael Mantor
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Patent number: 10585624Abstract: The present disclosure includes apparatuses and methods related to a memory protocol. An example apparatus can execute a read command that includes a first chunk of data and a second chunk of data by assigning a first read identification (RID) number to the first chunk of data and a second RID number to the second chunk of data, sending the first chunk of data and the first RID number to a host, and sending the second chunk of data and the second RID number to the host. The apparatus can be a non-volatile dual in-line memory module (NVDIMM) device.Type: GrantFiled: December 1, 2016Date of Patent: March 10, 2020Assignee: Micron Technology, Inc.Inventors: Robert M. Walker, Frank F. Ross
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Patent number: 10580468Abstract: In accordance with one implementation, a method for reducing cache service time includes determining an access time parameter associated with movement of a read/write head to an access location for each of a plurality of contiguous cache storage segments and dynamically selecting one of the plurality of contiguous cache storage segments to store data based on the determined access time parameter.Type: GrantFiled: September 29, 2017Date of Patent: March 3, 2020Assignee: SEAGATE TECHNOLOGY LLCInventors: Andrew Michael Kowles, Mark Gaertner, Xiong Liu, WenXiang Xie, Kai Yang, Jiangnan Lin
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Patent number: 10579516Abstract: Systems, methods, and computer programs are disclosed for providing power-efficient file system operation to a non-volatile block memory. An exemplary embodiment of a system comprises a non-volatile block memory having a file system, a dynamic random access memory (DRAM), and a system on chip (SoC). The SoC comprises a central processing unit (CPU), one or more non-core processors, a DRAM controller, a data interface coupled to an off-chip processor, and a multi-host storage controller. The CPU allocates a storage buffer in the non-volatile block memory. The multi-host storage controller comprises a virtualized client interface for providing the non-core and off-chip processors with direct read/write file system access using the allocated storage buffer while the CPU and the DRAM are in a low power state.Type: GrantFiled: March 13, 2017Date of Patent: March 3, 2020Assignee: QUALCOMM IncorporatedInventors: Yanru Li, Dexter Chun, William Kimberly
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Patent number: 10564884Abstract: Migrating data in a storage array that includes a plurality of storage devices, including: detecting, by the storage array, an occurrence of a storage device evacuation event associated with one or more source storage devices; responsive to detecting the occurrence of the storage device evacuation event, identifying, by the storage array, one or more target storage devices for receiving data stored on the one or more source storage devices; reducing, by the storage array, write access to the one or more source storage devices; and migrating the data stored on the one or more source storage devices to the one or more target storage devices.Type: GrantFiled: October 17, 2017Date of Patent: February 18, 2020Assignee: Pure Storage, Inc.Inventors: John Colgrove, Andrew Kleinerman, Benjamin Scholbrock, Taher Vohra, Xiaohui Wang
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Patent number: 10564881Abstract: Embodiments of the present disclosure relate to data management in a multitier storage system (MSS), the MSS comprises a storage virtualization controller (SVC) having at least one storage pool, and the storage pool comprises at least one logic volume, and the at least one logic volume comprises at least one tier. In response to the completion of a data migration from a source physical space of a first tier to a destination physical space of a second tier in a logic volume of a first storage pool, it is determined there is a free physical space in the source physical space. In response to the result of the determination indicating there exists a free physical space and the source physical space being thin provisioned, the free physical space of the source physical space is released to the storage array by the SVC.Type: GrantFiled: May 31, 2018Date of Patent: February 18, 2020Assignee: International Business Machines CorporationInventors: Xue Qiang Zhou, Duo Chen, Kushal Patel, Sarvesh Patel
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Patent number: 10558613Abstract: A storage system in one embodiment comprises a plurality of storage devices storing data pages. Each data page has a content-based signature derived from that data page. The content-based signatures are associated with physical locations storing the data pages. In response to receipt of a write input/output (IO) request that includes a data segment that is smaller than a page granularity of the storage devices, a content-based signature associated with the data segment is determined which also corresponds to a target data page stored at one of the physical locations. In response to determining the content-based signature, an inflight write count corresponding to the content-based signature is incremented. In response to a decrement request to decrement a reference count of the physical location corresponding to the content-based signature, a decrement flag corresponding to the content-based signature is set in the data structure and the decrement request is postponed.Type: GrantFiled: July 19, 2018Date of Patent: February 11, 2020Assignee: EMC IP Holding Company LLCInventors: Vladimir Shveidel, Lior Kamran, Oran Baruch
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Patent number: 10552082Abstract: The method, computer program product and computer system of the present invention may include a computing device that replicates data from a first data storage site, which may have a plurality of data storage tiers, to one or more second data storage sites. The computing device may identify a portion of the data on a first tier of the first data storage site to be inactive and move the inactive data to a second tier of the first data storage site. The computing device may compute a number of slices to slice the inactive data into and a location to store the slices of inactive data using an information dispersal algorithm. The computing device may send the computed number of slices and storage location for the inactive data to the one or more second data storage sites to apply to the data replicated from the first data storage site.Type: GrantFiled: April 3, 2018Date of Patent: February 4, 2020Assignee: International Business Machines CorporationInventors: Robert B. Basham, Nilesh Bhosale
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Patent number: 10545874Abstract: A method may include dividing, into a first portion of memory resources and a second portion of memory resources, a plurality of memory resources included in a cache coupled with a database. The plurality of memory resources included in the cache may store data from the database. The first portion of memory resources may be occupied by data assigned to a first weight class. The second portion of memory resources may be occupied by data assigned to a second weight class. The first portion of memory resources may be selected based at least on the first weight class and an age of at least some of the data occupying the first portion of memory resources. In response to the selection of the first portion of memory resources, the first portion of memory resources may be reclaimed. Related systems and articles of manufacture, including computer program products, are also provided.Type: GrantFiled: February 20, 2018Date of Patent: January 28, 2020Assignee: SAP SEInventors: Daniel Booss, Ivan Schreter
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Patent number: 10545846Abstract: A method and associated systems for identifying and correcting suboptimal storage-reclamation processes. A storage-management system uses information received in system-generated storage-reclamation reports to assign each user a set of reclamation scores. Each score identifies how effectively the user has been able to reclaim lost storage at particular times. These scores are organized into user-specific profiles that each consists of a chronological sequence of one user's scores. If a user's profile is “good” (that is, if the user's scores are consistently high) or “improving” (if scores are increasing over time), the system then determines whether that user's reclamation efforts have successfully reduced the amount of reclaimable storage controlled by the user. If not, the system infers that a suboptimal storage-reclamation process interfered with the user's reclamation efforts. The system then undertakes corrective action to identify and resolve the cause of the suboptimal process.Type: GrantFiled: March 17, 2017Date of Patent: January 28, 2020Assignee: International Business Machines CorporationInventors: James E. Olson, Mu Qiao, Ramani R. Routray, Alan C. Skinner, Stanley C. Wood
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Patent number: 10540110Abstract: A data-storing method for accelerated read throughput of a channel received as part of a multi-channel data stream includes writing a first channel segment of the multi-channel data stream to a first continuous sequence of physical blocks along a first data track of a storage medium within a storage device and identifying a second channel segment of the multi-channel data stream as being a continuation of the first channel segment. The method further includes writing the second channel segment to a second continuous sequence of physical blocks along a second data track responsive to the identification, the second continuous sequence of physical blocks being offset from the first continuous sequence in a down-track direction by a minimum block offset, the minimum block offset representing at least a number of physical blocks on the storage medium that rotate below a read/write element of the storage device during a time that the read/write element is moved from the first data track to the second data track.Type: GrantFiled: April 3, 2018Date of Patent: January 21, 2020Assignee: SEAGATE TECHNOLOGY LLCInventors: Xiong Liu, Jiangnan Lin, WenXiang Xie
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Patent number: 10534540Abstract: The present disclosure includes apparatuses and methods related to a memory protocol. An example apparatus can perform operations on a number of block buffers of the memory device based on commands received from a host using a block configuration register, wherein the operations can read data from the number of block buffers and write data to the number of block buffers on the memory device.Type: GrantFiled: June 15, 2016Date of Patent: January 14, 2020Assignee: Micron Technology, Inc.Inventors: Robert M. Walker, James A. Hall, Jr.
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Patent number: 10534539Abstract: A method, computer program product, and computer system for selecting, by a computing device, a first disk extent for each RAID extent in an extent pool. Remaining disk extents for each RAID extent in the extent pool may be selected.Type: GrantFiled: July 31, 2017Date of Patent: January 14, 2020Assignee: EMC IP Holding Company, LLCInventors: Jian Gao, Ilya Usvyatsky, Shaoqin Gong, Jamin Kang, Hongpo Gao, Jibing Dong, Ree Sun
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Patent number: 10528267Abstract: Apparatuses, systems, methods, and computer program products are disclosed for queueing commands for storage operations. An apparatus includes a command queue configured to queue storage commands received at a storage device and a controller for the storage device. A controller is configured to receive a storage command on a first port of a storage device. A controller is configured to queue a received storage command as an entry in a command queue. An entry in a command queue indicates a type of a received storage command. A controller is configured to service a received storage command from a command queue on a second port of a storage device based on a type of the received storage command indicated by an entry in the command queue associated with the received storage command.Type: GrantFiled: June 29, 2017Date of Patent: January 7, 2020Assignee: SanDisk Technologies LLCInventors: Nidhi Batra, Ravindra Arjun Madpur, Amandeep Kaur
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Patent number: 10528476Abstract: A page size hint may be encoded into an unused and reserved field in an effective or virtual address for use by a software page fault handler when handling a page fault associated with the effective or virtual address to enable an application to communicate to an operating system or other software-based translation functionality page size preferences for the allocation of pages of memory and/or to accelerate the search for page table entries in a hardware page table.Type: GrantFiled: May 24, 2016Date of Patent: January 7, 2020Assignee: International Business Machines CorporationInventor: Shakti Kapoor
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Patent number: 10521112Abstract: A mega cluster storage system includes clusters of multiple storage modules. Each module is able to access a portion of the data within the mega cluster and serves as a proxy in order for another storage module to access the remaining portion of the data. A cluster is assigned to a unique cluster volume and all the data within the cluster volume is accessible by all of the modules within the cluster. Each host connection to the mega cluster is associated with a particular cluster volume. A module that receives a host I/O request determines whether the I/O request should be satisfied by a module within its own cluster or be satisfied by a module within a different cluster. The module may forward the I/O request to a module within a different cluster as indicated by a distribution data structure that is allocated and stored within each storage module.Type: GrantFiled: March 17, 2017Date of Patent: December 31, 2019Assignee: International Business Machines CorporationInventors: Zah Barzik, Dan Ben-Yaacov, Mor Griv, Maxim Kalaev, Rivka M. Matosevich
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Patent number: 10522193Abstract: A system, method, and computer program product are provided for a memory device system. One or more memory dies and at least one logic die are disposed in a package and communicatively coupled. The logic die comprises a processing device configurable to manage virtual memory and operate in an operating mode. The operating mode is selected from a set of operating modes comprising a slave operating mode and a host operating mode.Type: GrantFiled: September 12, 2018Date of Patent: December 31, 2019Assignee: ADVANCED MICRO DEVICES, INC.Inventors: Nuwan S. Jayasena, Gabriel H. Loh, Bradford M. Beckmann, James M. O'Connor, Lisa R. Hsu
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Patent number: 10509589Abstract: A method of controlling a memory device can include: (i) receiving a first read command for a critical byte, where the critical byte resides in a first group of a memory array on the memory device; (ii) reading the critical byte from the memory array in response to the first read command, and providing the critical byte; (iii) reading a next byte in the first group; (iv) outputting the next byte from the first group when a clock pulse; (v) repeating the reading the next byte and the outputting the next byte for each byte in the first group; (vi) reading a first byte in a second group of the memory array, where the second group is sequential to the first group, and where each group is allocated to a cache line; and (vii) outputting the first byte from the second group when a clock pulse is received.Type: GrantFiled: August 13, 2015Date of Patent: December 17, 2019Assignee: Adesto Technologies CorporationInventors: Gideon Intrater, Bard Pedersen
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Patent number: 10509588Abstract: Systems, methods, and computer programs are disclosed for controlling memory frequency. One method comprises a first memory client generating a compressed data buffer and compression statistics related to the compressed data buffer. The compressed data buffer and the compression statistics are stored in a memory device. Based on the stored compression statistics, a frequency or voltage setting of the memory device is adjusted for enabling a second memory client to read the compressed data buffer.Type: GrantFiled: January 13, 2016Date of Patent: December 17, 2019Assignee: Qualcomm IncorporatedInventors: Serag Gadelrab, Sudeep Ravi Kottilingal, Meghal Varia, Pooja Sinha, Ujwal Patel, Ruo Long Liu, Jeffrey Chu, Sina Gholamian, Hyukjune Chung, David Strasser, Raghavendra Nagaraj, Eric Demers