Abstract: The invention relates to a high-pressure discharge lamp provided with a discharge vessel enclosed with intervening space by an outer bulb. An ignition circuit includes a voltage-dependent capacitor. According to the invention, the capacitor is mounted in a gas-filled glass capsule in the outer bulb.

Abstract: An electric lamp assembly includes a sealed outer envelope, an arc discharge tube mounted within the outer envelope, a safety filament connected in series with the arc discharge tube for extinguishing the arc tube within a predetermined time after the outer envelope is broken, and an electrically-insulating sleeve disposed around the safety filament. The insulating sleeve suppresses emission of electrons from the safety filament and thereby prevents a reduction in frame potential which would increase sodium loss from the arc tube. The insulating sleeve includes openings which permit air to reach the safety filament when the outer envelope is broken. A mounting arrangement includes a pair of mounting tabs which provide electrical connections for the safety filament and which approximately centers the safety filament in the insulating sleeve.

Abstract: Disclosed is an article comprising a stacked array of electronic subassemblies, each subassembly including one or more integrated circuits and a thermally conductive base member that is perforated with holes. Motivating means are provided for causing a coolant fluid to pass through the holes in a direction substantially parallel to the stacking axis.

Abstract: An integrated circuit package (10) has a layer (22) of silicon positioned between copper die attach pad (18) and silicon integrated circuit die (12). The layer (22) should have a thickness of about half that of the silicon die (12). The layer (22) should also extend symmetrically beyond the die (12). Such an extension provides a horizontal surface beyond the die (12) to which thermosetting encapsulating resin (20) will adhere to produce an enhanced stress reduction effect. Vertical edges (23) of the layer (22) also help to prevent stress of the die (12) by resisting force from the encapsulating resin (20) after it shrinks during curing.

Abstract: This invention relates to an electrode structure formed on a p-type III-V compound semiconductor and a method of forming the same. An electrode can by easily formed with a low ohmic contact resistance and formed without degrading a semiconductor element. The electrode structure includes an Au alloy layer formed on a p-type III-V compound semiconductor, a Ti or Cr stopper layer formed on the Au alloy layer, and an Au layer formed on the stopper layer.

Abstract: Resonant tunneling devices having an improved device switching speed are realized by including an optical control element rather than an electrical control element for switching the device from one stable state to the other. The resulting optoelectronic device including at least one double barrier quantum well semiconductor heterostructure is controllably switched from an active state to an inactive state and vice versa by impinging optical signals from an optical control element having a mean photon energy less than the bandgap energy of the double barrier quantum well semiconductor heterostructure, wherein the active state of the device exhibits conduction of charge carriers by resonant tunneling. Improvement in the switching speed occurs because the optical processes initiated by the optical control element are condsiderably faster than the electronic processes induced by prior art electrical control elements.

Abstract: An electrical component/housing has a main body with a geometric central point and a lead frame having a plurality of leads formed of flat sheet stock. An intermediate flexible planar portion of each lead extends between emerging and end portions of each lead. The intermediate portion is orientated toward the central point so as to maximize absorption of thermal expansion stresses which are radially directed between the central point and the end lead portion which will be bonded to another structure.Also, a thermally stable connection arrangement comprising: a substrate having an electrical conductor thereon to which a component lead is connected at a third position, the substrate having a first coefficient of thermal expansion (a.sub.1); a heat sink base upon which the substrate is located at a first position, the base having a second predetermined coefficient of thermal expansion (a.sub.

Abstract: A substrate of copper clad alumina lamina bearing a number of semiconductor dies is adapted to be soldered to a heatsink to provide electrically isolated thermal relief for the dies. Channels of reduced lamina depth are provided between the dies in regions of no cladding to provide a stress relief fracture path. Stresses caused by the mismatch between the thermal coefficient of expansion of the lamina and is heatsink as the substrate is temperature cycled are fracture relieved without risk of die damage or die or substrate detachment.

Abstract: A lead frame having a plurality of inner leads and outer leads, said outer leads being subjected to surface treatment for improving solder wettability at an end portion and to sruface treatment for suppressing solder wettability at least at a portion neighboring to the end portion, or said outer leads being bent 4 times or more, is effective for improving thermal fatigue life and reliability when applied to a semi-conductor device.

Abstract: A molded package having reduced unintentional and undesirable mold flash or bleed around an exposed heat sink is provided through the use of a compression structure within the package. The compression structure may be integral with a heat sink, die bond flag, if one is present, or may be a separate structure, which extends from a die support surface of the heat sink to the opposite side of the mold. During molding, the compression structure presses a heat dissipation surface of the heat sink against the mold surface forming a tight seal to prevent the mold compound from creeping around between the mold and the heat dissipation surface to form flash. The heat sink may also be provided with adhesion promotion features along its side to improve the physical bond or attachment between the heat sink and the plastic body of the package.

Abstract: The present invention relates to a connection terminal of a semiconductor device having a circuit in a case. The connection terminal of the semiconductor device according to the present invention has a construction in which a male terminal includes a plurality of terminal pieces separated from each other by a slit, and the terminal pieces are individually electrically connected to parts of the circuit. When a characteristic evaluation test is carried out with regard to the circuit, the parts of the circuit can be individually evaluated by touching the terminal pieces with test terminals such as probes. Additionally, in a practical use of the semiconductor device, one female terminal can short-circuit the plurality of the terminal pieces. Accordingly, the number of the terminals can be reduced to accomplish a compact device.

Abstract: A flexible substrate (100) carries circuitry (102) in one area of the substrate and other portions of the substrate are at least partially covered with conductive material (206) to provide a ground plane. The substrate is folded about the circuitry to form an enclosure shielding the circuit.

Abstract: A multi-layered structure of wirings on a semiconductor substrate has been employed in conjuction with the increase in the integration density of semiconductor integrated circuit devices. In the invention, dummy patterns made of the same material as an Al wiring layer for compensating for any step or level gradation are disposed in the regions below bump electrodes and in the proximity thereof in order to reduce any defects inherent to a multi-layered structure that occur in CCB bump electrodes formed on the multi-layered wirings and at pads as the base layer of the former.

Abstract: A semiconductor device generally has an anode layer, a first semiconductor layer, a first cladding layer having a superlattice structure, an active layer having a superlattice structure, a second cladding layer having a superlattice structure, a cathode barrier layer, a second semiconductor layer, and a cathode layer. The cathode barrier layer allows electrons to tunnel therethrough when a voltage is applied across the anode and cathode layers so that a potential on a side of the superlattices is positive with respect to the cathode barrier layer. The active layer has the superlattice with a bottom energy of a miniband from which electrons transit to a lower miniband with a light emission which bottom energy is smaller than those of the superlattices of the first and second cladding layers.

Abstract: A complementary semiconductor device is disclosed having a substrate and a four layer structure of pnpn provided on the substrate wherein the first three layers constitute a pnp-type bipolar transistor and the second to the fourth layer constitute an npn-type bipolar transistor. According to the present invention, the pnp- and npn-type transistor which are disposed on different portions of a principal surface of the substrate, respectively, can be produced concurrently by crystal growth and thus production steps are simple and yield is remarkably improved.

Abstract: Quantum mechanical effect devices incorporate means for interrupting the two-dimensional carrier gas of a modulation doped structure to produce periodic potential variations which provide superlattice-like effects on current flowing nearby. The modulation doped structures incorporate specialized structures displaced from a current path which simultaneously confine the two-dimensional carrier gas into a quasi-one-dimensional carrier gas and subject the thus confined carrier gas and current flowing therein to superlattice-like effects by inducing periodic potential variations along the current path. The induced variations are produced by etching corrugations in the device edges or by forming them in biasing gates.

Abstract: A solid-state image pickup device, effectively preventing dark current, includes a photosensitive pixel section formed at the surface portion of a semiconductor layer of one conductivity type. Each pixel consists of an impurity layer of an opposite conductivity to generate signal carriers; an element isolation layer formed adjacent each photosensitive pixel to isolate the photosensitive pixels from each other; transfer electrodes for transferring the signal carriers; and a storage electrode formed at the upper portion of each photosensitive pixel and responsive to the application of a voltage to allow carriers of opposite polarity to that of the signal carriers, to be injected from the element isolation layer into the surface portion of each photosensitive pixel. The storage electrode has an opening at a portion corresponding to an optical path to which the light is incident.

Abstract: A device for actuating an ejector plunger or the like on the movable carriage of a press, comprising a two-arm lever pivoted on the carriage, one arm of which is operatively connected to the plunger. The other arm has a member that runs on a track extending parallel to the line of travel of the carriage. The track is located on a member that is mounted on a stationary part of the machine and is movable in the direction normal to the line of travel of the carriage. Operating means is connected to the member to move the same periodically in the transverse direction, thereby rocking the two-arm lever and actuating the plunger. During normal operational movement of the carriage, the member on said other arm of the lever moves parallel to the track and is not affected thereby.