Abstract: An image data operation processing apparatus having a controller for transferring specified image data and generating various processing commands in accordance with an operation command input from an external unit. The controller reads out the specified image data from a plurality of image memories for storing n-bit, image data, and outputs the readout data to an operation unit. The operation unit includes an image data processor capable of performing a linear combination operation and obtaining the absolute value of a difference, and a look up table unit. The look up table unit includes a table generator, a conversion processor for receiving image data, the total number of bits of which does not exceed a maximum of m bits (m is an integer satisfying 3n/2.ltoreq.m<2n) and for performing data conversion, and a table memory. The table generator generates a table in response to a table generation command from the controller and stores it in the table memory.

Abstract: An interleaved control store having a soft error recovery system. The system includes memory banks storing identical data sets, an error detection unit for indicating that an erroneous data element has been read from a given one of the memory banks, and a correction unit for substituting a corresponding data element read from another memory bank for the erroneous data element read from the given memory bank. Other embodiments include a feedback system for executing a branch and a dynamic, on-line memory element sparing system.

Abstract: A contour line generator for identifying and displaying real time elevation contour lines for use with a moving map display. A plurality of data points neighboring a selected data point are compared to determine the presence or absence of a contour line. An average elevation is computed and applied to address a contour memory, having stored therein the elevations at which contour lines are desired to be displayed. The resultant logic signals are applied dynamically to override normal display data when a contour line is to be generated. The system provides programability for flexibility in modifying contour line intervals.

Abstract: A composite document processing apparatus has a central processing unit (CPU), a document memory to store data of a composite document, an attribute memory to store attribute data, such as the location in the composite document, the area size and the type of each data stored in the document memory, a window/viewport memory to store display attribute data, such as the size of a window and the size of a viewport, and a video memory to store display data in an image form. The composite document processing apparatus further includes a display device, on which first and second viewports are defined. Based on the above two types of attribute data, the CPU contracts the display data in a first window area, which is set for the entire document stored in the document memory, and develops the data in the video memory in an image form in such a manner that the display area in the first window area is displayed in the first viewport, which defines a display area smaller than the first window area.

Abstract: A boundary detection target region designating circuit includes a maximum value register in which a predetermined minimum value is initially set, and a minimum value register in which a predetermined maximum value is initially set. The content of the maximum value register is compared with a vertex coordinate of a boundary written in a boundary detection memory by a first comparator. If it is detected that the vertex coordinate is larger than the content of the maximum value register, the content of the maximum value register is updated to be the vertex coordinate by a first updating means. The content of the minimum value register is compared with the vertex coordinate by a second comparator. If it is detected that the vertex coordinate is smaller than the content of the minimum value register, the content of the minimum value register is updated to be the vertex coordinate by a second updating means.

Abstract: A display processor in a raster graphics display system includes a transformation, clipping and mapping feature which controls the transformation, clipping and mapping of graphics data. A control byte contains 5 bits identified as: M--Window to viewport mapping; P--perspective projection; D--2D/3D mode; T--transformation; and C--clipping. Each bit in the control byte is tested to determine what operations are to be performed on the figure to be drawn.

Abstract: A signal processing system that includes a ring bus; a multiplicity of system modules, each coupled to the ring bus and operative to receive and transfer blocks of data words over the ring bus; and a bus control module coupled to the ring bus and operative to support simultaneous data transfers between specified pairs of system modules in accordance with concurrent execution of multiple programs of data transfer instructions. In an alternate embodiment, the signal processing system may include a plurality of ring buses wherein each system module is coupled to all of the ring buses and operative to receive and transfer blocks of data words over any one of the ring buses. In addition, the bus control module is also coupled to all of the ring buses and operative to support simultaneous data transfers between specified pairs of system modules over all of the ring buses. Moreover, each ring bus may comprise individual bus segments for system module to system module coupling about the ring.

Abstract: A memory having an address generator which generates nested address sequences specified by an array transformation operator in a programmable processor, thereby allowing a controlling processor to proceed immediately to the preparation of the next instruction in parallel with memory execution of a complex present instruction. The address generator generates row and column indices specified by the array transformation operator comprising an initial reference point parameter, a boundary parameter and a plurality of displacement and length parameters expressed relative to the initial reference point. Address sequences for data representing a vector, matrix, or block are generated in a single memory in accordance with the factored series of nested addressing sequences specified by the array transformation.

Abstract: A terminal computer used as a workstation has a display unit which displays a desired number of windows on its display screen, allowing the windows to overlap one upon another. Plural pieces of data specifying the positions and sizes of the windows are stored into a memory. Data representing the display priorities of the windows are stored into another memory. A coordinate input device, known as "a mouse," is manually operated by an operator, and a cursor displayed on the screen of the display unit moves with movement of the mouse on a flat surface. The most current coordinates of the cursor on the screen are stored as present-cursor position data into a memory. A window presentation controlling section is provided for comparing the present-cursor position data with the positions and sizes of the windows.

Abstract: A computerized handwriting duplication system includes a general purpose, programmable, digital microcomputer having a buffer memory, a program memory for a computer program, and a memory for storing the digital representation of the coordinates of a signature. The system also includes a digitizer pad for providing to the microcomputer as raw data the X and Y coordinates of points travelled by a pen writing a signature thereon and for providing a keyboard-type of input information to the microcomputer.

Abstract: A virtual memory image controller for multi-windowing, comprises a bidimensional image memory organized in N elementary blocks, N being an integer, the blocks being of fixed size and rectangular, a random access read/write memory containing a sequence of N pointers, each pointer noting the beginning address of a block in the image memory, a video signal generator delivering a video signal corresponding to the contents of n blocks of the image memory, NSN, for the display on a screen of the image composed of n blocks organized in amatrix, the blocks be ing addressed by the video generator via a table of indirection, an interface for read/write accesses to the image memory, the accesses being made via the indirection table, the controller comprising also a data bus, an address bus, a command bus, and a sequencer.

Abstract: A method of converting an outine defined by a plurality of vectors into an optimum set of trapezoids which can be filled in using standard printer techniques. The process is to determine all points in the outline where two vectors intersect, and the location of all scan lines that intersect these points. Then a winding number is calculated for each trapezoid formed by the scan lines and vectors, and Fill or Not Fill states are assigned to all trapezoids. Finally, all adjacent Fill areas separated by vectors are joined to form a final set of trapezoids which define the area to be filled.

Abstract: A processor of images of objects described in three dimensions for determining parameters of pixels on a display screen. The processor possesses inputs for parameters of convex polygons describing the objects in a frame of visualization and determines from the parameters of the polygons the parameters of the pixels of a transformed two-dimensional image of that object. In order to eliminate concealed faces of objects displayed on the screen from a perspective view, the processor selects and stores the parameters of all the elements of the transformed image which are closest to the plane of visualization (the display screen). The image processor is noteworthy in that it serially processes, by pipeline organization, the parameters of a set of segments which constitute the intersections of the set of polygons with each line of visualization of the visual display device, a plurality of segments being processed simultaneously.

Abstract: A Graphic Development Instrument System (GDIS) provides a method and capability to design, create and update display screens, including static elements (never change) and dynamic elements (change responsive to stimuli) and is able to include any controller function, without rewriting or modifyng the software. The GDIS enables a screen designer to create EPROMS for those screens for different for example vehicles or models.

Abstract: An operand processing unit (10) carries out processing of operands in a computer. The unit (10) includes a plurality of operation circuits (12, 14, 16, 18, 20). A source bus (22) provides one operand per clock cycle to the operation circuits (12, 14, 16, 18, 20). A destination bus (24) receives one resultant per clock cycle from the operation circuits (12, 14, 16, 18, 20). Within each operation circuit there is provided an operand processing circuit (80) which performs a selected function with the received operands. These functions include, for example, multiplication, division, addition, subtraction, logical AND, and shift. Logical circuitry provides a priority assignment to the operation circuits (12, 14, 16, 18, 20) for sequencing the loading of operands into the highest priority operation circuit (12, 14, 16, 18, 20) which is not busy processing operands within its corresponding operand processing circuit (80).

Abstract: A method and apparatus for retrieving picture information stored in an information center and subsequently storing the picture information in a user terminal by registering in the information center retrieval control information having picture numbers used in the retrieving operation, requesting the retrieval control information from the information center through a communication line, receiving and storing the retrieval control information in the user terminal, analyzing the retrieval control information and extracting the picture numbers contained in the retrieval control information, transmitting the picture numbers to the information center through the communication line to request the picture information corresponding to the picture numbers, and receiving and storing the picture information in the user terminal, wherein the picture retrieval operations can be achieved in an off-line mode by using the stored picture information and the stored retrieval control information received during an on-line mode.

Abstract: A document processing system includes a display unit having a first display for displaying document information and a second display for displaying layout information representative of the output form of the document information displayed on the first display; a storage unit for storing the document information; an indication unit for indicating performance of an edition of the displayed layout information by directly processing the second display; and an edition unit for editing the layout information at the second display end based on the indication by the indication unit.

Abstract: In order to carry out address translation which can reduce an overhead of the VMCP to support a virtual storage, a flag indicating a common segment in the virtual machine and a system identifier are held in a TLB, and a VM identifier is held in a segment table origin stack. For the common segment, a current VM identifier is compared with the VM identifier in the segment table origin stack to determine validity of a TLB entry, and for a non-common segment, a system identifier read from the segment table origin stack is compared with the system identifier in the TLB entry to determine validity of the TLB entry.

Abstract: A nonvolatile memory bank of an electronic memory and retrieval system is partitioned into at least three memory blocks, each block capable of storing an accounting program. The accounting program data is stored in duplicate with one copy of the data in one memory block and a second copy of the data in a second memory block. The remaining memory blocks of the partitioned memory bank are held in reserve status. The integrity of the data is preserved by comparing one data copy with the other data copy. When a difference between the two data copies is detected, a determination is made as to which data copy is the correct data copy. The data in the memory block having the correct data is duplicated into a reserve memory block, forming a new set of data in a new memory block, which is then substituted for the memory block having the incorrect set of data.

Abstract: An apparatus for controlling a plurality of peripherals attached to a common high speed parallel bus, includes a first program therein, which program includes a fixed set of generalized command and control instructions and a device specific program therein, which device specific program includes command and control instructions for a plurality of different devices.