Patents Examined by Rashid Alam
  • Patent number: 7998642
    Abstract: A mask pattern data creation method includes: determining whether or not a spacing of adjacent assist pattern feature data is not more than a prescribed spacing, based on: initial position data indicating an initially set position of the assist pattern feature data determined based on an illumination condition; and initial size data indicating an initially set size of the assist pattern feature data satisfying a size condition to not optically form an image on the transfer destination; and moving at least one of the adjacent assist pattern feature data or reducing a size of the at least one to increase the spacing of the assist pattern feature data to exceed a prescribed spacing in the case where it is determined that the spacing of the assist pattern feature data is not more than the prescribed spacing.
    Type: Grant
    Filed: June 4, 2009
    Date of Patent: August 16, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Chikaaki Kodama, Hirotaka Ichikawa, Kazuyuki Masukawa, Toshiya Kotani
  • Patent number: 7998644
    Abstract: A mask blank manufacturing department manufactures a mask blank by forming a thin film to be a mask pattern on a mask blank transparent substrate. When providing the mask blank to a mask manufacturing department, the mask blank manufacturing department provides optical characteristic information (transmittance variation) of the mask blank transparent substrate and optical characteristic information (transmittance variation and/or phase difference variation) of the mask blank to the mask manufacturing department. The optical characteristic information of the mask blank transparent substrate is provided to the mask blank manufacturing department from a materials processing department that manufactures mask blank transparent substrates.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: August 16, 2011
    Assignee: Hoya Corporation
    Inventors: Osamu Suzuki, Hiroyuki Akagawa, Masaru Tanabe, Atsushi Kawaguchi, Naozumi Ishibashi
  • Patent number: 7989124
    Abstract: A photomask blank comprises a transparent substrate, a light-shielding film deposited on the substrate and comprising a metal or metal compound susceptible to fluorine dry etching, and an etching mask film deposited on the light-shielding film and comprising another metal or metal compound resistant to fluorine dry etching. When the light-shielding film is dry etched to form a pattern, pattern size variation arising from pattern density dependency is reduced, so that a photomask is produced at a high accuracy.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: August 2, 2011
    Assignees: Toppan Printing Co., Ltd., Shin-Etsu Chemical Co., Ltd.
    Inventors: Hiroki Yoshikawa, Yukio Inazuki, Satoshi Okazaki, Takashi Haraguchi, Tadashi Saga, Yosuke Kojima, Kazuaki Chiba, Yuichi Fukushima
  • Patent number: 7985513
    Abstract: Fluorine-passivated reticles for use in lithography and methods for fabricating and using such reticles are provided. According to one embodiment, a method for performing photolithography comprises placing a fluorine-passivated reticle between an illumination source and a target semiconductor wafer and causing electromagnetic radiation to pass from the illumination source through the fluorine-passivated reticle to the target semiconductor wafer. In another embodiment, a fluorine-passivated reticle comprises a substrate and a patterned fluorine-passivated absorber material layer overlying the substrate. According to another embodiment, a method for fabricating a reticle for use in photolithography comprises providing a substrate and forming a fluorine-passivated absorber material layer overlying the substrate.
    Type: Grant
    Filed: March 18, 2008
    Date of Patent: July 26, 2011
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Harry J. Levinson, Uzodinma Okoroanyanwu, Anna Tchikoulaeva, Rene Wirtz
  • Patent number: 7981574
    Abstract: Provided is a reticle used for forming a plurality of vias for connecting first wirings provided in a first wiring layer and second wirings provided in a second wiring layer formed above the first wiring layer. The first wirings and the second wirings are provided along one of a first direction and a second direction, and the first direction and the second direction perpendicularly cross each other. The reticle includes a plurality of via opening patterns for forming the plurality of vias. Each of the plurality of via opening patterns has a rectangular shape, and is arranged to cause each side of each of the via opening patterns to be diagonal with respect to the first direction and the second direction.
    Type: Grant
    Filed: January 13, 2009
    Date of Patent: July 19, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Hiroyuki Kunishima
  • Patent number: 7977016
    Abstract: A method for fabricating an extreme ultraviolet (EUV) lithography mask comprises forming a reflecting layer, an absorber layer, and a resist layer over a substrate; defining a plurality of split regions by partially splitting the resist layer with regular spacing; performing an exposure process, wherein the exposure region is irradiated with an electron beam at different intensities on the split regions to generate a difference in electron beam doses implanted into the resist layer; forming a resist layer pattern which selectively exposes the absorber layer and has a slanted side wall profile by performing a development process to remove a portion of the resist layer, into which the electron beam doses are implanted; and forming an absorber layer pattern with a slanted side wall profile by sequentially etching the portion of the absorber layer exposed by the resist layer pattern.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: July 12, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sung Hyun Oh, Yong Kyoo Choi
  • Patent number: 7972752
    Abstract: A resist pattern forming method capable of obtaining a smooth resist pattern. An exemplary method may utilize a photomask including a plurality of mask cells arranged in the form of a matrix. The length of one side of each of the mask cells may be smaller than the length corresponding to the resolution limit of the optical system of the exposure device. Each mask cell may have one or both of a light transmission region and a light shielding region, and the intensity of light passing through each mask cell may be determined by the ratio of the area of the light transmission region to the area of the mask cell. The photomask may be positioned at a vertical focus position other than the optimal focus position. The resist film may be exposed with light and may then be developed to produce the resist pattern.
    Type: Grant
    Filed: June 6, 2008
    Date of Patent: July 5, 2011
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Takamitsu Furukawa
  • Patent number: 7972489
    Abstract: A sensor element is used to detect a physical property of a measuring gas, preferably to determine the oxygen content or the temperature of an exhaust gas of an internal combustion engine. The sensor element contains a first solid electrolyte layer and a second solid electrolyte layer. A first printed conductor and a second printed conductor are provided on opposite sides of the first solid electrolyte layer, the first printed conductor including a first electrode and a feed line to the first electrode, and the second printed conductor including a second electrode and a feed line to the second electrode. A third printed conductor, which includes a third electrode and a feed line to the third electrode, is provided on the second solid electrolyte layer. The second printed conductor is positioned between the third electrode and the first printed conductor.
    Type: Grant
    Filed: September 22, 2004
    Date of Patent: July 5, 2011
    Assignee: Robert Bosch GmbH
    Inventors: Roland Stahl, Hans-Martin Wiedenmann, Berndt Cramer, Detlef Heimann, Thomas Wahl, Lothar Diehl, Thomas Moser, Bjoern Janetzky, Jan Bahlo
  • Patent number: 7955762
    Abstract: The present invention provides an optically semitransmissive film that has a near-zero phase shift, has a desired transmissivity, and is relatively thin; a novel phase-shift mask that uses the optically semitransmissive film; a photomask blank that can [be used to] manufacture the phase-shift mask; and a method for designing the optically semitransmissive film. The film is formed on a translucent substrate and transmits a portion of light having a desired wavelength ?, wherein the film has at least one phase-difference reduction layer that fulfills the following functions.
    Type: Grant
    Filed: December 7, 2009
    Date of Patent: June 7, 2011
    Assignee: Hoya Corporation
    Inventors: Yuki Shiota, Osamu Nozawa
  • Patent number: 7955761
    Abstract: An exposure mask has a rectangular pattern, an auxiliary pattern, a translucent region, and a shielding region. The rectangular pattern includes a transparent region having a dimension equal to or greater than a critical resolution of exposure light. The auxiliary pattern is arranged around the rectangular pattern and includes a transparent region having a dimension smaller than the critical resolution. The translucent region is arranged between the rectangular pattern and the auxiliary pattern for shifting a phase of light transmitted through the rectangular pattern and the auxiliary pattern to an opposite phase. The shielding region is arranged around the auxiliary pattern.
    Type: Grant
    Filed: September 18, 2008
    Date of Patent: June 7, 2011
    Assignee: Elpida Memory, Inc
    Inventor: Tadao Yasuzato
  • Patent number: 7955760
    Abstract: Disclosed herein is a method of correcting defects in photomasks. According to one embodiment, a light absorption layer is formed on a photomask where pin hole defects occur in a light blocking layer, and light absorption patterns are formed on the pin hole defect portions by selectively etching the light absorption layer. According to another embodiment, a light absorption layer is formed on a backside of a photomask having pin hole defects in a light blocking layer, and light absorption patterns are formed on the backside of the photomask substrate corresponding to a region having pin hole defects by etching the light absorption layer.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: June 7, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Tae Joong Ha, Hee Chun Kim
  • Patent number: 7947414
    Abstract: A method of fabricating a halftone phase shift mask is disclosed, by which a process time and a failure ratio can be reduced by sequentially forming a phase shift layer a first photoresist, a metal layer and a second photoresist over a transparent substrate, performing a process to expose a portion of the metal layer, and then performing an etching process to expose a portion of the substrate using the second photoresist as a mask, and then performing an electron-beam exposure process on a portion of the first photoresist such that electrons contact the surface of the transparent substrate, and then simultaneously developing a portion of the first photoresist and removing a portion of the metal layer and a remaining portion of the first photoresist to expose a portion of the phase shift layer.
    Type: Grant
    Filed: October 12, 2008
    Date of Patent: May 24, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Eui-Sang Park
  • Patent number: 7939224
    Abstract: A photomask for a lithography apparatus includes a chip pattern configured to be transferred into a resist layer on a workpiece and at least one registration mark that is configured not to be transferred into the resist layer. Mask qualification may be improved without impacting wafer level processes.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: May 10, 2011
    Assignee: Qimonda AG
    Inventors: Andreas Jahnke, Ralf Ziebold, Torsten Maehr
  • Patent number: 7939225
    Abstract: A mask for producing an image feature on an image surface during a semiconductor fabrication process is provided, the mask comprising a main feature having opaque areas and transmissive areas arranged in the form of the image feature, wherein each end of the main feature includes at least one of an opaque edge and a transmissive edge, wherein the opaque edge includes a set of transmissive assist features arranged therein such that the set of transmissive assist features align alternately with the transmissive areas of the main feature, and the transmissive edge includes a set of opaque assist features arranged therein such that the set of opaque assist features align alternately with the opaque areas of the main feature.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: May 10, 2011
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Chin-Cheng Yang, Chiao-Wen Yeh, Chih-Haw Huang
  • Patent number: 7939227
    Abstract: A method for manufacturing an integrated circuit devices. The method includes providing a substrate, which includes an opaque film overlying the substrate, an overlying negative photoresist layer, a stop layer overlying the negative photoresist layer, and a positive photoresist layer overlying the stop layer. The method includes patterning the positive resist layer to form one or more window openings in the positive photoresist layer. The method also includes removing the exposed stop layer within the one or more window openings to expose a portion of the negative photoresist layer and patterning the exposed portion of the negative photoresist layer. The method includes developing the exposed portion of the negative photoresist layer and removing exposed portions of the opaque layer to expose an underlying portion of the substrate. The method further includes removing any remaining portions of the negative photoresist layer, stop layer, and positive photoresist layer to provide a patterned mask.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: May 10, 2011
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventor: Guang Yea (Simon) Tarng
  • Patent number: 7939223
    Abstract: A method of fabricating a photomask may include forming a light-shielding layer and a first resist film on a substrate, forming a first resist pattern by exposing first exposed regions of the first resist film to a first exposure source that may have a first energy, forming a first light shielding pattern by etching the selectively exposed light-shielding layer by using the first resist pattern as an etching mask, removing the first resist pattern, forming a second resist film on the first light-shielding layer, exposing second exposed regions of the second resist film that may have a desired pattern shape to a second exposure source that may have a second energy, forming a second light shielding pattern by etching the selectively exposed first light shielding pattern by using the second resist pattern as an etching mask, and removing the second resist pattern.
    Type: Grant
    Filed: April 2, 2007
    Date of Patent: May 10, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hak-seung Han, Seong-woon Choi, Byung-gook Kim, Hee-bom Kim, Sung-ho Park
  • Patent number: 7927764
    Abstract: A method of manufacturing a film pattern includes forming a film over a substrate, applying a photoresist over the film, exposing the photoresist using a first mask pattern including a first mask opening and a second mask opening, and an optical proximity correction being applied only to the first mask opening, exposing the photoresist using a second mask pattern including a third mask opening and a fourth mask opening, an optical proximity correction being applied only to the fourth mask opening.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: April 19, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Yuji Setta
  • Patent number: 7923176
    Abstract: A mask includes a transparent substrate, a light-blocking layer and a halftone layer. The light-blocking layer includes a source electrode pattern portion including a first electrode portion, a second electrode portion and a third electrode portion, and a drain electrode pattern portion disposed between the second electrode portion and the third electrode portion. The halftone layer includes a halftone portion corresponding to a spaced-apart portion between the source electrode pattern portion and the drain electrode pattern portion, and a dummy halftone portion more protrusive than ends of the second electrode portion and the third electrode portion. Thus, a photoresist pattern corresponding to a channel portion of a thin film transistor (TFT) may be formed with a uniform thickness, to thereby prevent an excessive etching of the channel portion.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: April 12, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chong-Chul Chai, Mee-Hye Jung, Woo-Geun Lee, Woo-Seok Jeon, Young-Wook Lee, Jung-In Park, Jun-Hyung Souk, Won-Kie Chang, Shi-Yul Kim
  • Patent number: 7923175
    Abstract: A photomask structure is described, including a substrate having multiple half-tone phase shift patterns on a device region and multiple opaque patterns on a die seal ring region. By using the photomask, a side lobe effect does not occur to the photoresist layer corresponding to the die seal ring region in the exposure step.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: April 12, 2011
    Assignee: MACRONIX International Co. Ltd.
    Inventors: Chun-Chung Huang, Chin-Cheng Yang
  • Patent number: 7914949
    Abstract: A method, a recording medium and an apparatus for testing a photomask are provided. In the disclosed method, a particular region of a photomask is selected, either from a physical instance of the photomask, or from the photomask as represented by a digital representation thereof. The particular region is then characterized by identifying a pattern type present in the particular region. A lithographic process stress condition is determined for the particular region, considering the pattern type, and thereafter, a result of lithographically patterning a feature is determined by simulating a photolithographic exposure, using the particular region of the photomask under the lithographic process stress condition. Then, it is decided whether the particular region of the photomask is acceptable based on the result of the simulated exposure only under the lithographic process stress condition.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: March 29, 2011
    Assignee: International Business Machines Corporation
    Inventor: Jed H. Rankin