Abstract: A method for managing a memory stack provides mapping a part of the memory stack to a span of fast memory and a part of the memory stack to a span of slow memory, wherein the fast memory provides access speed substantially higher than the access speed provided by the slow memory.

Abstract: Memory blocks of a nonvolatile memory device are managed by identifying a full memory block, determining whether a block life of the full memory block exceeds a threshold value, and upon determining that the block life of the full memory block exceeds the threshold value, selecting the full memory block as a target block for garbage collection. The threshold of the block life is determined using an average write distance of logical pages programmed in the nonvolatile memory device.

Abstract: Systems and methods for performing defect detection and data recovery within a memory system are disclosed. A controller of a memory system writes data to a physical location of a memory and stores the physical location of the memory in a Flash Management Unit Tag cache (“Tag cache”). The controller identifies a data keep cache that is associated with the physical location of memory and updates an XOR sum stored in the identified data keep cache. The controller determines whether to perform a verification operation, and in response to a determination to perform the verification operation, verifies data stored at each physical location that has been stored in the Tag cache since a previous verification operation. Additionally, the controller determines whether to perform a reset operation, and in response to a determination to perform the reset operation, flushes the Tag cache and the plurality of data keep caches.

Abstract: Accesses to a number of data blocks stored in a distributed storage are observed. Following observation of the accesses, the stored data blocks are redistributed. In one aspect, redistribution of the data blocks includes determining the access patterns for one or more of the data blocks based on the observed accesses, and determining the storage sizes for the one or more data blocks. Thereafter, based on the determined access patterns and determined storage sizes, the one or more data blocks are sorted. Subsequently, the one or more data blocks are redistributed or rebalanced across a number of storage devices of the distributed storage based on the sorting. In one aspect, the one or more data blocks are redistributed according to either a uniform distribution scheme or a proportional distribution scheme.

Abstract: Provided are a method, system, and program for managing data in storage units. Storage pool information indicates an assignment of a plurality of storage units to a plurality of storage pools, wherein each pool is assigned zero or more storage units, wherein data associated with one storage pool is stored in a storage unit assigned to the storage pool, wherein the storage pool information for each pool indicates a threshold and target storage pool, and wherein the target storage pool is capable of being different from the storage pool. One storage unit associated with a source storage pool is selected and a determination is made of the threshold from the storage pool information for the source storage pool.

Abstract: A data processing apparatus includes an auxiliary storage device having target verification data stored therein, a program memory having a validity verification program stored therein, a first RAM (Random Access Memory), a second RAM, and an execution unit configured to execute a validity verification process in accordance with the validity verification program stored in the program memory. The execution unit is configured to copy the target verification data from the auxiliary storage device into the first RAM, execute the validity verification process on the copied target verification data in the first RAM, and use the second RAM as a work area in a case of executing the validity verification process.

Abstract: A data processing method for a re-writable non-volatile memory module is provided. The method includes receiving a write data stream associating to a logical access address of a logical programming unit; selecting a physical programming unit; and determining whether the write data stream associates with a kind of pattern. The method includes, if the write data stream associates with the kind of pattern, setting identification information corresponding to the logical access address as an identification value corresponding to the pattern, and storing the identification information corresponding to the logical access address into a predetermined area, wherein the write data stream is not programmed into the selected physical programming unit. The method further includes mapping the logical programming unit to the physical programming unit. Accordingly, the method can effectively shorten the time for writing data into the re-writable non-volatile memory module.

Abstract: The present invention discloses a data caching method and apparatus, and relates to the field of network applications. The method includes: receiving a first data request; writing target data in the first data request into an on-chip Cache, and counting a storage time of the target data in the on-chip cache; enabling a delay expiry identifier of the target data when the storage time of the target data in the Cache reaches a preset delay time; and releasing the target data when the delay expiry identifier of the target data is in an enabled state and processing of the target data is complete.

Abstract: A management system manages a computer system having multiple storage apparatuses, which provide a virtual volume to a host. The computer system includes a pool, and the storage apparatus allocates a physical page in the pool to a write destination when writing to the virtual volume. The management system stores logical volume management information for managing a corresponding relationship between a storage apparatus in which a logical volume resides and a physical page forming the logical volume, and virtual volume management information for managing the corresponding relationship between a virtual segment in a virtual volume and a page allocated to the virtual segment, and based on the logical volume management information and the virtual volume management information identifies a first page migration, which is affected in a case where either a determination-target storage apparatus is stopped or a first storage area is blocked, and displays the first page migration information.

Abstract: Systems and methods for managing data input/output operations are described that include virtual machines operating with a shared storage within a host. In such a system, a computer-implemented method is provided for dynamically provisioning cache storage while operating system applications continue to operate, including stalling the virtual machine's local cache storage operations, changing the provision of cache storage size; and resuming the operations of the virtual machine.

Abstract: A cache device for the caching of data and specifically for the identification of stale data or a thrashing event within the cache device is described. Further a cache device for the prioritization of cached data in the cache device during a thrashing event as well as stale cached data in the cache device are described. Methods associated with the use of the caching device for the caching of data and for the identification of data in a thrashing event or the identification of stale cached data are also described.

Abstract: A storage system includes a plurality of control devices each including an interface unit and an arithmetic processing unit. The arithmetic processing unit stores, when requested to execute saving processing for saving dump data of a specific interface unit in which an error has occurred, the dump data collected from the specific interface unit into a storage unit. The arithmetic processing unit calculates an execution time of the saving processing. The arithmetic processing unit compresses, when the execution time exceeds a time limit and before a remaining time is reached, part of the dump data stored in the storage unit and save the compressed dump data into a saving unit. The arithmetic processing unit saves, when the execution time exceeds the time limit and after the remaining time has been reached, rest of the dump data stored in the storage unit into the saving unit without compression.

Abstract: Mechanisms are provided, in a data processing system, for accessing a memory location in a physical memory of the data processing system. With these mechanisms, a request is received from an application to access a memory location specified by an effective address in an application address space. A translation is performed, at a user level of execution, of the effective address to a real address table index (RATI) value corresponding to the effective address. At a hardware level of execution, a lookup operation is performed that looks-up the RATI value in a real address table data structure maintained by trusted system level hardware of the data processing system, to identify a real address for accessing physical memory. A memory location in physical memory is thereafter accessed based on the identified real address.

Abstract: A memory system includes a nonvolatile memory device having a first data area storing M-bit data using a buffer program operation and a second data area storing N-bit data (N being an integer larger than M) using a main program operation and a memory controller configured to control the nonvolatile memory device. When a main program operation using data stored at the first and second data areas is required, the memory controller calculates values indicating a performance of the required main program operation to be executed according to a plurality of main program manners, selects one of the plurality of main program manners based on the calculated values, and controls the nonvolatile memory device to perform the required main program operation according to the selected main program manner.

Abstract: A memory storage scheme specially adapted for wear leveling (or other reorganization of logical memory space). Memory space includes a logical memory space of M addressable blocks of data, stored as rows or pages, and N substitute rows or pages. Data is periodically shuffled by copying data from one of the M addressable blocks to a substitute row, with the donating row then becoming part of substitute memory space, available for ensuing wear leveling operations, using a stride address. The disclosed techniques enable equation-based address translation, obviating need for an address translation table. An embodiment performs address translation entirely in hardware, for example, integrated with a memory device to perform wear leveling or data scrambling, in a manner entirely transparent to a memory controller. In addition, the stride address can represent an offset greater than one (e.g., greater than one row) and can be dynamically varied.

Abstract: Methods and apparatus for a solid state non-volatile storage sub-system of a computer is provided. The storage sub-system may include a write-many storage sub-system memory device including write-many memory cells, a write-once storage sub-system memory device including write-once memory cells, and a page-based interface that is adapted to read and write the write-once and write-many storage sub-system memory devices. Numerous other aspects are provided.

Abstract: According to one embodiment, a controller for a storage apparatus is disclosed having interfaces connectable to a host system, a first storage apparatus and a second storage apparatus. A data in the first storage apparatus and a data in the second storage apparatus are duplicates. A status table stores the operating state regarding the first storage apparatus and the second storage apparatus, wherein the operating state indicates among writing, reading, or standing by. A monitor monitors the interfaces and set up the operating state into the status table. A buffer memory buffers the data for writing in the first storage apparatus and the second storage apparatus. A command response unit receives the data for writing and write-in request from a host system, and directs the writing of the data to the first storage apparatus and the second storage apparatus while making the buffer memory buffer the received data.

Abstract: A non-volatile memory organized into flash erasable blocks sorts units of data according to a temperature assigned to each unit of data, where a higher temperature indicates a higher probability that the unit of data will suffer subsequent rewrites due to garbage collection operations. The units of data either come from a host write or from a relocation operation. Among the units more likely to suffer subsequent rewrites, a smaller subset of data super-hot is determined. These super-hot data are then maintained in a dedicated portion of the memory, such as a resident binary zone in a memory system with both binary and MLC portions.

Abstract: A system and method is provided for parallel processing of multiple write requests to write data associated the multiple write requests to a storage area concurrently. The file system receives a series of write request from one more applications executing on the computing device. The file system includes one or more processing modules that selectively groups writes request into lists or trains. After the processing modules begin processing first threads associated with writes in a first train, the processing modules determines whether and when to initiate processing of second threads associated with writes in a second train during processing of the first threads.

Abstract: A flash memory storage system including a flash memory chip, a connector, and a controller is provided. The flash memory chip has a plurality of physical blocks. The connector is configured to couple to a host system. The controller is coupled to the flash memory chip and the connector. The controller configures a plurality of logical blocks and maps the logical blocks to a portion of the physical blocks. In addition, the controller identifies rewritable disc commands from the host system and writes data from the host system into the physical blocks mapped to the logical blocks according to the rewritable disc commands. Thereby, a rewritable disc device is simulated by using the flash memory storage system.