Abstract: A system and method for efficiently handling translation look-aside buffer (TLB) misses. A memory management unit (MMU) detects when a given virtual address misses in each available translation-lookaside-buffer (TLB). The MMU determines whether a memory access operation associated with the given virtual address is the oldest, uncompleted memory access operation in a scheduler. If this is the case, a demand table walk (TW) request may be stored in an available entry in a TW queue. During this time, the utilization of the memory subsystem resources may be low. While a demand TW request is stored in the TW queue, subsequent speculative TW requests may be stored in the TW queue. When the TW queue does not store a demand TW request, no more entries of the TW queue may be allocated to store TW requests.

Abstract: The present disclosure relates generally to a method and system for creating, replicating, and providing access to virtual snapshots of a disk storage block of a disk storage system or subsystem. In one embodiment, the present disclosure relates to a virtual snapshot accessible to local users of a local data storage device. The virtual snapshot may direct local users to a snapshot stored on computer-readable storage medium at a remote data storage site, but give the appearance as if data of the corresponding snapshot is stored locally. The virtual snapshot is replaced by replication of the snapshot from the remote data storage site to the local data storage device. Each snapshot may relate to data of a logical data volume, the logical data volume being an abstraction of data blocks from one or more physical storage devices.

Abstract: Computer system comprising a first primary storage apparatus and a first secondary storage apparatus and a second primary storage apparatus and a second secondary storage apparatus, a first virtual volume of the second primary storage apparatus is externally connected to a first primary volume of the first primary storage apparatus, a total cache-through mode is configured as a cache mode in a case where a read command is supplied by the first host apparatus, unique information for the first primary volume is configured for the first virtual volume, a path to the first primary volume is switched from the first host apparatus to a path via the first virtual volume, and a second primary volume in the second primary storage apparatus is configured to form a copy pair with a second secondary volume in the second secondary storage apparatus.

Abstract: A modular data and storage management system. The system includes a time variance interface that provides for storage into a storage media of data that is received over time. The time variance interface of the modular data and storage management system provides for retrieval, from the storage media, of an indication of the data corresponding to a user specified date. The retrieved indication of the data provides a user with an option to access specific information relative to the data, such as content of files that are included in the data.

Abstract: A multi-core processor system includes a processor configured to establish coherency of shared data values stored in a cache memory accessed by a multiple cores; detect a first thread executed by a first core among the cores; identify upon detecting the first thread, a second thread under execution by a second core other than the first core and among the cores; determine whether shared data commonly accessed by the first thread and the second thread is present; and stop establishment of coherency for a first cache memory corresponding to the first core and a second cache memory corresponding to the second core, upon determining that no shared data commonly accessed is present.

Abstract: A flash memory controller, a non-transitory computer readable medium and a method for performing operations with a flash memory device, the method may include receiving, by a flash memory controller, a request to perform a requested operation with the flash memory device; selecting multiple selected instructions to be executed by a programmable module of the flash memory controller, based upon (a) an interface specification supported by the flash memory device and (b) the requested operation; wherein the programmable module comprising multiple operation phase circuits; and executing the multiple selected instructions by the programmable module, wherein the executing of the multiple selected instructions comprises executing a plurality of selected instructions by multiple operation phase circuits; wherein different operation phase circuits are arranged to execute different operation phases of the requested operation.

Abstract: In response to a query of a decision tree, a first packed node of the decision tree is copied from a system memory into a direct memory access (“DMA”) memory. In response to copying the first packed node from the system memory into the DMA memory, copying is initiated of a second packed node of the decision tree from the system memory into the DMA memory, up to a limit of then-currently available space within the DMA memory. Concurrently with copying the second packed node from the system memory into the DMA memory, the first packed node is evaluated in the DMA memory. In response to evaluating the first packed node, the second packed node is evaluated in the DMA memory without waiting for additional copying of the second packed node from the system memory into the DMA memory.

Abstract: A processing pipeline 6, 8, 10, 12 is provided with a main query stage 20 and a fetch stage 22. A buffer 24 stores program instructions which have missed within a cache memory 14. Query generation circuitry within the main query stage 20 and within a buffer query stage 26 serve to concurrently generate a main query request and a buffer query request sent to the cache memory 14. The cache memory returns a main query response and a buffer query response. Arbitration circuitry 28 controls multiplexers 30, 32 and 34 to direct the program instruction at the main query stage 20, and the program instruction stored within the buffer 24 and the buffer query stage 26 to pass either to the fetch stage 22 or to the buffer 24. The multiplexer 30 can also select a new instruction to be passed to the main query stage 20.

Abstract: A storage system comprises a storage comprising a nonvolatile storage medium, and a storage control apparatus for inputting/outputting data to/from the storage. The storage control apparatus comprises a memory for storing management information, which is information used in inputting/outputting data to/from the storage, and a control part for controlling access to the storage. The control part stores the management information, which is stored in the memory, in the storage as a base image, and when the management information is updated subsequent to the base image being stored in the storage, creates a journal comprising information related to this update, and stores the journal in the storage as a journal group which is configured from multiple journals.

Abstract: The present invention provides an approach for automatic storage planning and provisioning within a clustered computing environment (e.g., a cloud computing environment). The present invention will receive planning input for a set of storage area network volume controllers (SVCs), the planning input indicating a potential load on the SVCs and its associated components. Configuration data for a set of storage components (i.e., the set of SVCs, a set of managed disk (Mdisk) groups associated with the set of SVCs, and a set of backend storage systems) will also be collected. Based on this configuration data, the set of storage components will be filtered to identify candidate storage components capable of addressing the potential load. Then, performance data for the candidate storage components will be analyzed to identify an SVC and an Mdisk group to address the potential load.

Abstract: In this wireless communication device, a storage unit stores writing identification information relating to permission and prohibition of writing. An acquisition unit acquires device identification information that uniquely specifies an arbitrary wireless communication device from the arbitrary wireless communication device. A determination unit determines permission or prohibition of writing to a recording medium on the basis of the device identification information acquired by the acquisition unit and the writing identification information stored in the storage unit when a communication protocol of a session layer that performs writing to and readout from the recording medium in sector units is selected. A recording medium control unit controls permission and prohibition of writing to the recording medium on the basis of a result determined by the determination unit.

Abstract: A storage apparatus of an embodiment of the invention including one or more storage drives for providing real storage resources and a controller for controlling the one or more storage drives and accesses from a host computer. The controller initializes real storage resources and manages the initialized real storage resources. The controller receives an instruction for allocating an initialized real storage resource to a first virtual storage resource accessed by the host computer. In response to the instruction, the controller allocates a first initialized real storage resource which has been initialized in advance prior to the instruction to the first virtual storage resource.

Abstract: Memory is dynamically switched through the optical-switching fabric using at least one communication pattern to transfer memory space in the memory blades from one processor to an alternative processor in the processor blades without physically copying data in the memory to the processors. Various communication patterns for the dynamically switching are supported.

Abstract: A method may comprise receiving a page of data to be stored on a storage resource. The method may also comprise determining, for each particular inversion mode of a plurality of inversion modes, the number of bits of the page of data to be inverted to store a representation of the page of data in accordance with the particular inversion mode. The method may additionally comprise determining a selected inversion mode from the plurality of inversion modes for the page of data, the selected inversion mode comprising the inversion mode for which the least number of physical bit transitions are required to store the representation of the page of data in accordance with the selected inversion mode. The method may further comprise storing the representation of the page of data in a data memory in accordance with the inversion mode.

Abstract: Memory is dynamically switched through the optical-switching fabric using at least one communication pattern to transfer memory space in the memory blades from one processor to an alternative processor in the processor blades without physically copying data in the memory to the processors. Various communication patterns for the dynamically switching are supported.

Abstract: Data that is to be written is received, wherein the data is indicated in one or more blocks of a first block size. Each of the one or more blocks of the first block size is written in consecutive blocks of a second block size that is larger in size than the first block size, wherein each of the consecutive blocks of the second block size stores only one block of the first block size, and wherein each of the consecutive blocks of the second block size has empty space remaining, subsequent to the writing of each of the one or more blocks of the first block size. Filler data is written in the empty space remaining in each of the consecutive blocks of the second block size.

Abstract: Data that is to be written is received, wherein the data is indicated in one or more blocks of a first block size. Each of the one or more blocks of the first block size is written in consecutive blocks of a second block size that is larger in size than the first block size, wherein each of the consecutive blocks of the second block size stores only one block of the first block size, and wherein each of the consecutive blocks of the second block size has empty space remaining, subsequent to the writing of each of the one or more blocks of the first block size. Filler data is written in the empty space remaining in each of the consecutive blocks of the second block size.

Abstract: A multi-state memory system with encoding that minimizes half-select currents. The system includes an array of row and column conductors with a plurality of storage cells each capable of being placed into any of three or more physical states. An encoder is connected to receive data bits for storage and to apply activation signals to the row and column conductors to write information to the storage cells. The encoder is programmed to encode the data bits into entries in an array having one row corresponding with each row conductor and one column corresponding with each column conductor; select entries in the array according to half-select currents of the storage cells; apply a predetermined one-dimensional mapping that increases the value of at most one entry in the array to obtain a mapped array; and write entries of the mapped array into the storage cells.

Abstract: A computational device receives a request to copy a source logical block of a thin provisioned source logical unit to a target logical block of a thin provisioned target logical unit, wherein in thin provisioned logical units physical storage space is allocated in response to a write operation being performed but not during creation of the thin provisioned logical units. The computational device generates metadata that stores a correspondence between the source logical block and the target logical block, while avoiding allocating any physical storage space for the target logical block in the thin provisioned target logical unit.

Abstract: A method for destaging write data from a storage controller to storage devices is provided. The method includes determining that a cache element should be transferred from a write cache of the storage controller to the storage devices, calculating that a dirty watermark is above a dirty watermark maximum value, identifying a first cache element to destage from the write cache to the storage devices, transferring a first data container including the first cache element to the storage devices, and incrementing an active destage count. The method also includes repeating determining, calculating, identifying, transferring, and incrementing if the active destage count is less than an active destage count maximum value. The active destage count is a current number of write requests issued to a virtual disk that have not yet been completed, and the virtual disk is a RAID group comprising one or more specific storage devices.