Abstract: A data processing system having execution units for executing instruction sequences determines at least two conditionals in accordance with the instructions and sets respective flags according to the determined conditionals. These flags are stored and later retrieved sequentially and the execution unit executes selected instructions of the instruction sequence according to the sequentially retrieved mask flags. These masked flags may be stored sequentially in a stack for sequential retrieval at a later time.

Abstract: An instruction is fed to first and second pipelines at a same time. The instruction is advanced in the first pipeline. In addition, the instruction is advanced in the second pipeline. Advance of the instruction in the second pipeline is controlled in accordance with a position of the instruction in the first pipeline to synchronize advance of the instruction in the first pipeline and advance of the instruction in the second pipeline.

Abstract: A typical single chip microcomputer disclosed in the present application comprises a control circuit, a processing circuit and a plurality of address register--status register pairs. A logical unit formed within the control circuit comprises an electrically writable non-volatile-semiconductor memory device. Information can be externally written into the non-volatile semiconductor memory included in the logical unit, and the above described plurality of address register--status register pairs can be arbitrarily selected. As a result, logic function of the logical unit can be arbitrarily established in accordance with externally supplied information. Demanded specifications of various users can be satisfied by the logic function thus arbitrarily formed.

Abstract: An object based data processing system including an extensible set of object types and a corresponding set of "object managers" wherein each object manager is a program for operating with the data stored in a corresponding type of object. The object managers in general support at least a standard set of operations. Any program can effect performance of these standard operations on objects of any type by making an "invocation" request. In response to an invocation request, object management services (which are available to all object managers) identifies and invokes an object manager that is suitable for performing the requested operation on the specified type of data. A mechanism is provided for linking data from one object into another object. A object catalog includes both information about objects and about links between objects. Data interchange services are provided for communicating data between objects of different types, using a set of standard data interchange formats.

Abstract: An object based data processing system including an extensible set of object types and a corresponding set of "object managers" wherein each object manager is a program for operating with the data stored in a corresponding type of object. The object managers in general support at least a standard set of operations. Any program can effect performance of these standard operations on objects of any type by making an "invocation" request. In response to an invocation request, object management services (which are available to all object managers) identifies and invokes an object manager that is suitable for performing the requested operation on the specified type of data. A mechanism is provided for linking data from one object into another object. A object catalog includes both information about objects and about links between objects. Data interchange services are provided for communicating data between objects of different types, using a set of standard data interchange formats.

Abstract: An apparatus implementing an algorithm for generating carries due to the second instruction of an interlocked instruction pair when executing all combinations of logical as well as arithmetic instruction pairs is developed. The algorithm is then applied to three interlock collapsing ALU means implementations that have been proposed. The critical path for calculating the carries is first presented. Next the expression for generating these carries is used to derive a fast implementation for generating overflow which is implemented in the apparatus.

Abstract: A conditional trace system in a computer system for controlling the enablement of a trace operation in the computer system, the computer system including a set of instructions for operating said computer, the set of instructions including branch instructions, the branch instruction generating a jump signal whenever the branch instruction performs a branch operation, the conditional trace system comprising a conditional trace field in each branch instruction where the conditional trace field has either a first or second value and a first means responsive to the value of said conditional trace field and the jump signal for selectively enabling and disenabling the trace operation within the computer system.

Abstract: An electric circuit device includes a connector for permitting removal and mounting of a cartridge with a circuit built therein, and a processor for performing operations and processing using the circuit built in the cartridge. A first reset circuit is provided in the electric circuit device for supplying the processor with a first reset signal, and for producing the first reset signal when resetting is commanded by manual input or when a power supply to the electric circuit device is turned on. The electric circuit device also includes an arrangement for producing a connection detection signal indicating whether or not a cartridge is mounted to the connector, and a second reset circuit for receiving the connection detection signal via the connector. When the connection detection signal is not received by the second reset circuit, it outputs a second reset signal.

Abstract: A document editing hyphenating text words to obtain a more efficient use of the print material and provide a more aesthetically pleasing printed document. The apparatus has a keyboard for inputting text and including a hyphenation key. Also included in the apparatus are a display, a CPU, and a word dictionary that stores data of hyphenation positions of words. Once text is entered into a hot zone at the end of a line, the CPU executes line advance at the first space in the hot zone or the space preceding the word entered in the hot zone. When hyphenation is selected by the operator, based upon the displayed text, a cursor is moved to the left of a current line and the CPU calculates how many letters can be added to the right end of the preceding line. The CPU produces a display immediately above the word to the right of the cursor that indicates the number of letters that may be moved to the preceding line.

Abstract: A CORDIC processor is provided in carry-save architecture in connection with intense pipelining for vector rotations, particularly given problems in real-time processing. The processor comprises a plurality of vector iteration stages and a plurality of angle iteration stages that are partially redundantly present in order to guarantee a convergency of the CORDIC algorithm despite an ambiguity region in the sign detection of carry-save numbers and in order to simplify other circuit components, for example a multiplier. As a result of the carry-save architecture, only incomplete addition/subtraction operations are executed in the iteration stages, and intermediate results in the form of carry and save words are fed through the CORDIC processor on separate line paths until they are added in an adder at the processor output to form the final result vector.

Abstract: Application programs compiled for a first, "source", computer are translated, from their object form, for execution on a second, "target", computer. The translated application programs are linked or otherwise bound with a translation of the source computer system software. The translated system software operates on the image of the source computer address space in the target computer exactly as it did in the source computer. The semantics of the source computer system software are thus preserved identically. In addition, a virtual hardware environment is provided in the target computer to manage events and to deal with differences in the address space layouts between the source and target computers.

Abstract: A device for simultaneous data input and output and program execution support in digital processors is disclosed. The device includes a plurality of controllable input and output ports for inputting and outputting data from the device, a data cache memory which is selectively couplable to each of the plurality of input and output ports, and a controller for controlling the plurality of input and output ports and the data cache memory. The connectivity and controlablity provided by the present invention effectuates a transfer of data between any of the plurality of input and output ports or the data cache memory. The device provides multiport high-speed and high-throughput non-multiplexed data input and output while maintaining the speed and throughput characteristics of the digital processor because the input/output data transfer takes place simultaneously with digital processor program execution. The processor need not wait for data transfers from external data sources when this device is used.

Abstract: An object based data processing system including an extensible set of object types and a corresponding set of "object managers" wherein each object manager is a program for operating with the data stored in a corresponding type of object. The object managers in general support at least a standard set of operations. Any program can effect performance of these standard operations on objects of any type by making an "invocation" request. In response to an invocation request, object management services (which are available to all object managers) identifies and invokes an object manager that is suitable for performing the requested operation on the specified type of data. A mechanism is provided for linking data from one object into another object. A object catalog includes both information about objects and about links between objects. Data interchange services are provided for communicating data between objects of different types, using a set of standard data interchange formats.

Abstract: A computer system is programmed by a user to perform dataflow computations by constructing a dataflow block diagram that utilizes function icons. At least a subset of the function icons are polymorphic with respect to data type and with respect to data aggregation. A polymorphic function icon is executed by performing a single mathematical operation when its inputs are scalars, while the same icon is executed on an element when its inputs are arrays or a scalar and an array. With cluster inputs, the polymorphic function icon is executed on a component by component basis. Output types of polymorphic function icons are determined by their input types prior to executing the diagram. The system automatically constructs a connection diagram consisting of an icon with connection points that are labelled with the names of associated front panel controls and indicators. A front panel control can be hidden to make the associated control value a constant.

Abstract: Circuitry is disclosed herein for coupling VGA analog video signals Red, Green, and Blue from a computer to a first signal conditioning circuitry including signal splitting circuitry for providing two sets of the VGA signals. One set of these signals is provided to a color monitor located proximate the computer, and the other set is provided to a cable up to 300 feet in length and having a plurality of discrete conductors. The conductors are coupled at an opposite end of the cable to a second signal conditioning circuitry and to an analog monochrome monitor, the second signal conditioning circuitry including voltage reduction means for reducing the Red, Green, and Blue signals to a reduced, different voltage level for each signal. The reduced signals are then summed to form a monochrome video signal that is provided to the monochrome analog monitor, the color signals each displayed thereon as a different shade of gray in accordance with a reduction factor of each of the voltage reduction means.

Abstract: A system and method for upgrading a computer is disclosed. Certain essential chips present in the original computer system are functionally, but not physically, removed from the computer system. The functions which would otherwise be performed by the original chips are instead performed by higher-performance chips on a plug-in module which is plugged into the computer system. The functional removal of the certain chips from the original computer system is achieved through simple insertion of the plug-in module. No replacement or substitution of original chips or boards is necessary.

Abstract: A parallel processing system wherein the instruction field of each instruction is additionally provided with execution predict count information representative of the number of basic clocks required to execute the instruction, and sort circuits that rearrange a group of instructions on the basis of the execution predict count information are provided and wherein the group of instructions are divided into a plurality of blocks in units of columns, as a prefetching processing, and the blocks of instructions prefetched in units of columns are alternately subjected to sorting in descending order and sorting in ascending order by the sort circuits on the basis of the execution predict count information.

Abstract: This invention pertains to circuitry for automatically coupling up to four keyboards to a single keyboard port of a computer. Switching is accomplished by sensing a clock pulse appearing on one of the keyboard clock pulse lines responsive to a keystroke appearing on one of the keyboards. The clock pulse is applied either to a set input or a reset input of a latch, depending from which of keyboard clock pulses lines the pulse originated. The set or reset condition of the latch evokes a selected voltage potential on the output of the latch, which biases "on" bi-directional switches, coupling one of the keyboards to the computer.

Abstract: An object based data processing system including an extensible set of object types and a corresponding set of "object managers" wherein each object manager is a program for operating with the data stored in a corresponding type of object. The object managers in general support at least a standard set of operations. Any program can effect performance of these standard operations on objects of any type by making an "invocation" request. In response to an invocation request, object management services (which are available to all object managers) identifies and invokes an object manager that is suitable for performing the requested operation on the specified type of data. A mechanism is provided for linking data from one object into another object. A object catalog includes both information about objects and about links between objects. Data interchange services are provided for communicating data between objects of different types, using a set of standard data interchange formats.

Abstract: In a multiprocessor system, a communication register is partitioned into groups of word storage locations and one of the groups is further partitioned into subgroups associated respectively with the processors. An access controller accesses any groups of the communication register when a system program is being processed and accesses one of the subgroup when a user program is being processed. A write controller is responsive to a test & set instruction of first occurrence from a common bus for assembling a lock work with a data word, a control field and a counter field containing a variable count. The control field of the lock word is set to a first binary state when it is assembled and reset to a second binary state when deassembled. In response to a load instruction from the common bus, either the data word from the bus or lock word is stored into a specified storage area of a communication register.