Patents Examined by Robert K Carpenter
  • Patent number: 11569423
    Abstract: A display device is provided. The display device includes a substrate, a driving circuit disposed on the substrate, and a light-emitting unit disposed on the driving circuit and electrically connected to the driving circuit. The light-emitting unit includes a first semiconductor layer, a quantum well layer disposed on the first semiconductor layer and a second semiconductor layer disposed on the quantum well layer. The second semiconductor layer includes a first top surface. The display device also includes a first protective layer disposed on the driving circuit and adjacent to the light-emitting unit. The first protective layer includes a second top surface and a plurality of conductive elements formed therein. The elevation of the first top surface is higher than the elevation of the second top surface.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: January 31, 2023
    Assignee: INNOLUX CORPORATION
    Inventors: Tsung-Han Tsai, Kuan-Feng Lee, Yuan-Lin Wu
  • Patent number: 11563199
    Abstract: A light emitting device and a display apparatus including a phase shifting mirror are provided. The light emitting device includes a first electrode, a light emitting structure, a second electrode, and a phase shifting mirror. The phase shifting mirror has a number of patterns arranged in a periodic manner with an interval between adjacent patterns. Each pattern has a top surface and a side surface between the top surface of the respective pattern and the top surface of the first electrode. A first width at a bottom portion of the respective pattern directly adjacent to the top surface of the first electrode is greater than a second width of the top surface of the respective pattern, and the first width and the second width are less than a wavelength of light generated in the light emitting structure.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: January 24, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jisoo Kyoung, Wonjae Joo, Youngnam Kwon, Byonggwon Song
  • Patent number: 11563152
    Abstract: Disclosed herein are a light emitting diode package and a method of manufacturing the same. The light emitting diode package includes: a substrate, a light-emitting layer disposed on a surface of the substrate and including a first type semiconductor layer, an active layer, and a second type semiconductor layer, a first bump disposed on the first type semiconductor layer and a second bump disposed the second type semiconductor layer, a protective layer covering at least the light-emitting layer, and a first bump pad and a second bump pad disposed on the protective layer and connected to the first bump and the second bump, respectively.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: January 24, 2023
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Chi Hyun In, Jun Yong Park, Kyu Ho Lee, Dae Woong Suh, Jong Hyeon Chae, Chang Hoon Kim, Sung Hyun Lee
  • Patent number: 11557691
    Abstract: In an embodiment a method includes forming a semiconductor layer sequence on a growth substrate, applying a silicon oxide layer to a surface of the semiconductor layer sequence facing away from the growth substrate, applying a first metal layer to the silicon oxide layer, wherein the first metal layer includes gold, platinum, copper or silver, providing a silicon substrate and applying a second metal layer formed of the same material as the first metal layer to the silicon substrate, bonding the semiconductor layer sequence to the silicon substrate by direct bonding of the first metal layer to the second metal layer, wherein the first metal layer and the second metal layer are brought into contact at a temperature in a range of 150° C. to 400° C. so that they form a metal bonding layer and detaching the growth substrate from the semiconductor layer sequence.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: January 17, 2023
    Assignee: OSRAM OLED GmbH
    Inventors: Simeon Katz, Sophia Huppmann
  • Patent number: 11545504
    Abstract: Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: January 3, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Takehito Koshizawa, Mukund Srinivasan, Tomohiko Kitajima, Chang Seok Kang, Sung-Kwan Kang, Gill Y. Lee, Susmit Singha Roy
  • Patent number: 11545474
    Abstract: A method for transferring alignment marks between substrate systems includes providing a substrate having semiconductor devices and alignment marks in precise alignment with the semiconductor devices; and physically transferring and bonding the semiconductor devices and the alignment marks to a temporary substrate of a first substrate system. The method can also include physically transferring and bonding the semiconductor devices and the alignment marks to a mass transfer substrate of a second substrate system; and physically transferring and bonding the semiconductor devices and the alignment marks to a circuitry substrate of a third substrate system. A system for transferring alignment marks between substrate systems includes the substrate having the semiconductor devices and the alignment marks in precise alignment with the semiconductor devices. The system also includes the first substrate system, and can include the second substrate system and the third substrate system.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: January 3, 2023
    Assignees: SemiLEDs Corporation, Shin-Etsu Chemical Co., Ltd.
    Inventors: David Trung Doan, Yoshinori Ogawa, Nobuaki Matsumoto
  • Patent number: 11538851
    Abstract: Provided is a display device including a base layer, a pixel circuit disposed on the base layer, a pixel electrode electrically connected to the pixel circuit, a middle layer disposed on the pixel electrode and including a polymer resin layer and a conductive layer, a plurality of light emitting diodes disposed on the conductive layer and electrically connected to the pixel electrode, and a common electrode configured to cover the plurality of light emitting diodes and electrically connected to the plurality of light emitting diodes. Each of the plurality of light emitting diodes includes a first electrode, a light generating layer, and a second electrode sequentially stacked in a thickness direction of the base layer.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: December 27, 2022
    Inventors: Jinwoo Choi, Minwoo Kim, Daeho Song, Hyung-Il Jeon
  • Patent number: 11538850
    Abstract: A micro multi-color LED device includes two or more LED structures for emitting a range of colors. The two or more LED structures are vertically stacked to combine light from the two more LED structures. In some embodiments, each LED structure is connected to a pixel driver and a shared P-electrode. The LED structures are bonded together through bonding layers. In some embodiments, reflection layers are implemented in the device to improve the LED emission efficiency. A display panel comprising an array of the micro tri-color LED devices has a high resolution and a high illumination brightness.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: December 27, 2022
    Assignee: Jade Bird Display (Shanghai) Limited
    Inventors: Qiming Li, Qunchao Xu
  • Patent number: 11522112
    Abstract: A light emitting diode includes an active layer, a first type semiconductor layer, a second type semiconductor layer, a coupling layer, and a sacrificial thin film. The first type semiconductor layer and the second type semiconductor layer are disposed at opposite sides of the active layer. The coupling layer is disposed on the second type semiconductor layer. The sacrificial thin film is disposed on the coupling layer, in which the coupling layer is disposed between the sacrificial thin film and the second type semiconductor layer, and the sacrificial thin film has a thickness less than a total thickness of the first type semiconductor layer, the active layer, the second type semiconductor layer and the coupling layer.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: December 6, 2022
    Assignees: Lextar Electronics Corporation, ULTRA DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Shiou-Yi Kuo, Jian-Chin Liang, Shen-De Chen
  • Patent number: 11515334
    Abstract: A MOSFET structure including stacked vertically isolated MOSFETs and a method for forming the same are disclosed.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: November 29, 2022
    Assignee: NATIONAL TAIWAN UNIVERSITY
    Inventors: Yu-Shiang Huang, Hung-Yu Yeh, Wen Hung Huang, Chee-Wee Liu
  • Patent number: 11515459
    Abstract: The present invention relates to a micro light-emitting diode display panel and a method for producing the same. A backplane and a light-emitting diode display layer are subjected to a bonding process to form eutectic structures between the backplane and light-emitting diodes of the light-emitting diode display layer. Then, an adhesive bonding layer including a resin material and conducting materials is formed on a surface of the backplane, and a heating process is performed, thereby causing the conducting materials to form a plurality of metallic bridge connection structures. Therefore, a bonding between the light-emitting diode and the backplane is reinforced, and tensile strength of the micro light-emitting diode display panel is enhanced.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: November 29, 2022
    Assignees: Interface Technology (ChengDu) Co., Ltd., Interface Optoelectronics (ShenZhen) Co., Ltd., General Interface Solution Limited
    Inventors: Ping-Hsiang Kao, Po-Lun Chen, Chun-Ta Chen, Po-Ching Lin, Ya-Chu Hsu, Chia-Ming Fan, Chien-Yu Huang
  • Patent number: 11508780
    Abstract: A method of manufacturing a display apparatus, a display apparatus, and a structure for manufacturing a display apparatus are provided. The method of manufacturing a display apparatus includes: forming a micro-light-emitting diode (LED) chip on a relay substrate such that a chip-side electrode is exposed; transferring the micro-LED chip from the relay substrate to a driving substrate including a driving substrate-side electrode; and bonding the chip-side electrode to the driving substrate-side electrode.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: November 22, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Takashi Takagi, Masaru Wada, Satoshi Yanagisawa, Tsubasa Fujiwara
  • Patent number: 11508708
    Abstract: A semiconductor module includes a ground substrate that is provided with a drive circuit, and a plurality of light emitting elements that are electrically coupled to the drive circuit, in which a distance between the light emitting elements adjacent to each other is equal to or less than 20 ?m in a top view.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: November 22, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Hiroaki Onuma, Takashi Ono, Hiroyoshi Higashisaka, Tsuyoshi Ono, Takashi Kurisu, Toshio Hata
  • Patent number: 11502164
    Abstract: A method of manufacturing a semiconductor integrated circuit includes forming a body region having a second conductivity type in an upper portion of a support layer having a first conductivity type and forming a well region having a second conductivity type in an upper portion of the support layer. An output side buried layer is formed inside the body region and a circuit side buried layer is formed inside the well region. A trench is dug to penetrate through the body region and a control electrode structure is buried in the gate trench. First and second terminal regions are formed on the well region and an output terminal region is formed on the body region. An output stage element having the output terminal region is controlled by a circuit element including the first and second terminal regions.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: November 15, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Yoshiaki Toyoda
  • Patent number: 11495710
    Abstract: A method for producing a patterned layer of material includes producing a first substrate having a patterned face, producing, against the patterned face of the first substrate, a stack of layers having an intermediate layer and the layer to be patterned, the intermediate layer being disposed between the layer to be patterned and the first substrate, a first face of the intermediate layer disposed on the first substrate side being patterned in accordance with a design that is the inverse of that of the patterned face of the first substrate, and removing the first substrate. The intermediate layer is anisotropically etched from the first face of the intermediate layer, and at least part of the thickness of the layer to be patterned is etched, patterning a face of the layer to be patterned in accordance with the design of the first face of the intermediate layer.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: November 8, 2022
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Adrien Gasse, Amélie Dussaigne, François Levy
  • Patent number: 11482567
    Abstract: A display device including a first integrated circuit including: an assembly of light-emitting diodes, each diode including a vertical stack of a first semiconductor layer of a first conductivity type and of a second semiconductor layer of a second conductivity type; and on the side of a surface of the first circuit opposite to the first semiconductor layer, a connection structure including a dielectric layer having a plurality of identical or similar connection pads, regularly distributed across the entire surface of the first circuit, arranged therein, each diode having a first electrode in contact with at least one pad of the connection structure, and a second electrode in contact with a plurality of pads of the connection structure at the periphery of the plurality of diodes.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: October 25, 2022
    Assignee: Commissariat á l'Énergie Atomique et aux Énergies Alternatives
    Inventors: François Templier, Séverine Cheramy, Frank Fournel
  • Patent number: 11482566
    Abstract: A light emitting device for a display including a first LED stack configured to generate light having a first peak wavelength, a second LED stack disposed under the first LED stack, and configured to generate light having a second peak wavelength, a third LED stack disposed under the second LED stack, and configured to generate light having a third peak wavelength, and a floating reflection layer disposed over the first LED stack, and configured to reflect light having the first peak wavelength, in which the first peak wavelength is longer than the second and third peak wavelengths.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: October 25, 2022
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Jong Hyeon Chae, Seom Geun Lee, Seong Kyu Jang
  • Patent number: 11476394
    Abstract: Disclosed herein is a light emitting device and a display apparatus capable of improving design freedom. A package is provided with light extraction regions LR, LG, and LB and a partition region D provided on an outside of the light extraction regions LR, LG, and LB. The package includes an LED provided in the light extraction regions LR, LG, and LB and configured to emit light of a predetermined wavelength range and wavelength conversion layers 13R, 13G and 13B provided in the light extraction regions LR, LG, and LB and configured to convert the wavelength of light emitted from the LED. The package includes a wall portion provided in the partition region D and a first laminated portion provided in the partition region D and including a material different from a material forming the wall portion.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: October 18, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dai Aoki
  • Patent number: 11476398
    Abstract: A semiconductor display may include a multiplicity of semiconductor pillars as well as first contact strips and second electrical contact strips. The semiconductor pillars each comprise a semiconductor core of a first conductivity type and a semiconductor shell of a second conductivity type different from the first conductivity type, as well as an active layer between them for radiation generation. The semiconductor pillars each comprise an energization shell which is applied onto the respective semiconductor shell for energization. The semiconductor pillars can be electrically driven independently of one another individually or in small groups by means of the first and second electrical contact strips.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: October 18, 2022
    Assignee: OSRAM OLED GmbH
    Inventor: Siegfried Herrmann
  • Patent number: 11476397
    Abstract: A display device according to an exemplary embodiment of the present disclosure comprises an insulation layer on a substrate and having a groove concave in a direction toward the substrate; a first reflective layer on at least a portion of the insulation layer; and a display element layer on the insulation layer and the first reflective layer, the display element layer including a light emitting element overlapping at least a portion of the groove.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: October 18, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventors: Eui Suk Jung, Tae Gyun Kim, Jun Hong Park, Jun Chun, Hyun Young Jung