Abstract: A micro light-emitting display apparatus and a method of manufacturing the same are disclosed The micro light-emitting display apparatus includes a first semiconductor layer, an isolation structure provided on the first semiconductor layer and configured to define a plurality of sub-pixels each configured to emit light, a first light-emitting unit including a first active layer provided in a first sub-pixel among the plurality of sub-pixels, and a second semiconductor layer provided on the first active layer, and a second light-emitting unit including a rod semiconductor layer provided in a second sub-pixel among the plurality of sub-pixels, a second active layer provided on the rod semiconductor layer, and a third semiconductor layer provided on the second active layer. The first active layer is configured to emit blue light and the second active layer is configured to emit green light.

Abstract: In one general aspect, an apparatus can include a semiconductor component, a substrate including a recess, and a conductive-bonding component. The conductive-bonding component is disposed between the semiconductor component and the substrate. The conductive-bonding component has a first thickness between a bottom of the recess and a bottom surface of the semiconductor component greater than a second thickness between the top of the substrate and the bottom surface of the semiconductor component.

Abstract: An optoelectronic device including a support, at least a first conductive layer covering the support, display pixels including first and second opposite surfaces, bonded to the first conductive layer, each pixel including an electronic circuit including the first surface and a third surface opposite to the first surface, the first surface being bonded to the first conductive layer, and an optoelectronic circuit bonded to the third surface and including at least two light-emitting diodes, at least one of the electrodes of each light-emitting diode being connected to the electronic circuit by the third surface, the optoelectronic circuit further comprising photoluminescent blocks covering the light-emitting diodes and conductive or semiconductor walls surrounding the photoluminescent blocks, and at least one second conductive layer electrically coupled to at least one of the pixels.

Abstract: A display panel and a display device are provided by the present disclosure, wherein the display panel includes a pixel region having a plurality of pixels. The pixel region includes a first area and a second area, wherein the transmittance of the second area is greater than the transmittance of the first area. The second area has a coverage, and a width of the coverage is not less than 0.43 millimeters.

Abstract: Light-emitting diodes having radiative recombination regions with deep sub-micron dimensions are described. The LEDs can be fabricated from indirect bandgap semiconductors and operated under forward bias conditions to produce intense light output from the indirect bandgap material. The light output per unit emission area can be over 500 W cm?2, exceeding the performance of even high brightness gallium nitride LEDs.

Abstract: A semiconductor device includes a substrate, a main circuit disposed over a front surface of the substrate, and a backside power delivery circuit disposed over a back surface of the substrate. The backside power delivery circuit includes a first main power supply wiring for supplying a first voltage, a second main power supply wiring for supplying a second voltage, a first local power supply wiring, and a first switch coupled to the first main power supply wiring and the first local power supply wiring. The first main power supply wiring, the second main power supply wiring and the first local power supply wiring are embedded in a first back side insulating layer disposed over the back surface of the substrate. The first local power supply wiring is coupled to the main circuit via a first through-silicon via (TSV) passing through the substrate for supplying the first voltage.

Abstract: First, an offset spacer including a stacked film of insulating films is formed on the upper surface of the semiconductor layer, the side surface of the gate electrode, and the side surface of the cap film. Next, a part of the insulating films is removed to expose the upper surface of the semiconductor layer. Next, in a state where the side surface of the gate electrode is covered with the insulating films, an epitaxial layer is formed on the exposed upper surface of the semiconductor layer. Here, among the offset spacers, the insulating film which is a silicon nitride film is formed at a position closest to the gate electrode, and the position of the upper end of the insulating film formed on the side surface of the gate electrode is higher than the position of the upper surface of the gate electrode.

Abstract: In order to provide a conductive heat radiation film that can stabilize the shape, a conductive heat radiation film 30 includes: a first heated film 28 including a plurality of first metal particles 27b; and a plurality of carbon nanotubes 24 including tips 24a adhered to the first heated film 28.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC includes a first dielectric structure having first inner sidewalls over an interlayer dielectric (ILD) structure. A second dielectric structure is over the first dielectric structure, where the first inner sidewalls are between second inner sidewalls of the second dielectric structure. A sidewall barrier structure is over the first dielectric structure and extends vertically along the second inner sidewalls. A lower bumping structure is between the second inner sidewalls and extends vertically along the first inner sidewalls and vertically along third inner sidewalls of the sidewall barrier structure. An upper bumping structure is over both the lower bumping structure and the sidewall barrier structure and between the second inner sidewalls, where an uppermost point of the upper bumping structure is at or below an uppermost point of the second dielectric structure.

Abstract: A method for manufacturing reflective structure is provided. The method includes the operations as follows. A metallization structure is received. A plurality of conductive pads are formed over the metallization structure. A plurality of dielectric stacks are formed over the conductive pads, respectively, wherein the thicknesses of the dielectric stacks are different. The dielectric stacks are isolated by forming a plurality of trenches over a plurality of intervals between each two adjacent dielectric stacks.

Abstract: A display device including a substrate; a sealing member surrounding a part of a transmission area of the substrate; a plurality of pixels in a display area of the substrate; an encapsulation substrate facing the substrate with the sealing member between the encapsulation substrate and the substrate; a transparent material layer between the substrate and the encapsulation substrate and corresponding to the transmission area; and a light-shielding portion on the encapsulation substrate and corresponding to the sealing member. A width of the light-shielding portion is greater than a width of the sealing member.

Abstract: A light emitting device including a plurality of pixels is provided by the present disclosure. Each of the plurality of pixels includes at least two light emitting diodes, and the at least two light emitting didoes are electrically connected with each other in series, wherein the at least two light emitting diodes have peak external quantum efficiencies under different currents.

Abstract: A heterojunction bipolar transistor includes a collector layer, a base layer, and an emitter layer that are stacked on a substrate. The collector layer includes a graded semiconductor layer in which an electron affinity increases from a side closer to the base layer toward a side farther from the base layer. An electron affinity of the base layer at an interface closer to the collector layer is equal to an electron affinity of the graded semiconductor layer at an interface closer to the base layer.

Abstract: A flash LED package includes a substrate; a flash LED device in a first region of an upper surface of the substrate, and including first to fourth LED light sources that emit white light, blue light, green light, and red light, respectively; an optical sensor in a second region of the upper surface of the substrate, and having a light receiving region that detects a correlated color temperature; and a lens cover on the substrate to cover the flash LED device and the optical sensor, and having a lens unit in a region overlapping the first to fourth LED light sources.

Abstract: A semiconductor light-emitting device has an emitter matrix with an arrangement of emitter cells interspersed with non-emitter cells. The emitter cell has a semiconductor emitter, and a non-emitter cell does not have a semiconductor emitter. A number of bond pads for connection to a power supply and a plurality of wirebonds are present. Each wirebond extends from a bond pad to the semiconductor emitter of an emitter cell. An imaging arrangement includes a light source for illuminating a scene. The light source has a pair of such semiconductor light-emitting devices. A method of manufacturing such a semiconductor light-emitting device is also described.

Abstract: An organic light-emitting display apparatus including: a substrate; a pixel electrode located on the substrate; a pixel-defining film covering an end portion of the pixel electrode; an intermediate layer located on the pixel electrode and including an emission layer; a counter electrode located on the intermediate layer; a passivation layer located on the counter electrode and including a cover portion covering a top surface of the counter electrode and a protrusion extending from an end portion of the cover portion away from the substrate; and an encapsulation member covering the passivation layer.

Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first conductor, a second conductor over the first conductor, a first insulator covering the second conductor, a first oxide over the first insulator, and a second oxide over the first oxide, an opening overlapping with at least part of the first conductor is provided in the first oxide and the first insulator, and the second oxide is electrically connected to the first conductor through the opening.

Abstract: A semiconductor device includes a first conductivity type semiconductor layer having a first surface and a second surface opposite to the first surface and having an element portion formed in the first surface and an outer peripheral portion surrounding the element portion, a semiconductor element structure formed in the element portion, multiple guard ring trenches formed in the outer peripheral portion and each formed in the first surface of the semiconductor layer, and a second conductivity type outer peripheral portion impurity region formed in the outer peripheral portion, in which the multiple guard ring trenches include a first unit consisting of multiple guard ring trenches and a second unit consisting of multiple guard ring trenches arranged on the outside of the semiconductor layer relative to the multiple guard ring trenches belonging to the first unit, and in which the outer peripheral portion impurity region includes a first portion arranged below the multiple guard ring trenches belonging to the

Abstract: A method for producing an optoelectronic component and an optoelectronic component are disclosed. In an embodiment a method includes providing a semiconductor chip having an active region for radiation emission, applying a seed layer on the semiconductor chip, wherein the seed layer includes a first metal and a second metal being different from the first metal, and wherein the second metal is less noble than the first metal, applying a structured photoresist layer directly to the seed layer, applying a solder layer at least to regions of the seed layer which are not covered by the photoresist layer and wherein a proportion of the second metal in the seed layer is between 0.5 wt % and 10 wt %.

Abstract: An optoelectronic device manufacturing method including the steps of: a) forming an active diode stack including first and second of opposite conductivity types; b) forming an integrated control circuit including a plurality of elementary control cells each including at least one MOS transistor; c) after steps a) and b), transferring the integrated control circuit onto the upper surface of the active diode stack; and d) after step c), forming trenches extending vertically through the integrated control circuit and emerging into or onto the first layer and delimiting a plurality of pixels each including a diode and an elementary control cell.