Patents Examined by Robert M Kunemund
  • Patent number: 10971354
    Abstract: Methods of drying a semiconductor substrate may include applying a drying agent to a semiconductor substrate, where the drying agent wets the semiconductor substrate. The methods may include heating a chamber housing the semiconductor substrate to a temperature above an atmospheric pressure boiling point of the drying agent until a vapor-liquid equilibrium of the drying agent within the chamber has been reached. The methods may further include venting the chamber, where the venting vaporizes the liquid phase of the drying agent from the semiconductor substrate.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: April 6, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Eric J. Bergman, John L. Klocke, Paul McHugh, Stuart Crane, Richard W. Plavidal
  • Patent number: 10968535
    Abstract: A method for a SiC single crystal that allow prolonged growth to be achieved are provided. A method for producing a SiC single crystal in which a seed crystal substrate held on a seed crystal holding shaft is contacted with a Si—C solution having a temperature gradient such that a temperature of the Si—C solution decreases from an interior of the Si—C solution toward a liquid level of the Si—C solution, in a graphite crucible, to grow a SiC single crystal, wherein the method comprises the steps of: electromagnetic stirring of the Si—C solution with an induction coil to produce a flow, and heating of a lower part of the graphite crucible with a resistance heater.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: April 6, 2021
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Masayoshi Doi, Hironori Daikoku, Motohisa Kado, Tomohiro Sato, Kazuaki Seki, Kazuhiko Kusunoki, Yutaka Kishida
  • Patent number: 10968389
    Abstract: A method of treating a substrate comprises applying an electric field to a substrate comprising a layer of a dopant on at least one surface; applying a predetermined temperature to the substrate in the electric field; applying the electric field and the predetermined temperature for a time sufficient to induce migration of the dopant into the substrate to provide a doped substrate; and removing the electric field and returning the doped substrate to about room temperature, wherein the doped substrate is characterized in that a spectral laser output of the doped substrate exhibits a nominally single frequency having a linewidth less than about 5 nm. The substrate may be a glass material, a single crystal material, a poly-crystalline material, a ceramic material, or a semiconductor material, which may be optically transparent. Before treatment, the substrate may be an undoped substrate or a doped substrate.
    Type: Grant
    Filed: May 2, 2018
    Date of Patent: April 6, 2021
    Assignee: United States of America as represented by the Secretary of the Air Force
    Inventors: Gary Cook, Ronald W. Stites
  • Patent number: 10968534
    Abstract: The present invention relates to a pulling control device for growing a single crystal ingot capable of controlling an eccentricity of a single crystal ingot by varying a seed rotation number in real time, and a pulling control method applied thereto. According to the present invention, a pulling control device for growing a single crystal ingot and a pulling control method applied thereto may minimize that a seed rotation number (f) is set to a specific rotation number (fo) causing a resonance phenomenon of a melt by providing a target seed output rotation number (T_fout) that varies in real time so as to match a rotation form for each length of an ingot according to inputting a target seed input rotation number (T_fin) and controlling a rotation number (f) of a seed cable, and it is possible to prevent fluctuation of the melt and an eccentricity phenomenon of the ingot.
    Type: Grant
    Filed: January 9, 2019
    Date of Patent: April 6, 2021
    Inventor: Hyun Woo Park
  • Patent number: 10961619
    Abstract: The present invention provides a novel method for producing a GaN crystal, the method including growing GaN from vapor phase on a semi-polar or non-polar GaN surface using GaCl3 and NH3 as raw materials. Provided herein is an invention of a method for producing a GaN crystal, including the steps of: (i) preparing a GaN seed crystal having a non-polar or semi-polar surface whose normal direction forms an angle of 85° or more and less than 170° with a [0001] direction of the GaN seed crystal; and (ii) growing GaN from vapor phase on a surface including the non-polar or semi-polar surface of the GaN seed crystal using GaCl3 and NH3 as raw materials.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: March 30, 2021
    Assignees: MITSUBISHI CHEMICAL CORPORATION, NATIONAL UNIVERSITY CORPORATION TOKYO UNIVERSITY OF AGRICULTURE AND TECHNOLOGY
    Inventors: Kenji Iso, Akinori Koukitu, Hisashi Murakami
  • Patent number: 10954606
    Abstract: Methods for forming single crystal silicon ingots in which plural sample rods are grown from the melt are disclosed. A parameter related to the impurity concentration of the melt or ingot is measured. In some embodiments, the sample rods each have a diameter less than the diameter of the product ingot.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: March 23, 2021
    Assignee: GlobalWafers CO., Ltd.
    Inventors: Carissima Marie Hudson, JaeWoo Ryu
  • Patent number: 10957564
    Abstract: A self-calibration apparatus and method for a real-time temperature measurement system of a MOCVD device belong to the technical field of semiconductor manufacturing. The apparatus comprises a MOCVD reactor chamber (1) and an optical detector (6). The MOCVD reactor chamber (1) comprises an epitaxial wafer (4). A detection window (5) is provided on the top of the MOCVD reactor chamber (1). The optical detector (6) emits detection light beams whose wavelengths are respectively ?1 and ?2 toward the epitaxial wafer (4) through the detection window (5). The detection light beams are reflected by the epitaxial wafer (4) to form reflected light beams which are detected by the optical detector (6). In the method, points corresponding to the actual thermal radiation ratios are depicted on the theoretical thermal radiation ratio-temperature curve according to actual thermal radiation ratios, and values of the temperatures T corresponding to the points are substituted into formulas to obtain m1 and m2 respectively.
    Type: Grant
    Filed: August 19, 2014
    Date of Patent: March 23, 2021
    Assignee: AK OPTICS TECHNOLOGY CO., LTD.
    Inventors: Chengmin Li, Dong Yan, Linzi Wang, Jianpeng Liu, Hongda Jiao, Tang Zhang, Xiaochao Ma
  • Patent number: 10947642
    Abstract: The present invention relates to single crystalline Cs2U4O12, hydrothermal growth processes of making such single crystals and methods of using such single crystals. In particular, Applicants disclose single crystalline Cs2U4O12 having a P21/c structure and a process of making and using same. Unlike other single crystalline Cs2U4O12 structures the P21/c structure has a different set of atomic coordinates which gives a different framework which in turn provides the altered performance of such single crystals.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: March 16, 2021
    Assignee: United States of America as represented by the Secretary of the Air Force
    Inventors: Thomas A. Bowen, Eric J. Plummer, James M. Mann
  • Patent number: 10950467
    Abstract: The mechanism includes a pipe and a valve provided in the pipe. The pipe is configured to connect a gas source and a semiconductor manufacturing apparatus. The valve is configured to control a flow rate of the gas. The valve includes a housing and a columnar shaft. The housing includes an inlet and an outlet. A gas flows from the gas source into the internal space through the inlet. A gas flows from the internal space to the semiconductor manufacturing apparatus through the outlet. A gap is provided between an outer peripheral surface of the shaft and an inner wall surface of the housing. The shaft is accommodated in the internal space of the housing and is rotatable. A through hole which penetrates the shaft is formed on the outer peripheral surface of the shaft. Both ends of the through hole correspond to the inlet and the outlet.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: March 16, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yuki Hosaka, Yoshihiro Umezawa, Toshiki Nakajima, Mayo Uda, Kenichi Shimono
  • Patent number: 10942095
    Abstract: Microfluidic devices and methods for investigating crystallization and/or for controlling a reaction or a phase transition are disclosed. In one embodiment, the microfluidic device includes a reservoir layer; a membrane disposed on the reservoir layer; a wetting control layer disposed on the membrane; and a storage layer disposed on the wetting control layer, wherein the wetting control layer and the storage layer define a microfluidic channel comprising an upstream portion, a downstream portion, a first fluid path in communication with the upstream and the downstream portions, and a storage well positioned within the first fluid path, wherein the wetting control layer includes a fluid passageway in communication with the storage well and the membrane, and wherein the wetting control layer wets a first fluid introduced into the microfluidic channel, the first fluid comprising a hydrophilic, lipophilic, fluorophilic or gas phase as the continuous phase in the microfluidic channel.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: March 9, 2021
    Assignee: Brandeis University
    Inventors: Seth Fraden, Michael Heymann, Markus Ludwig
  • Patent number: 10935510
    Abstract: Provided is a method of measuring a carbon concentration of a silicon sample, the method including introducing hydrogen atoms into a measurement-target silicon sample; subjecting the measurement-target silicon sample into which hydrogen atoms have been introduced to evaluation by an evaluation method of evaluating a trap level in a silicon band gap, without an electron beam irradiation treatment; and determining the carbon concentration of the measurement-target silicon sample on the basis of an evaluation result at least one trap level selected from the group consisting of Ec-0.10 eV, Ec-0.13 eV and Ec-0.15 eV, among the evaluation results obtained by the evaluation, wherein the determined carbon concentration is lower than 1.0E+16 atoms/cm3.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: March 2, 2021
    Assignee: SUMCO CORPORATION
    Inventors: Kazutaka Eriguchi, Shuichi Samata, Noritomo Mitsugi, Ayumi Masada
  • Patent number: 10927476
    Abstract: A production method for a group III nitride crystal, the production method includes: preparing a plurality of group III nitride pieces as a plurality of seed crystals on a substrate, and growing a group III nitride crystal by bringing a surface of each of the seed crystals into contact with a melt that comprises at least one group III element selected from gallium, aluminum, and indium, and an alkali metal in an atmosphere comprising nitrogen, and thereby reacting the group III element and the nitrogen in the melt, wherein the step of growing a group III nitride crystal includes: growing a plurality of first group III nitride crystals whose cross-sections each have a triangular shape or a trapezoidal shape, from the plurality of seed crystals; and growing second group III nitride crystals each in a gap among the plurality of first group III nitride crystals.
    Type: Grant
    Filed: January 9, 2019
    Date of Patent: February 23, 2021
    Assignees: OSAKA UNIVERSITY, PANASONIC CORPORATION
    Inventors: Yusuke Mori, Masayuki Imanishi, Masashi Yoshimura, Kousuke Murakami, Yoshio Okayama
  • Patent number: 10930540
    Abstract: Embodiments include an electrostatic chuck assembly having an electrostatic chuck mounted on an insulator. The electrostatic chuck and insulator may be within a chamber volume of a process chamber. In an embodiment, a ground shield surrounds the electrostatic chuck and the insulator, and a gap between the ground shield and the electrostatic chuck provides an environment at risk for electric field emission. A dielectric filler can be placed within the gap to reduce a likelihood of electric field emission. The dielectric filler can have a flexible outer surface that covers or attaches to the electrostatic chuck, or an interface between the electrostatic chuck and the insulator Other embodiments are also described and claimed.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: February 23, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Kartik Ramaswamy, Anwar Husain, Haitao Wang, Evans Yip Lee, Jaeyong Cho, Hamid Noorbakhsh, Kenny L. Doan, Sergio Fukuda Shoji, Chunlei Zhang
  • Patent number: 10920339
    Abstract: A pulling condition calculation program enables a computer to perform the steps of: setting a plurality of sets of pulling conditions based on solid-liquid interface height and distance between a surface of a silicon melt and a heat shield plate; performing, for each set of the pulling conditions, the steps of: calculating a heat flux (q) (W/m2) and a crystal surface temperature (T); defining a reference temperature (Tref) given by an equation (1) below and a geometry of the solid-liquid interface as boundary conditions, recalculating an in-crystal temperature distribution; calculating a mean stress in the monocrystalline silicon; calculating a defect distribution in a pulling direction based on the mean stress and the in-crystal temperature distribution; determining a defect-free region in the pulling direction; and drawing a contour line showing a dimension of the defect-free region on a two-dimensional map defined by the distance and the solid-liquid interface height.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: February 16, 2021
    Assignee: SUMCO CORPORATION
    Inventor: Ryota Suewaka
  • Patent number: 10920338
    Abstract: The present invention provides a driving unit measuring apparatus, the apparatus including: a crucible support for supporting a crucible; a pulling unit for elevating or rotating a seed at an upper portion of the crucible; a crucible driving unit for rotating or elevating the crucible support; a flat nut detachably coupled to the pulling unit; a crucible shaft inspection jig detachably coupled to the crucible driving unit; and a displacement measuring unit coupled to the flat nut and the crucible shaft inspection jig and measuring at least one of elevation and rotational displacement of the pulling unit and the crucible driving unit.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: February 16, 2021
    Assignee: SK SILTRON CO., LTD.
    Inventor: Woo Tae Kim
  • Patent number: 10916421
    Abstract: A method for manufacturing an epitaxial silicon wafer enables to lower carbon concentration in an epitaxial film. The method forming an epitaxial silicon wafer where an epitaxial film is formed on a silicon wafer in a reaction chamber including a wafer-holding susceptor that separates an upper and lower space communicating through a predetermined gap includes steps of forming a flow of a processing gas flowing laterally along an upper surface of the wafer in the upper space and a flow of a main purging gas flowing towards the susceptor upwardly in the lower space being formed simultaneously, setting a flow rate ratio of the main purging gas flow rate to the processing gas flow rate to be 1.0/100 to 1.5/100 where the processing gas flow rate is set as 100, and controlling a pressure in the upper space to be within an atmospheric pressure ±0.2 kPa at least.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: February 9, 2021
    Assignee: GLOBALWAFERS JAPAN CO., LTD.
    Inventors: Jun Yamamoto, Shinya Matsuda
  • Patent number: 10916424
    Abstract: A method for forming a semiconductor device comprising a graded wurtzite III-nitride alloy layer, including a wurtzite III-nitride alloy, on a second layer. A polarization doping concentration profile is selected for the graded wurtzite III-nitride alloy layer based on an intended function of the semiconductor device. Based on the selected polarization doping concentration profile for the graded wurtzite III-nitride alloy layer, a composition-polarization change rate of the graded wurtzite III-nitride alloy layer and a grading speed of the graded wurtzite III-nitride alloy layer are determined. The composition-polarization change rate and grading speed are based on a composition of first and second elements of the wurtzite III-nitride alloy.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: February 9, 2021
    Assignee: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Xiaohang Li, Kaikai Liu
  • Patent number: 10914021
    Abstract: The present invention provides polycrystalline silicon suitably used as a raw material for producing single crystal silicon. The polycrystalline silicon rod of the present invention is a polycrystalline silicon rod grown by chemical vapor deposition performed under a pressure of 0.3 MPaG or more, wherein when a plate-shaped sample piece collected from an arbitrary portion of the polycrystalline silicon rod is observed with a microscope with a temperature increased from a temperature lower than a melting point of silicon up to a temperature exceeding the melting point of silicon, a heterogeneous crystal region, which is a crystal region including a plurality of crystal grains heterogeneously assembled and including no needle-like crystal, having a diameter exceeding 10 ?m is not observed.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: February 9, 2021
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Shuichi Miyao, Masahiko Ishida, Naruhiro Hoshino, Shigeyoshi Netsu
  • Patent number: 10907272
    Abstract: The present invention provides a method including: a temperature raising step of raising a temperature in a crystal growing furnace with a silicon carbide raw material and a silicon carbide seed crystal arranged therein to a crystal growing temperature; a single crystal growing step of maintaining the crystal growing temperature and causing a silicon carbide single crystal to grow on the silicon carbide seed crystal; and a temperature lowering step of lowering the temperature in the crystal growing furnace from the crystal growing temperature to stop growth of the silicon carbide single crystal, in which the method further comprises, between the single crystal growing step and the temperature lowering step, a temperature lowering preparation step of maintaining the temperature in the crystal growing furnace at the crystal growing temperature and causing concentration of nitrogen gas in the crystal growing furnace to increase to be higher than concentration of nitrogen gas in the temperature raising step and i
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: February 2, 2021
    Assignee: SHOWA DENKO K.K.
    Inventor: Yohei Fujikawa
  • Patent number: 10907273
    Abstract: A method of growing epitaxial 3C-SiC on single-crystal silicon is disclosed. The method comprises providing a single-crystal silicon substrate in a cold-wall chemical vapour deposition reactor, heating the substrate to a temperature equal to or greater than 700° C. and equal to or less than 1200° C., introducing a gas mixture into the reactor while the substrate is at the temperature, the gas mixture comprising a silicon source precursor, a carbon source precursor and a carrier gas so as to deposit an epitaxial layer of 3C-SiC on the single-crystal silicon.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: February 2, 2021
    Inventors: Maksym Myronov, Gerard Colston, Stephen Rhead