Patents Examined by Roberts Culbert
  • Patent number: 9493679
    Abstract: Provided is a method of manufacturing an abrasive particle including a mother particle and a plurality of auxiliary particles formed on a surface of the mother particle, and a method of manufacturing a polishing slurry in which the abrasive particle is mixed with a polishing accelerating agent and a pH adjusting agent.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: November 15, 2016
    Assignee: INDUSTRIAL BANK OF KOREA
    Inventor: Seung Won Jung
  • Patent number: 9481773
    Abstract: (Semi-)continuous etching method for a fluoropolymer substrate (10) comprising steps of feeding (22) said substrate (10) in the form of a continuous ribbon wherein said substrate defines a primary surface (12), subjecting to at least one etching operations (2) a part of the primary surface (12) by means of an adhesion-promoting solution comprising a complex of an alkali metal in naphthalene, washing (4) the primary surface (12) wetted by the adhesion-promoting solution by means of a washing solution (42) comprising aqueous acetic acid/formic acid, and selectively separating a concentrated solution (24) of acetic acid/formic acid from the washing solution (42) by means of inverse osmosis operations (6, 8) at ? increasing pressures, and re-introducing at least a portion of the concentrated solution (24) of acetic acid/formic acid in the washing solution (42) to create a recirculation. The invention further relates to an etching plant.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: November 1, 2016
    Assignee: GUARNIFLON S.P.A.
    Inventors: Massimo Villano, Pasquale Stella
  • Patent number: 9478431
    Abstract: The present disclosure provides a method of manufacturing an integrated circuit device in some embodiments. In the method, a semiconductor substrate is processed through a series of operations to form a topographically variable surface over the semiconductor substrate. The topographically variable surface varies in height across the semiconductor substrate. A polymeric bottom anti-reflective coating (BARC) is provided over the topographically variable surface. Chemical mechanical polishing is performed to remove a first portion of the BARC, and etching effectuates a top-down recessing of the BARC.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: October 25, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Kuei Liu, Teng-Chun Tsai, Kuo-Yin Lin, Shen-Nan Lee, Yu-Wei Chou, Kuo-Cheng Lien, Chang-Sheng Lin, Chih-Chang Hung, Yung-Cheng Lu
  • Patent number: 9478433
    Abstract: Embodiments described herein relate to methods for patterning a substrate. Patterning processes, such as double patterning and quadruple patterning processes, may benefit from the embodiments described herein which include performing an inert plasma treatment on a spacer material, performing an etching process on a treated region of the spacer material, and repeating the inert plasma treatment and the etching process to form a desired spacer profile. The inert plasma treatment process may be a biased process and the etching process may be an unbiased process. Various processing parameters, such as process gas ratios and pressures, may be controlled to influence a desired spacer profile.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: October 25, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Qingjun Zhou, Jungmin Ko, Tom Choi, Sean Kang, Jeremiah Pender, Srinivas D. Nemani, Ying Zhang
  • Patent number: 9472414
    Abstract: Embodiments of the present disclosure are a method of forming a semiconductor device and methods of patterning a semiconductor device. An embodiment is a method of forming a semiconductor device, the method including pattering a mandrel layer disposed over a semiconductor device layer to form a mandrel, forming a first set of spacers on sidewalls of the mandrel using a first material, selectively removing the mandrel disposed between the first set of spacers. The method further includes after removing the mandrel, using the first set of spacers as a first set of mandrels, forming a second set of spacers on sidewalls of the first set of mandrels using a second material, the second material having a different etch selectivity from the etch selectivity of the first material, the second set of spacers have substantially flat top surfaces, and selectively removing the first set of mandrels disposed between the second set of spacers.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: October 18, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chan Syun David Yang, Chao-Cheng Chen, Chien-Hao Chen, Chun-Hung Lee, De-Fang Chen
  • Patent number: 9470824
    Abstract: A manufacture method for a blazed concave grating is provided, including: replicating a blazed concave grating by means of a replication process, after the replication is completed, conducting heat preservation and cooling, then separating two gratings (G1, G2) by using different pulling manners respectively, and finally splicing the replicated and separated concave grating blanks, to obtain a required blazed concave grating. This manufacture method can solve the problem of a big error in an existing replication method for a blazed concave grating.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: October 18, 2016
    Assignee: Graduate School at Shenzhen, Tsinghua University
    Inventors: Qian Zhou, Kai Ni, Rui Tian, Yang Li, Mingfei Xu, Jinchao Zhang, Jinchao Pang, Hao Dong
  • Patent number: 9472412
    Abstract: Methods of conditioning interior processing chamber walls of an etch chamber are described. A fluorine-containing precursor may be remotely or locally excited in a plasma to treat the interior chamber walls periodically on a preventative maintenance schedule. The treated walls promote an even etch rate when used to perform gas-phase etching of silicon regions following conditioning. Alternatively, a hydrogen-containing precursor may be remotely or locally excited in a plasma to treat the interior chamber walls in embodiments. Regions of exposed silicon may then be etched with more reproducible etch rates from wafer-to-wafer. The silicon etch may be performed using plasma effluents formed from a remotely excited fluorine-containing precursor.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: October 18, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Jingchun Zhang, Hanshen Zhang
  • Patent number: 9466507
    Abstract: An etching method includes a modification process of supplying a mixture gas to a surface of a silicon oxide film, modifying the silicon oxide film to generate a reaction product, and a heating process of heating and removing the reaction product. The modification process includes a first modification process of supplying the mixture gas containing a gas including a halogen element and an alkaline gas to the surface of the silicon oxide film, and a second modification process of stopping supplying the alkaline gas and supplying the mixture gas containing the gas including the halogen element to the surface of the silicon oxide film.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: October 11, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Shigeki Tozawa, Tomoaki Ogiwara
  • Patent number: 9466466
    Abstract: Methods, systems, and computer programs are presented for optimizing Critical Dimension Uniformity (CDU) during the processing of a substrate. One method includes identifying an operation of a recipe for processing a substrate within a chamber, the operation being configured to provide a pulsed radio frequency (RF) to the chamber. A plurality of tests are performed in the chamber for the operation utilizing the pulsed RF, each test having a duty cycle for the pulsed RF selected from a plurality of RF duty cycles. The method also includes for each test, measuring the critical dimension (CD) and the CDU for features in the substrate, and selecting a first duty cycle from the plurality of RF duty cycles based on the measured CDs and CDUs for the plurality of tests. The method also includes setting the selected first duty cycle in the operation of the recipe for processing the substrate.
    Type: Grant
    Filed: September 14, 2015
    Date of Patent: October 11, 2016
    Assignee: Lam Research Corporation
    Inventors: Qinghua Zhong, Ryan Martin, Ganesh Upadhyaya
  • Patent number: 9457573
    Abstract: A method of manufacturing a liquid ejection head includes forming a hole in an SOI substrate including a first silicon layer, a second silicon layer, and a silicon oxide layer interposed between the first and second silicon layers such that the hole extends through the first silicon layer and the silicon oxide layer to the second silicon layer, forming a first protective film on the first silicon layer and an inner wall of the hole, forming a water-repellent film on the first protective film, attaching a support substrate to part of the water-repellent film facing away from the first silicon layer, removing the second silicon layer to remove a bottom of the hole, removing part of the water-repellent film disposed on the inner wall of the hole, and releasing the support substrate from the water-repellent film.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: October 4, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yasuto Kodera, Toshio Suzuki
  • Patent number: 9455194
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first region and a second region defined thereon; forming a material layer on the substrate; forming a plurality of first mandrels on the material layer of the first region and the second region; forming first spacers adjacent to the first mandrels; forming a hard mask on the first region; trimming the first spacers on the second region; removing the first mandrels; using the first spacers to remove part of the material layer for forming a plurality of second mandrels; forming second spacers adjacent to the second mandrels; removing the second mandrels; and using the second spacers to remove part of the substrate for forming a plurality of fin-shaped structures.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: September 27, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Li-Wei Feng, Chien-Ting Lin, Shih-Hung Tsai, Ssu-I Fu, Hon-Huei Liu, Shih-Fang Hong, Chao-Hung Lin, Jyh-Shyang Jenq
  • Patent number: 9449838
    Abstract: In a semiconductor device manufacturing method, a target object including a multilayer film and a mask formed on the multilayer film is prepared in a processing chamber of a plasma processing apparatus. The multilayer film is formed by alternately stacking a silicon oxide film and a silicon nitride film. The multilayer film is etched by supplying a processing gas containing hydrogen gas, hydrogen bromide gas, nitrogen trifluoride gas and at least one of hydrocarbon gas, fluorohydrocarbon gas and fluorocarbon gas into the processing chamber of the plasma processing apparatus and generating a plasma of the processing gas in the processing chamber.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: September 20, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kazuto Ogawa, Kazuki Narishige, Takanori Sato
  • Patent number: 9447504
    Abstract: A process of patterning a conductive film. The process comprises providing a substrate comprising a conductive film positioned on a surface of the substrate. A hydrophilic primer layer is coated on the conductive film. Droplets of etchant are ejected from an inkjet printer in an imagewise pattern onto the primer layer to pattern the conductive film. The primer layer is removed from the substrate.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: September 20, 2016
    Assignee: XEROX CORPORATION
    Inventors: James R. Larson, Jeffrey J. Folkins, Chu-Heng Liu, Wayne A. Buchar, Mandakini Kanungo, Santokh Badesha
  • Patent number: 9443704
    Abstract: A stable etching process is realized at an earlier stage by specifying the combination of wavelength and time interval, which exhibits a minimum prediction error of etching processing result within a short period. For this, the combination of wavelength and time interval is generated from wavelength band of plasma emission generated upon etching of the specimen, the prediction error upon prediction of etching process result is calculated with respect to each combination of wavelength and time interval, the wavelength combination is specified based on the calculated prediction error, the prediction error is further calculated by changing the time interval with respect to the specified wavelength combination, and the combination of wavelength and time interval, which exhibits the minimum value of calculated prediction error is selected as the wavelength and the time interval used for predicting the etching processing process.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: September 13, 2016
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Ryoji Asakura, Kenji Tamaki, Akira Kagoshima, Daisuke Shiraishi
  • Patent number: 9422191
    Abstract: A method to prepare polymer woven fabric surface with selective oleophilicity or hydrophobicity and oil-oil separation and oil-water separation filter prepared by using the surface. The method to prepare the surface with selective oleophilicity or hydrophobicity includes steps comprising a step to form nano meter sized pores on the surface of the polymer woven fabric surface with micro sized pores through drying type etching; and a step to form selective oleophobic or hydrophobic film on the nano meter sized pores. It is possible to control hydrophobic/oleophobic property according to pore size, material or thickness of the film and this polymer surface with hybrid pores can be used in various areas such as an oil filter for car capable of selective separation of oil-oil mixture and water-oil mixture, disposal of waste oil, treatment of marine oil leakage, and pretreatment of crude oil refinement.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: August 23, 2016
    Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Heon Ju Lee, Myoung Woon Moon, Ji Hyun So, Eu Sun Yu, Tae Jun Ko, Seock Heon Lee, Do Hyun Kim, Kyu Hwan Oh
  • Patent number: 9417371
    Abstract: A manufacturing method of a reflective polarizer includes forming a metal layer on a first substrate; forming a mask layer divided into an opening area and a non-opening area on the metal layer, and having grooves patterned in the opening area, the groove exposing the metal layer; increasing hydrophobicity of a surface by treating the mask layer using a silane coupling agent; inducing phase separation of a hydrophilic component and a hydrophobic component of a block copolymer after filling the grooves of the mask layer with the block copolymer; selectively removing the hydrophilic component or the hydrophobic component block copolymer of the block copolymer; and etching the metal layer using the block copolymer as a mask.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: August 16, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Chang Ok Kim, Sung Hoon Yang
  • Patent number: 9416296
    Abstract: An under-layer composition of resist having superior thermal stability, etching resistance, gap-filling property and void-preventing property, and a method for forming pattern using the same are disclosed. The under-layer composition of resist comprises: an aromatic ring containing polymer having the repeating unit of the following Formula 1; a compound of the following Formula 4; and an organic solvent. in Formula 1, R1 is a monocyclic or polycyclic aromatic hydrocarbon group having 5 to 20 carbon atoms, R2 and R3 is independently a monocyclic or polycyclic aromatic hydrocarbon group having 4 to 14 carbon atoms, a is an integer of 1 to 3, and b is an integer of 0 to 2. in Formula 4, n is an integer of 1 to 250.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: August 16, 2016
    Assignee: DONGJIN SEMICHEM CO., LTD.
    Inventors: Jung-Youl Lee, Young Bae Lim, Jong-Won Kim, Jae Woo Lee, Jae Hyun Kim
  • Patent number: 9417531
    Abstract: The disclosure relates to a method of making a nano-pillar array on a substrate. A carbon nanotube composite structure is provided. The carbon nanotube composite structure defines a number of openings. The carbon nanotube composite structure is placed on the substrate. The substrate is dry etched to form a patterned surface by using the first surface using the carbon nanotube composite structure as a mask. The patterned surface includes a number of strip-shaped bulges crossed with each other. The carbon nanotube composite structure is removed. A photoresist layer is applied on the patterned surface. The photoresist layer is removed and some residual photoresist remains at intersections of the number of strip-shaped bulges. The substrate is further dry etched by using the residual photoresist as a mask.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: August 16, 2016
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Qun-Qing Li, Yuan-Hao Jin, Shou-Shan Fan
  • Patent number: 9406415
    Abstract: A method of manufacturing a transparent conductive film has the steps of: preparing a laminated body in which a transparent conductive layer that is not patterned is formed on a flexible transparent base, removing a part of the transparent conductive layer to form the pattern forming part having the transparent conductive layer on the flexible transparent base and the pattern opening part not having the transparent conductive layer on the flexible transparent base, and heating the laminated body in which the transparent conductive layer is patterned. The absolute value of the difference H1?H2 of the dimensional change rate H1 of the pattern forming part and the dimensional change rate H2 of the pattern opening part in the heat treatment step is preferably less than 0.03%.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: August 2, 2016
    Assignee: NITTO DENKO CORPORATION
    Inventors: Mari Tanabe, Hidehiko Andou, Hideo Sugawara
  • Patent number: 9405201
    Abstract: A method includes forming a patterned hard mask layer, with a trench formed in the patterned hard mask layer, dispensing a Bulk Co-Polymer (BCP) coating in the trench, wherein the BCP coating comprises a mix of a first material and a second material different from the first material. The method further includes treating the BCP coating with a chemical to form a first plurality of strips of the first material and a second plurality of strips of the second material, with the first plurality of strips and the second plurality of strips allocated in an alternating layout. The second plurality of strips is selectively etched, and the first plurality of strips is left in the trench.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: August 2, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Yu-Sheng Chang