Patents Examined by Rodney McDonald
  • Patent number: 6054024
    Abstract: There are provided a method which, in forming a transparent conductive film by sputtering on a semiconductor junction layer provided on a conductive substrate which bears at least the transparent conductive film thereon, comprises steps of electrically insulating the conductive substrate, and maintaining the self bias voltage Vself of the conductive substrate within a range of -50 V.ltoreq.Vself<0 V, and an apparatus therefor. There can also be reduced the damage to the semiconductor layer, induced by the cations such as Ar.sup.+. Thus there can be produced the photovoltaic elements of a high open-circuit voltage and a high photoelectric conversion efficiency in stable manner.
    Type: Grant
    Filed: September 10, 1997
    Date of Patent: April 25, 2000
    Assignee: Canon Kabushiki Kaisha
    Inventors: Noboru Toyama, Keishi Saito, Ryo Hayashi, Yukiko Iwasaki
  • Patent number: 6051114
    Abstract: The present invention provides a method and apparatus for preferential PVD conductor fill in an integrated circuit structure. The present invention utilizes a high density plasma for sputter deposition of a conductive layer on a patterned substrate, and a pulsed DC power source capacitively coupled to the substrate to generate an ion current at the surface of the substrate. The ion current prevents sticking of the deposited material to the field areas of the patterned substrate, or etches deposited material from the field areas to eliminate crowning or cusping problems associated with deposition of a conductive material in a trench, hole or via formed on the substrate.
    Type: Grant
    Filed: June 23, 1997
    Date of Patent: April 18, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Tse-Yong Yao, Zheng Xu, Kenny King-tai Ngan, Xing Chen, John Urbahn, Lawrence P. Bourget
  • Patent number: 6051121
    Abstract: Disclosed is PVD deposition chamber which is modified with an electrical circuit that allows a voltage bias to be applied to any one or more of a target, an in-process integrated circuit wafer, and collimator. The collimator can also be isolated from the electrical circuit. This configuration allows a preclean of the in-process integrated circuit wafer in situ in the PVD deposition chamber by ion sputtering and a subsequent sputter deposition through the collimator.A method is also disclosed wherein an in-process integrated circuit wafer is first precleaned in the PVD deposition chamber by applying a negative voltage bias to the in-process integrated circuit wafer. A film of conducting material is then sputter deposited on the surface of the in-process integrated circuit wafer by applying a negative voltage bias to the target. The collimator is electrically isolated during this process or is set at a higher potential than the in-process integrated circuit wafer.
    Type: Grant
    Filed: September 8, 1998
    Date of Patent: April 18, 2000
    Assignee: Micron Technology Inc
    Inventors: John H. Givens, Shane B. Leiphart
  • Patent number: 6051113
    Abstract: An apparatus and method for depositing plural layers of materials on a substrate within a single vacuum chamber allows high-throughput deposition of structures such as those for GMR and MRAM application. An indexing mechanism aligns a substrate with each of plural targets according to the sequence of the layers in the structure. Each target deposits material using a static physical-vapor deposition technique. A shutter can be interposed between a target and a substrate to block the deposition process for improved deposition control. The shutter can also preclean a target or the substrate and can also be used for mechanical chopping of the deposition process. In alternative embodiments, plural substrates may be aligned sequentially with plural targets to allow simultaneous deposition of plural structures within the single vacuum chamber.
    Type: Grant
    Filed: May 20, 1998
    Date of Patent: April 18, 2000
    Assignee: CVC Products, Inc.
    Inventor: Mehrdad M. Moslehi
  • Patent number: 6051122
    Abstract: A readily removable deposition shield assembly for processing chambers such as chemical vapor deposition (CVD), ion implantation, or physical vapor deposition (PVD) or sputtering chambers, is disclosed. The shield assembly includes a shield member which is mounted to the chamber for easy removal, such as by screws, and defines a space along the periphery of the substrate support. A shadow ring is inserted into the peripheral space and is thus mounted in removable fashion and is automatically centered about the substrate by an alignment ring. The alignment ring removably rests upon a flange extending from the outer periphery of an electrostatic chuck. The shadow ring overlaps the cylindrical shield member, the alignment ring and the peripheral edge of a substrate retained by the chuck. Collectively, these components prevent deposition on the chamber and hardware outside the processing region.
    Type: Grant
    Filed: August 21, 1997
    Date of Patent: April 18, 2000
    Assignee: Applied Materials, Inc.
    Inventor: Allen Flanigan
  • Patent number: 6045671
    Abstract: Methods and apparatus for the preparation of a substrate having an array of diverse materials in predefined regions thereon. A substrate having an array of diverse materials thereon is generally prepared by depositing components of target materials to predefined regions on the substrate, and, in some embodiments, simultaneously reacting the components to form at least two resulting materials. In particular, the present invention provides novel masking systems and methods for applying components of target materials onto a substrate in a combinatorial fashion, thus creating arrays of resulting materials that differ slightly in composition, stoichiometry, and/or thickness. Using the novel masking systems of the present invention, components can be delivered to each site in a uniform distribution, or in a gradient of stoichiometries, thicknesses, compositions, etc.
    Type: Grant
    Filed: April 22, 1997
    Date of Patent: April 4, 2000
    Assignee: Symyx Technologies, Inc.
    Inventors: Xin Di Wu, Youqi Wang, Isy Goldwasser
  • Patent number: 6045672
    Abstract: A sputtering apparatus with improved bottom coverage ratio, is used in a film depositing step for manufacturing a semiconductor integrated circuit or the like. In the apparatus, arcuate leakage lines of magnetic force emerge from a magnet mechanism which is part of a cathode, and the lines of magnetic force are ranged into a circumferential shape so as to set a plurality of circumferential magnetic fields on the surface of a target. The plurality of circumferential magnetic fields form a plurality of erosion regions having a circumferential shape, without the regions crossing each other. When the diameter of the deepest erosion portion is small, the incident angle of sputter particles can be made small without increasing the target-to-substrate distance.
    Type: Grant
    Filed: May 20, 1997
    Date of Patent: April 4, 2000
    Assignee: Anelva Corporation
    Inventors: Masahiko Kobayashi, Nobuyuki Takahashi
  • Patent number: 6039855
    Abstract: A frame (3, 4, 5, . . . 7) at least partially surrounds the target material (19), and serves to mount the target on the cathode backing plate (9), with a separating film or interlayer (20) of soft material disposed between the frame and the cathode backing plate. The frame (3, 4, 5, . . . 7) is provided with a plurality of projections (3a, 3b, . . . 4a, 4b, . . . 7a, 7b . . . ) affixed to the frame members (3, 4, 5, . . . 7) and extending into the target material in order to hold the target material (19) in the spaces (A, B, C) surrounded by the frame members. The target is preferably cast directly into the frame while the frame is fixed to a stainless steel plate, then removed together with the frame after cooling and mounted to the cathode plate.
    Type: Grant
    Filed: September 25, 1996
    Date of Patent: March 21, 2000
    Assignee: Leybold Materials GmbH
    Inventor: Norbert Wollenberg
  • Patent number: 6039854
    Abstract: A clamp for fixturing a substrate when forming and thermally processing upon the substrate a thermally flowable layer. The clamp comprises a backing member having a top member connected through a first mechanical means to the backing member. The backing member and the top member are sized such that a substrate may be clamped between the backing member and the top member. A portion of the top member overlaps the substrate and leaves exposed a first portion of the substrate when the substrate is clamped between the backing member and the top member. The clamp also comprises a shroud connected through a second mechanical means to the backing member, where a portion of the shroud overlaps the top member. The shroud leaves exposed a second portion of the substrate which is smaller than and contained within the first portion of the substrate. The shroud is removable from the backing member while the substrate remains clamped between the backing member and the top member.
    Type: Grant
    Filed: September 21, 1998
    Date of Patent: March 21, 2000
    Assignee: Vanguad International Semiconductor Corporation
    Inventor: David Liu
  • Patent number: 6036877
    Abstract: A general method of the invention is to provide a polymer-hardening precursor piece (such as silicon, carbon, silicon carbide or silicon nitride, but preferably silicon) within the reactor chamber during an etch process with a fluoro-carbon or fluoro-hydrocarbon gas, and to heat the polymer-hardening precursor piece above the polymerization temperature sufficiently to achieve a desired increase in oxide-to-silicon etch selectivity. Generally, this polymer-hardening precursor or silicon piece may be an integral part of the reactor chamber walls and/or ceiling or a separate, expendable and quickly removable piece, and the heating/cooling apparatus may be of any suitable type including apparatus which conductively or remotely heats the silicon piece.
    Type: Grant
    Filed: May 13, 1996
    Date of Patent: March 14, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Kenneth S. Collins, Michael Rice, David W. Groechel, Gerald Zheyao Yin, Jon Mohn, Craig A. Roderick, Douglas Buchberger, Chan-Lon Yang, Yuen-Kui Wong, Jeffrey Marks, Peter Keswick
  • Patent number: 6036828
    Abstract: An apparatus for applying material by cathodic arc vapor deposition to a substrate is provided which includes a vessel, apparatus for maintaining a vacuum in the vessel, a disk-shaped cathode, apparatus for selectively sustaining an arc of electrical energy between the cathode and an anode, and apparatus for steering the arc around the cathode. The arc of electrical energy extending between the cathode and the anode liberates a portion of the cathode which is subsequently deposited on the substrate located inside the vessel.
    Type: Grant
    Filed: August 30, 1997
    Date of Patent: March 14, 2000
    Assignee: United Technologies Corporation
    Inventors: Russell A. Beers, Tyrus E. Royal
  • Patent number: 6033536
    Abstract: A magnetron sputtering method using a sputtering target consisting of a material having a maximum relative magnetic permeability of 50 or more or consisting of a soft magnetic material which contains two or more phases selected from the group consisting of an M--X alloy phase, an M phase, and an X phase in that at least the simple substance phase consisting of an element having a smaller atomic weight of M and X is included, with the proviso that M.noteq.X, M is at least one element selected from the group consisting of Fe, Co and Ni, and X is at least one element selected from the group consisting of Fe, Al, Si, Ta, Zr, Nb, Hf and Ti.
    Type: Grant
    Filed: March 8, 1996
    Date of Patent: March 7, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsutaro Ichihara, Kohichi Tateyama, Ryo Sakai, Takashi Ishigami
  • Patent number: 6030514
    Abstract: A target for sputtering is subjected to a surface treatment process and special packaging after target manufacture for improved sputtering performance and process and yield by reducing particulates. The sputtering target is first surface treated to remove oxides, impurities and contaminants. The surface treated target is then covered with a metallic enclosure and, optionally, a passivating barrier layer. The metallic enclosure protects the target surface from direct contact with subsequently employed packaging material such as plastic bags, thereby eliminating sources of organic materials during sputtering operations. The surface treatment of the target removes deformed material, smearing, twins, or burrs and the like from the target surface, reducing "burn-in" or sputter conditioning time prior to production sputtering of thin films.
    Type: Grant
    Filed: May 2, 1997
    Date of Patent: February 29, 2000
    Assignees: Sony Corporation, Materials Research Corporation
    Inventors: John A. Dunlop, Michael Goldstein, Gerald B. Feldewerth, Cari Shim, Stephan Schittny
  • Patent number: 6013162
    Abstract: A substrate which has been heated to a predetermined temperature by a heating unit during sputtering is transferred into an unload-lock chamber having a vacuum pump system and a vent gas introducing system. The unload-lock chamber is provided with a cooling stage which makes surface contact with the substrate so as to forcedly cool the substrate to a predetermined temperature. The substrate is placed on the cooling stage and forcedly cooled. After the substrate is cooled to the predetermined temperature or lower, the vent gas introducing system is operated so that the interior of the unload-lock chamber is returned to the atmospheric pressure ambient. Since the substrate under a high temperature condition does not make contact with the atmospheric pressure ambient, film properties are prevented from being varied.
    Type: Grant
    Filed: May 21, 1997
    Date of Patent: January 11, 2000
    Assignee: Anelva Corporation
    Inventors: Masahiko Kobayashi, Nobuyuki Takahashi
  • Patent number: 5993617
    Abstract: A functional product having a transparent oxide layer and a silver layer alternately laminated on a transparent substrate in a total number of (2n+1) layers, where n.gtoreq.1, wherein an oxide film whose major component is an oxide containing tin and silicon, is formed on the outermost layer.
    Type: Grant
    Filed: November 12, 1997
    Date of Patent: November 30, 1999
    Assignee: Asahi Glass Company Ltd.
    Inventors: Eiichi Ando, Koichi Suzuki, Junichi Ebisawa, Susumu Suzuki, Hirokazu Seki
  • Patent number: 5980702
    Abstract: A sputtering apparatus includes a target that is sputtered to deposit a material layer on a substrate. A filtering member is disposed intermediate the substrate and target to prevent target material particles travelling perpendicular to the substrate from contacting the substrate. This filtering reduces the rate of deposition occurring on the surface of the substrate with respect to that occurring on the walls of any holes therein, and thereby increases the deposition layer forming on the wall of the hole with respect to that forming on the surface of the substrate and base of the hole.
    Type: Grant
    Filed: July 8, 1997
    Date of Patent: November 9, 1999
    Assignee: Applied Materials, Inc.
    Inventor: Norman William Parker
  • Patent number: 5417833
    Abstract: A magnetron sputter apparatus is disclosed which includes a rotatable generally heart-shaped, closed-loop magnet array behind the target and in front of a pair of separately driven stationary electromagnets. The apparatus is optimized to produce a sputtered film on a planar substrate having desired film characteristics such as uniformity of thickness, good step coverage, and good via filling and efficient utilization of the target. The shape of the generally heart-shaped array includes a flattened tip forming an arc of a circle centered on the axis of rotation and concave cusps in the lobes of the heart-shape. The electromagnets are used to increase target utilization at its center and to compensate for the change in shape of the target and distance from the target to the substrate with depletion.
    Type: Grant
    Filed: April 14, 1993
    Date of Patent: May 23, 1995
    Assignee: Varian Associates, Inc.
    Inventors: David J. Harra, Larry D. Hartsough
  • Patent number: 5378660
    Abstract: In the manufacture of high temperature deposited aluminum contacts onto silicon substrates wherein a barrier layer of titanium nitride is used, the improvement wherein the titanium nitride contains oxygen. The improved contacts are made by depositing a titanium-containing layer onto a silicon substrate, performing a first, high temperature nitrogen anneal in vacuum to form a low resistance TiSi.sub.x contact to the silicon, and performing a second, lower temperature anneal in vacuum using a mixture of nitrogen and oxygen to add oxygen to the titanium nitride layer. This oxygen-containing titanium nitride layer provides an improved barrier to a subsequently deposited high temperature deposited aluminum layer.
    Type: Grant
    Filed: February 12, 1993
    Date of Patent: January 3, 1995
    Assignee: Applied Materials, Inc.
    Inventors: Kenny K. Ngan, Edith Ong
  • Patent number: 5372848
    Abstract: A copper layer is coated onto an organic polymeric substrate in the presence of a gas containing nitrogen and a noble gas.
    Type: Grant
    Filed: December 24, 1992
    Date of Patent: December 13, 1994
    Assignee: International Business Machines Corporation
    Inventors: Kim J. Blackwell, Luis J. Matienzo, Allan R. Knoll
  • Patent number: 5370779
    Abstract: A plasma process utilizing an electron cyclotron resonance (ECR) phenomenon caused by generating a magnetic field either parallel or perpendicular to, or both parallel and perpendicular to, a microwave propagation direction, characterized in that an ion beam is made to converge by applying a pulse voltage to a rotating magnetic field, a pulse voltage is applied to deflection plates, and an accelerating pulse voltage is further applied to a plasma.
    Type: Grant
    Filed: September 24, 1993
    Date of Patent: December 6, 1994
    Assignees: Sakae Electronics Industrial Co., Ltd., Kazuo Ohba, Yoshinori Shima, Akira Ohba
    Inventors: Kazuo Ohba, Yoshinori Shima, Akira Ohba