Patents Examined by Ryan Bertram
  • Patent number: 12687963
    Abstract: Components of a distributed data object are synchronized using streamlined tracking metadata. A target component of the distributed data object is detected as it becomes available and stale. A source component that is up-to-date and that mirrors the address space of the detected target component is identified. A set of mapped address ranges and a set of unmapped address ranges of the identified source component are obtained. A mapped address range of the target component that corresponds with an unmapped address range of the source component is identified. The identified mapped address range of the target component is then synchronized with the corresponding unmapped address range of the source component. Thus, unmapped address ranges are synchronized without using tracking metadata of the source component.
    Type: Grant
    Filed: October 21, 2024
    Date of Patent: July 21, 2026
    Assignee: VMware LLC
    Inventors: Wenguang Wang, Eric Knauft, Sudheer Thokala
  • Patent number: 12681772
    Abstract: Systems and techniques for budget-based management of a cloud infrastructure are disclosed. A system monitors a cloud infrastructure for one or more trigger-action conditions associated with the cloud infrastructure. When a trigger-action condition is detected, the system determines a cloud infrastructure modification action that corresponds to the detected trigger condition. The system may apply the cloud infrastructure modification action to the cloud infrastructure. A cloud infrastructure modification action may modify one or more the workstation resources such that a rate of budget consumption is changed, for example, by pausing a resource, deleting a resource, resuming a paused resource, or changing from one resource to a different resource.
    Type: Grant
    Filed: May 26, 2023
    Date of Patent: July 14, 2026
    Assignee: Oracle International Corporation
    Inventors: Alison J. Derbenwick Miller, Pablo Selem, Sowmya Bali, Yang Jiao, Manoj Krishna Ghosh
  • Patent number: 12681642
    Abstract: Methods, systems, and devices for address mappings for random access operations are described. A portion of a L2P table may be loaded (e.g., to a buffer) upon receiving a write command (e.g., a random write command). In some instances, one or more entries (e.g., one or more mappings) included in the portion of the L2P table may be updated based on the write command. The portion of the L2P table may be maintained in the buffer during subsequent access operations, such as random read operations. The subsequent access operations may utilize the portion of the L2P table to access a memory device.
    Type: Grant
    Filed: November 16, 2023
    Date of Patent: July 14, 2026
    Assignee: Micron Technology, Inc.
    Inventors: Wenjun Wu, Huachen Li, Xiaolai Zhu, Ling Shi, Qingyuan Wang
  • Patent number: 12681855
    Abstract: A computing system comprising: a cache, comprising a virtual tag storage and a physical tag storage, where each cache line is identified for load operations by a virtual tag and for store operations by a physical tag; a cache access controller; a snoop access circuitry; and a miss controller; wherein, in response to receiving a load operation comprising a virtual address, the cache access controller: accesses the cache to perform the load operation comprising looking up a virtual tag computed using the virtual address; and upon failing to identify the virtual tag value in the virtual tag storage, provides the load operation to the miss controller; and wherein the miss controller in response to receiving the load operation from the access controller, initiates an aliasing snoop to the cache by the snoop access circuitry, the aliasing snoop comprising looking up a physical tag computed using a corresponding physical address.
    Type: Grant
    Filed: December 14, 2025
    Date of Patent: July 14, 2026
    Assignee: Next Silicon Ltd
    Inventors: Yiftach Gilad, Liron Zur, Gleb Panarin
  • Patent number: 12664100
    Abstract: An application processor, a System-on-a-Chip (SoC), and a method of operating the same are provided. The SoC includes a first processor outputting a first access address, a system bus configured to transmit an access address to a memory if the access address, which is received from the first processor corresponds to a physical address area of the memory, and to transmit the access address to other processing circuits other than the memory if the access address corresponds to a shadow physical address area other than the physical address area of the memory, and a sub-processing circuit receiving the first access address from the first processor via the system bus, converting the first access address into a second access address corresponding to the physical address area, and transmitting the second access address to the system bus to access the memory.
    Type: Grant
    Filed: September 25, 2023
    Date of Patent: June 23, 2026
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Junhee Yoo, Seunghun Kim
  • Patent number: 12656970
    Abstract: A device includes a data processing engine (DPE) array having a plurality of data processing engines (DPEs) and a subsystem coupled to the DPE array. Each DPE of the plurality of DPEs is configurable to share data with one or more other DPEs of the plurality of DPEs using one or more of a plurality of data sharing techniques. The data sharing techniques include a core of a selected DPE accessing a memory module of an adjacent DPE via a memory interface of the selected DPE connected to a memory module of the adjacent DPE and the selected DPE accessing the memory module of a non-adjacent DPE using a DMA circuit and a stream switch of the selected DPE. The subsystem may be in a different die than the DPE array.
    Type: Grant
    Filed: April 15, 2024
    Date of Patent: June 16, 2026
    Assignee: Xilinx, Inc.
    Inventors: Juan J. Noguera Serra, Baris Ozgul, Jan Langer, Tim Tuan, Ralph D. Wittig, David Clarke, Goran H. K. Bilski, Kornelis A. Vissers, Richard L. Walke, Christopher H. Dick, Zachary Dickman, Philip B. James-Roxby, Peter McColgan
  • Patent number: 12656951
    Abstract: Leveraging distinct storage tiers in a virtual storage system, including: receiving a request to write data to the virtual storage system; selecting, from amongst a plurality of tiers in the virtual storage system, a tier for receiving the data, wherein the plurality of tiers include a write-mostly tier and at least one other tier; and storing, within the selected tier within the virtual storage system, the data.
    Type: Grant
    Filed: July 15, 2024
    Date of Patent: June 16, 2026
    Assignee: EVERPURE, INC.
    Inventors: Ronald Karr, Naveen Neelakantam, Radek Aster, Joshua Freilich, Aswin Karumbunathan
  • Patent number: 12657131
    Abstract: A method for preventing cache element access in a cache. The method includes selecting a cache element represented in a global hash table, making a first determination that a shared trylock associated with the cache element can be obtained, obtaining the shared trylock based on the first determination and receiving a can inval flag; making a second determination that an exclusive trylock associated with the cache element can be obtained; obtaining the exclusive trylock based on the second determination, and invalidating, after obtaining the exclusive trylock, the cache element.
    Type: Grant
    Filed: January 23, 2025
    Date of Patent: June 16, 2026
    Assignee: Dell Products L.P.
    Inventors: Rohit K Chawla, Neha R Naik, Viral Kirtikumar Mehta, Dominick I Santangelo, Gokul Prasanna Mani
  • Patent number: 12650792
    Abstract: The present disclosure discloses a data read and write method.
    Type: Grant
    Filed: December 3, 2024
    Date of Patent: June 9, 2026
    Assignee: SUZHOU METABRAIN INTELLIGENT TECHNOLOGY CO., LTD.
    Inventors: Peiqiang Dong, Lu Lu, Tiejun Liu, Jun Yang, Dafeng Han
  • Patent number: 12645366
    Abstract: Exemplary methods, apparatuses, and systems including a device health manager for managing health of a memory device. The device health manager identifies a memory device having a service life. The device health manager receives multiple requests to perform one or more computing operations. The device health manager predicts, using a machine learning model, an adjustment of the service life of the memory device using the health data. The device health manager generates a notification including the adjustment of the service life.
    Type: Grant
    Filed: April 23, 2024
    Date of Patent: June 2, 2026
    Assignee: Micron Technology, Inc.
    Inventor: Manjunath Chandrashekaraiah
  • Patent number: 12639111
    Abstract: Technology for estimating neural network (NN) power profiles includes obtaining a plurality of workloads for a compiled NN model, the plurality of workloads determined for a hardware execution device, determining a hardware efficiency factor for the compiled NN model, and generating, based on the hardware efficiency factor, a power profile for the compiled NN model on one or more of a per-layer basis or a per-workload basis. The hardware efficiency factor can be determined on based on a hardware efficiency measurement and a hardware utilization measurement, and can be determined on a per-workload basis. A configuration file can be provided for generating the power profile, and an output visualization of the power profile can be generated. Further, feedback information can be generated to perform one or more of selecting a hardware device, optimizing a breakdown of workloads, optimizing a scheduling of tasks, or confirming a hardware device design.
    Type: Grant
    Filed: July 2, 2022
    Date of Patent: May 26, 2026
    Assignee: Intel Corporation
    Inventors: Richard Richmond, Eric Luk, Lingdan Zeng, Lance Hacking, Alessandro Palla, Mohamed Elmalaki, Sara Almalih
  • Patent number: 12638987
    Abstract: Provided is a storage system. When a user registration request for a new user is received, the storage system is configured to allocate a user storage space for the new user in a plurality of storage devices, and, when a user activation request for the new user is received, the storage system is configured to generate user identification information regarding the new user, based on user credential information of the new user included in the user activation request, allocate a user area for the new user in the memory, and store the user identification information regarding the new user in the user area for the new user.
    Type: Grant
    Filed: August 12, 2024
    Date of Patent: May 26, 2026
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Mungyu Bae, Sungho Yoon, Jisoo Kim, Younsung Chu
  • Patent number: 12625616
    Abstract: Techniques can include: configuring a federation to have a volume as active from only a first storage system so that hosts only sends I/O operations, directed to the first volume, to the first storage system; configuring a second storage system of the federation as inactive with respect to volume; determining, in accordance with criteria, to allow I/O operations directed to the volume to be sent to both the first and second storage systems; transitioning the second storage system, with respect to the volume, from inactive to active; and receiving, from a host at the first and second storage systems, I/O operations directed to the volume while the first and second storage systems are configured as active. The I/O operations can include a first I/O operation received at the second storage system which is redirected, by the second storage system, to the first storage system for servicing.
    Type: Grant
    Filed: August 13, 2024
    Date of Patent: May 12, 2026
    Assignee: Dell Products L.P.
    Inventors: Amitai Alkalay, Vladimir Shveidel, Lior Kamran
  • Patent number: 12619361
    Abstract: A memory system includes a memory device and a processing device, operatively coupled to the memory device. The processing device performs operations comprising: identifying one or more mandatory scan wordlines of the memory device and one or more remaining wordlines of the memory device; performing a plurality of scan iterations with respect to a plurality of pages of the memory device, such that performing each scan iteration comprises: identifying, among the remaining wordlines, one or more scheduled scan wordlines of the memory device, scanning a subset of pages of the memory device that are addressable by the mandatory scan wordlines and the scheduled scan wordlines; wherein a combination of a first plurality of pages addressable by the scheduled scan wordlines selected by the plurality of scan iterations and a second plurality of pages addressable by the mandatory wordlines comprises the plurality of pages of the memory device.
    Type: Grant
    Filed: April 12, 2024
    Date of Patent: May 5, 2026
    Assignee: Micron Technology, Inc.
    Inventors: Vamsi Pavan Rayaprolu, Christopher M. Smitchger, Saeed Sharifi Tehrani
  • Patent number: 12619456
    Abstract: In one set of embodiments, a computer system executing a virtual machine (VM) packaging tool can receive a reference to a container comprising one or more applications of a workload and a reference to an operating system (OS) kernel to be included in the workload. The computer system can inject an agent into the container that is configured to request execution of a hardware VM attestation function, combine contents of the container and the OS kernel into an image file, and compute a hash of the image file. The computer system can then generate a firmware for the workload that includes the hash.
    Type: Grant
    Filed: September 11, 2023
    Date of Patent: May 5, 2026
    Assignee: VMware LLC
    Inventors: Radoslav Vladimirov Gerganov, Dentcho Ludmilov Bankov
  • Patent number: 12619377
    Abstract: A storage system including a plurality of storage drives that provide a storage capacity of data; and a plurality of storage controllers that execute data write or read processing, in which each of the plurality of controllers includes: a component that includes at least a CPU capable of changing performance by changing an amount of power to be supplied; and a memory that stores a power control program controlling a target value of power consumption of the component, when the power control program is executed by the CPU, in response to detection of a blocked controller among the plurality of controllers, a function of raising the target value of the power consumption for the component included in the controller is executed in a normal controller configuring a redundant system for the controller that causes the blocking.
    Type: Grant
    Filed: September 10, 2024
    Date of Patent: May 5, 2026
    Assignee: HITACHI VANTARA, LTD.
    Inventors: Soichiro Sakamoto, Tomohiro Yoshihara
  • Patent number: 12608145
    Abstract: In a computer system with clouds of a plurality of bases and a storage management server, where the cloud of the base includes a compute server on which a container execution platform for executing a container is built, and a storage server that provides a storage area for storing data, the storage management server stores a storage characteristic of a storage area of a storage server in the cloud of each base and connection information to the storage area, and the compute server acquires, from the storage management server, a storage characteristic and connection information of the storage area in the base to which the compute server belongs, determines a storage area to be allocated to the container of the container execution platform based on the storage characteristic, and allocates the determined storage area to the container based on the connection information.
    Type: Grant
    Filed: September 10, 2024
    Date of Patent: April 21, 2026
    Assignee: Hitachi Vantara, Ltd.
    Inventors: Yugo Yamauchi, Mitsuo Hayasaka
  • Patent number: 12608312
    Abstract: A data access control method of a memory card and a computer system are provided. The computer system detects whether a memory card supports a first communication protocol version and a second communication protocol version. When the memory card supports the second communication protocol version, a access protection setting of the memory card is stored according to the first communication protocol version through a first driver. The access protection setting is used to restrict access to the memory card. The computer system unmounts the first driver. A disk corresponding to the memory card is set in an operating system of the computer system according to the access protection setting through a disk configuration service in 10 the computer system. The disk configuration service runs on the operating system, and the disk is configured with the access protection setting.
    Type: Grant
    Filed: December 27, 2024
    Date of Patent: April 21, 2026
    Assignee: GENESYS LOGIC, INC.
    Inventors: Wen-Teng Hsieh, Shi-Chin Lee, Chi-Hsuan Tu
  • Patent number: 12596497
    Abstract: Provided herein may be a data storage system. The data storage system may include a plurality of memory devices, each including a metadata area and a data storage area, and a memory pool manager configured to allocate partial data storage areas of data storage areas to a plurality of host devices, respectively, in response to data storage area allocation requests received from the plurality of host devices, wherein the memory pool manager is configured to generate a plurality of sub-metadata areas by partitioning each metadata area, allocate the plurality of sub-metadata areas to the plurality of host devices, respectively, to correspond to the partial data storage areas allocated to the plurality of host devices and change sizes and locations of the plurality of sub-metadata areas based on at least one of health information of the plurality of memory devices and a metadata area setting request.
    Type: Grant
    Filed: October 21, 2024
    Date of Patent: April 7, 2026
    Assignee: SK hynix Inc.
    Inventors: Hyun Chul Kim, Jung Min Choi
  • Patent number: 12585594
    Abstract: At a first stage, cells of a row of the index table are searched, using a portion of the unified hash value bits as index to identify the row of the index table. Also, a pointer to the content table is identified by comparing an index table tag of an entry of a cell with a calculated tag of the hash to identify a cell in the row. At a second stage, a cell is looked up in the content table, responsive to a match of calculated tag of the hash and index table tag of entry, comparing the current full key value and the full key value in the content table entry. The content table full key value is retrieved using a pointer from the cell of the index table to the content table from the cell entry.
    Type: Grant
    Filed: June 26, 2024
    Date of Patent: March 24, 2026
    Assignee: Fortinet, Inc.
    Inventors: Shushan Wen, Zhi Guo