Patents Examined by S. Rosasco
  • Patent number: 7923179
    Abstract: An exposure mask is constituted of hole-patterns whose scales are higher than the limit resolution of exposure light and which are repetitively aligned in X-Y directions with the prescribed pitch (ranging from 140 nm to 180 nm) therebetween, halftone phase shift regions whose transmission factors range from 2% to 20% and each of which is aligned between two hole-patterns adjacently lying in the X-direction or the Y-direction so as to apply an inverse phase to incidence light, and light preventive regions each of which is aligned between two hole-patterns adjacently lying in an oblique direction inclined to the X-direction or Y-direction by 45°. The exposure mask is illuminated with azimuthal polarization light which is produced by a secondary light source of a zonal illumination and whose polarization direction is perpendicular to the radial direction of the secondary light source.
    Type: Grant
    Filed: February 5, 2009
    Date of Patent: April 12, 2011
    Assignee: Elpida Memory Inc.
    Inventor: Tadao Yasuzato
  • Patent number: 7820343
    Abstract: Methods for producing a photomask or layer or stack patterning include applying two resists to a layer, a layer stack, or a mask substrate (collectively “the layer”). Sensitivity of the first resist with respect to the exposure dose is greater than sensitivity of the second. Both resists are subjected to an exposure dose in defined regions of the layer surface, the dose varying locally between first and second doses. The first dose is chosen to expose the first resist but not the second. The second dose is chosen to expose the second resist. After a first development of the second and of the first resist the layer is etched at the uncovered locations for a first time. After complete removal of the second resist and a second development of the first resist, the layer is etched. As a result, it is possible to produce structures of different depths in the layer.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: October 26, 2010
    Assignee: Advanced Mask Technology Center GmbH & Co. KG
    Inventors: Markus Waiblinger, Axel Feicke, Timo Wandel
  • Patent number: 7629088
    Abstract: According to an aspect of the invention, there is provided a mask defect repairing method of repairing a defect caused by a foreign object on a light transmissive photomask, the method including moving the foreign object on a light transmission section of the light transmissive photomask using a manipulator, and placing the foreign object on a shielding section of the light transmissive photo mask.
    Type: Grant
    Filed: August 15, 2006
    Date of Patent: December 8, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masamitsu Itoh
  • Patent number: 7579122
    Abstract: A method of exposing a surface to be exposed and an attenuated type phase shift mask for use in the method are provided herein. The attenuated type phase shift mask has a reference area allowing a light radiated from a light source to pass through and an amplitude and phase modulation area allowing a part of said light to pass through. The phase modulation amount of the amplitude and phase modulation area relative to the reference area of the attenuated type phase shift mask is {360°×n+(182° to 203°)} (n is an integer).
    Type: Grant
    Filed: April 5, 2006
    Date of Patent: August 25, 2009
    Assignee: Kabushiki Kaisha Ekisho Sentan Gijutsu Kihatsu Center
    Inventor: Yukio Taniguchi
  • Patent number: 7517617
    Abstract: This invention relates to a mask blank for use in EUV lithography and a method for its production. The mask blank comprises a substrate with a front side and a rear side whereby a coating is applied to the front side for use as a mask in EUV lithography and the rear side of the substrate comprises an electrically conductive coating. The electrically conductive coating is particularly abrasion resistant and strongly adhesive according to DIN 58196-5 (German Industry Standard), DIN 58196-4 and DIN 58196-6 and characterised by a minimum electrical conductivity. The electrically conductive coating is applied by means of ion-beam-assisted sputtering. Since the electrically conductive coating on the rear side is so abrasion resistant and strongly adhesive, the mask blank may be gripped, held and handled by means of an electrostatic holding device (chuck) without any troublesome abrasion occurring.
    Type: Grant
    Filed: April 16, 2004
    Date of Patent: April 14, 2009
    Assignee: Schott AG
    Inventors: Lutz Aschke, Markus Renno, Mario Schiffler, Frank Sobel, Hans Becker
  • Patent number: 7399558
    Abstract: A mask manufacturing method suitable for an exposure method wherein a mask on which a desired pattern and a supplementary pattern with formations smaller than those of the desired pattern are arrayed is illuminated, and the light which passed through the mask onto a member to be exposed is projected via a projection optical system, said method comprising a selecting step for selecting one of the following three supplementary patterns, a first supplementary pattern wherein said supplementary pattern is disposed at a position where a line extending in the vertical direction as to the pitch direction from a certain desired pattern hole of said desired pattern, and a line connecting the supplementary pattern hole closest to said certain desired pattern hole in the vertical direction with said certain desired pattern hole, intersect at an angle of 0°, a second supplementary pattern wherein said angle is 0° or more but less than 45°, and a third supplementary pattern wherein said supplementary pattern supplementary
    Type: Grant
    Filed: July 22, 2004
    Date of Patent: July 15, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kenji Yamazoe, Kenji Saitoh
  • Patent number: 7387853
    Abstract: The present invention relates to fabricating a reticle or mask for use in an extreme ultraviolet (“EUV”) photolithographic process. The EUV reticle comprises a substrate, a planarizing layer formed over a surface of the substrate, and a reflective layer deposited in contact with the planarizing layer. The planarizing layer comprises a material that has superior surface flatness properties and provides a flat surface upon which the reflective layer is deposited. The planarizing layer is spin-coated onto the substrate and comprises a material such as an anti-reflective material, a dielectric material, or a polymer. Since the reflective layer is deposited over the flat surface provided by the planarizing layer, the reflective layer is not compromised by defects in the surface of the substrate.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: June 17, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Anthony C. Krauth
  • Patent number: 7384712
    Abstract: A photo mask formed with patterns to be transferred to a substrate using an exposure apparatus, the photo mask comprising a pattern row having three or more hole patterns surrounded by a shielding portion or a semitransparent film and arranged along one direction, and an assist pattern surrounded by the shielding portion or semitransparent film and having a longitudinal direction and a latitudinal direction, the assist pattern being located at a specified distance from the pattern row in a direction orthogonal to the one direction, the longitudinal direction of the assist pattern being substantially parallel with the one direction, the longitudinal length of the assist pattern being equivalent to or larger than the longitudinal length of the pattern row, the assist pattern being not transferred to the substrate.
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: June 10, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Hashimoto, Tadahito Fujisawa, Yuko Kono, Takashi Obara
  • Patent number: 7381502
    Abstract: A mask for use in a photolithographic process. The mask includes a plate or substrate having first and second opposite surfaces, a first image on the first surface of the substrate and a second image on the second surface of the substrate. When the mask is used in a photolithographic process, energy is reflected by the first image prior to entering the substrate and energy is reflected by the second image after passing through the substrate.
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: June 3, 2008
    Assignee: LSI Logic Corporation
    Inventors: Michael Jay Berman, George Edward Bailey
  • Patent number: 7378197
    Abstract: A patterned reflective semiconductor mask uses a multiple layer ARC overlying an absorber stack that overlies a reflective substrate. The absorber stack has more than one layer and an upper layer of the absorber stack has a predetermined metal. The multiple layer ARC overlying the upper layer of the absorber stack has layers of nitrogen, oxygen and nitrogen combined with the predetermined metal of the upper layer of the absorber stack. The oxygen layer in the ARC has less metallic properties than the nitrogen layers therein. In one form, an overlying dielectric layer is positioned on the multiple layer ARC to increase light interference. The ARC provides wide bandwidth inspection contrast for extreme ultra-violet (EUV) reticles.
    Type: Grant
    Filed: November 7, 2005
    Date of Patent: May 27, 2008
    Assignee: Freescale Semiconductor, Inc.
    Inventors: James R. Wasson, Pawitter Mangat
  • Patent number: 7378196
    Abstract: A mask corrects for an optical proximity effect (OPE). A dummy pattern having a phase-edge effect is formed on a mask substrate. The phase-edge effect reduces the intensity of light at the boundary of two transmitting regions from through transmitted light has a phase difference. A pattern can then be formed in a photolithographic process using the phase-edge effect. A difference between “isolated” and “dense” patterns formed on a wafer can be reduced by forming a dummy pattern in an isolated pattern region of the mask and making the diffraction pattern of the isolated pattern the same as that of the dense pattern, thereby improving the total focus margin. Because the intensity of light is reduced at the boundary between a first region in which the phase of the transmitted light is 0° and a second region in which the phase of the transmitted light is 180°, for example, a photoresist layer is not photosensitized.
    Type: Grant
    Filed: November 8, 2004
    Date of Patent: May 27, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byeong-Soo Kim, Han-ku Cho
  • Patent number: 7371484
    Abstract: A photomask blank includes a hard mask having an excellent etch selectivity with respect to an opaque layer. The photomask blank includes a light-transmissive substrate, an opaque chromium layer disposed on the light-transmissive substrate, and a hard mask layer disposed on the opaque chromium layer. The hard mask layer is of a conductive material having an etch selectivity of at least 3:1 with respect to the opaque chromium layer against an etch gas mixture including chlorine gas and oxygen gas. Also, a resist layer is disposed on the hard mask layer. Alternatively, a phase shift layer can be interposed between the light-transmissive substrate and the opaque chromium layer. Preferably, the hard mask layer is formed of Mo or MoSi. First, the resist layer is patterned, and the hard mask is etched using the patterned resist as an etch mask. Then the chromium layer is etched using the patterned hard mask as an etch mask.
    Type: Grant
    Filed: August 9, 2004
    Date of Patent: May 13, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-yun Lee, Ka-soon Yim, Jae-hee Hwang, Il-yong Jang
  • Patent number: 7368204
    Abstract: A mask for laser crystallization includes a transmissive portion defining a crystallization pattern and an alignment pattern. The alignment pattern includes a first pattern group having a size corresponding to the crystallization pattern and a second pattern group having a plurality of radial bars surrounding the first pattern group. A shielding portion surrounds the transmissive portion.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: May 6, 2008
    Assignee: LG. Philips LCD. Co., Ltd.
    Inventor: JaeSung You
  • Patent number: 7364821
    Abstract: Provided is a method for crystallizing using a laser mask for selectively crystallizing active regions without a laser shot mark, including: providing an array substrate in which N×M active regions are defined; positioning a laser mask having first and second blocks over the substrate, wherein the first and second blocks have first and second mask patterns, respectively, and the second mask pattern is a reverse pattern of the first mask pattern; irradiating a first laser beam onto the active regions through the first block; and irradiating a second laser beam onto the active regions through the second block.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: April 29, 2008
    Assignee: LG.Philips LCD Co., Ltd.
    Inventor: JaeSung You
  • Patent number: 7364822
    Abstract: A mask pattern 40 including a light-shielding portion 41 constituted by a light-shielding film made of a chromium film or the like and phase shifters 42 and 43 is formed on a transparent substrate 30. The phase shifters 42 and 43 generate a phase difference of 180 degrees with respect to exposure light between the phase shifters and the transparent substrate 30. A first light intensity generated in a light-shielded image formation region corresponding to the mask pattern 40 on an exposed material by the exposure light transmitted through the phase shifters 42 and 43 is not more than four times a second light intensity generated in the light-shielded image formation region by the exposure light that is transmitted through the periphery of the mask pattern 40 on the transparent substrate 30 and goes into the back side of the mask pattern 40.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: April 29, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Akio Misaka
  • Patent number: 7361434
    Abstract: Semitransparent and trenchlike, absorber-free structure elements are formed jointly on a photomask formed using phase mask technology. The trenchlike structure elements are formed as trench or mesa structure using CPL technology. In a layout, dense, but also if appropriate semi-isolated and isolated, but relatively thin pattern portions are selected to fabricate them on the photomask using CPL technology. By contrast, isolated, wider pattern portions are formed as semitransparent structure elements using halftone phase mask technology. The respective process windows are relatively large and are adapted to one another. The joint process window is enlarged. In the area of dynamic memory chips, structures in a memory cell array can be formed using CPL technology and the support regions using halftone phase mask technology. In logic circuits, thin conductor tracks using CPL technology and wider conductor tracks using halftone phase mask technology can be fabricated.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: April 22, 2008
    Assignee: Infineon Technologies AG
    Inventor: Christoph Nölscher
  • Patent number: 7361436
    Abstract: A mask pattern 40 including a light-shielding portion 41 constituted by a light-shielding film made of a chromium film or the like and phase shifters 42 and 43 is formed on a transparent substrate 30. The phase shifters 42 and 43 generate a phase difference of 180 degrees with respect to exposure light between the phase shifters and the transparent substrate 30. A first light intensity generated in a light-shielded image formation region corresponding to the mask pattern 40 on an exposed material by the exposure light transmitted through the phase shifters 42 and 43 is not more than four times a second light intensity generated in the light-shielded image formation region by the exposure light that is transmitted through the periphery of the mask pattern 40 on the transparent substrate 30 and goes into the back side of the mask pattern 40.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: April 22, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Akio Misaka
  • Patent number: 7361433
    Abstract: A photomask includes a transparent substrate, and a plurality of light-shielding patterns repeatedly aligned on the transparent substrate in two dimensions. Each of the light-shielding patterns has length and width measurements that differ from each other. Further, the photomask includes at least one through hole penetrating a portion of each of the light-shielding patterns to expose the transparent substrate.
    Type: Grant
    Filed: April 19, 2004
    Date of Patent: April 22, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan Hwang, In-Sung Kim, Young-Seog Kang
  • Patent number: 7361457
    Abstract: Methods, systems, and media to define a portion of a circuit pattern with a source of real-time configurable imaging are disclosed. Embodiments include hardware and/or software for directing a beam through a mask onto a wafer surface to outline a circuit pattern having an undefined area, directing a second beam to the semiconductor wafer surface to define a circuit structure in the undefined area to complete the circuit pattern on the semiconductor wafer surface, and directing the second beam onto a source of real-time configurable imaging. Embodiments may also include a mask to include an undefined area incorporated into the circuit pattern to leave a critical structure of the circuit pattern undefined. Several embodiments include a photolithography system including an exposure tool, a mask, a source of real-time configurable imaging, and addressing circuitry.
    Type: Grant
    Filed: January 13, 2004
    Date of Patent: April 22, 2008
    Assignee: International Business Machines Corporation
    Inventors: William Bornstein, Anthony Cappa Spielberg
  • Patent number: 7354683
    Abstract: A lithography mask has an angled structure element (O) formed by a first opaque segment (O1) and by a second opaque segment (O2). The structure element has at least one reflex angle (?). The angled structure element (O) includes at least one convex section (A) facing the reflex angle (?). At least one transparent structure (T) adjacent to the angled structure element (O) is provided at the convex section (A) of the angled structure element (O). The transparent structure (T) is formed in separated fashion at the convex section (A) of the angled structure element (O) and thus comprises two distinguishable transparent segments (T1, T2) formed at least in sections essentially axially symmetrically with respect to the angle bisector (WH) of the reflex angle.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: April 8, 2008
    Assignee: Infineon Technologies AG
    Inventors: Molela Moukara, Burkhard Ludwig, Jörg Thiele, Marco Ahrens, Roderick Köhle, Rainer Pforr, Nicolo Morgana