Patents Examined by Savitri Mulpuri
  • Patent number: 11670736
    Abstract: A semiconductor light-emitting device includes a buffer structure, a first-type semiconductor layer on the buffer structure, an active layer on the first-type semiconductor layer, and a second-type semiconductor layer on the active layer. The buffer structure includes a nucleation layer, a first dislocation-removing structure on the nucleation layer, and a buffer layer on the first dislocation-removing structure. The first dislocation-removing structure includes a first material layer on the nucleation layer and a second material layer on the first material layer. The second material layer has a lattice constant different from a lattice constant of the first material layer. A roughness of a top surface of the first material layer is higher than a roughness of a top surface of the nucleation layer and higher than a roughness of a top surface of the second material layer.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: June 6, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jaiwon Jean, Joongseo Kang, Namsung Kim, Daemyung Chun
  • Patent number: 11658267
    Abstract: An example tunnel junction ultraviolet (UV) light emitting diode (LED) is described herein. The UV LED can include a mesa structure having at least one of: an n-doped bottom contact region, a p-doped region, and a tunnel junction arranged in contact with the p-doped region. Additionally, a geometry of the mesa structure can be configured to increase respective efficiencies of extracting transverse-electric (TE) polarized light and transverse-magnetic (TM) polarized light from the tunnel junction UV LED. The mesa structure can be configured such that an emitted photon travels less than 10 ?m before reaching the inclined sidewall.
    Type: Grant
    Filed: November 2, 2021
    Date of Patent: May 23, 2023
    Assignee: Ohio State Innovation Foundation
    Inventors: Siddharth Rajan, Yuewei Zhang, Zane Jamal-Eddine, Fatih Akyol
  • Patent number: 11652190
    Abstract: The present disclosure is a light-emitting diode (LED) with oxidized aluminum nitride (oxidized-AlN) film, which includes a substrate, an aluminum nitride buffer (AlN-buffer) layer, an oxidized-AlN film and a light-emitting diode epitaxial structure. The AlN-buffer layer is disposed on a patterned surface of the substrate, wherein the patterned surface is formed with a plurality of protrusions and a bottom portion. The oxidized-AlN film is disposed on the AlN-buffer layer on the protrusions, and with none disposed on the AlN-buffer layer on the bottom portion. The LED epitaxial structure includes gallium nitride compound crystal formed on the oxidized-AlN film and the AlN-buffer layer, to effectively reduce defect density of the gallium nitride compound crystal and to improve a luminous intensity of the LED.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: May 16, 2023
    Assignee: SKY TECH INC.
    Inventor: Jing-Cheng Lin
  • Patent number: 11653549
    Abstract: A display device includes a substrate, a first insulating layer disposed on the substrate, a through portion passing through the substrate and the first insulating layer, a display unit disposed on the first insulating layer and including a plurality of pixels surrounding at least a portion of the through portion, and a dummy pixel unit. Each pixel includes a light-emitting element including a pixel electrode and an opposite electrode facing each other, and an emission layer disposed between the pixel electrode and the opposite electrode. The dummy pixel unit includes a plurality of dummy pixels disposed between the through portion and the display unit, and including a metal pattern including a same material as the pixel electrode. The dummy pixels are disposed adjacent to the display unit.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: May 16, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Junhyun Park, Sunkwang Kim, Kangmoon Jo
  • Patent number: 11652191
    Abstract: The semiconductor light-emitting element includes an n-type semiconductor layer; an active layer on the n-type semiconductor layer; a p-type semiconductor layer on the active layer; a p-side contact electrode in contact with the p-type semiconductor layer; a p-side current diffusion layer on the p-side contact electrode; an n-side contact electrode in contact with the n-type semiconductor layer; and an n-side current diffusion layer that includes a first current diffusion layer on the n-side contact electrode, and a second current diffusion layer on the first current diffusion layer, and including a TiN layer. A height difference between upper surfaces of the p-side contact electrode and the first current diffusion layer is 100 nm or smaller; and a height difference between upper surfaces of the p-side current diffusion layer and the second current diffusion layer is 100 nm or smaller.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: May 16, 2023
    Assignee: NIKKISO CO., LTD.
    Inventors: Noritaka Niwa, Tetsuhiko Inazu
  • Patent number: 11652188
    Abstract: A method of forming and a random Distributed Bragg Reflector (DBR) is disclosed. The random DBR includes a substrate and a plurality of alternating layers of lattice-matched nanoporous GaN (NP-GaN) and GaN formed on a top surface of the substrate, wherein at least one of the alternating layers has a thickness of ?/4n and an adjacent one of the alternating layers does not have a thickness of ?/4n, wherein ? is a wavelength of incident radiation and n is the refractive index of a particular layer of the plurality of alternating layers.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: May 16, 2023
    Inventors: Morteza Monavarian, Daniel Feezell, Behnam Abaie, Arash Mafi, Saadat Mishkat-Ul-Masabih
  • Patent number: 11646391
    Abstract: A light-emitting element includes: a first conductive semiconductor layer; a plurality of rods disposed on the first conductive semiconductor layer, the rods comprising a first conductive semiconductor; a first insulating film disposed on a surface of the first conductive semiconductor layer while being absent under the rods; a plurality of light-emitting layers disposed on lateral surfaces of the rods; a plurality of second conductive semiconductor layers disposed on outer sides of the light-emitting layers; and a plurality of second insulating films disposed at upper ends of the rods.
    Type: Grant
    Filed: July 1, 2021
    Date of Patent: May 9, 2023
    Assignee: NICHIA CORPORATION
    Inventor: Atsuo Michiue
  • Patent number: 11641004
    Abstract: A light emitting device includes: a semiconductor structure including: a first semiconductor layer including: a first side parallel to an m-plane of the first semiconductor layer, and a second side meeting the first side, the second side being parallel to an a-plane of the first semiconductor layer, a light emitting layer disposed on a portion of the first semiconductor layer, and a second semiconductor layer disposed on the light emitting layer; a first conductive member disposed on the first semiconductor layer; a second conductive member disposed on the second semiconductor layer; a first terminal disposed on the first conductive member; a second terminal disposed on the second conductive member; and a covering member covering a lateral surface of the first conductive member, a lateral surface of the second conductive member, a lateral surface of the first terminal, and a lateral surface of the second terminal.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: May 2, 2023
    Assignee: NICHIA CORPORATION
    Inventors: Takefumi Nakagawa, Yusuke Aoki
  • Patent number: 11637220
    Abstract: A semiconductor light-emitting element comprises, in this order, a substrate, a reflective layer, a first conductivity type cladding layer made of InGaAsP containing at least In and P, a semiconductor light-emitting layer having an emission central wavelength of 1000 nm to 2200 nm and a second conductivity type cladding layer made of InGaAsP containing at least In and P, the second conductivity type cladding layer being configured to be on a light extraction side, a surface of a light extraction face of the second conductivity type cladding layer being a roughened surface which has a surface roughness Ra of 0.03 ?m or more and has a random irregularity pattern. The surface of the light extraction face has a skewness Rsk of ?1 or more, and a protective film is provided on the light extraction face.
    Type: Grant
    Filed: October 12, 2022
    Date of Patent: April 25, 2023
    Assignee: DOWA Electronics Materials Co., Ltd.
    Inventors: Jumpei Yamamoto, Tetsuya Ikuta
  • Patent number: 11631587
    Abstract: Disclosed herein are techniques for bonding LED components. According to certain embodiments, a first component including a semiconductor layer stack is hybrid bonded to a second component including a substrate that has a different thermal expansion coefficient than the semiconductor layer stack. The semiconductor layer stack includes an n-side semiconductor layer, an active light emitting layer, and a p-side semiconductor layer. The first component and the second component further include first contacts and second contacts, respectively. To hybrid bond the two components, the first contacts are aligned with the second contacts. Then dielectric bonding is performed to bond respective dielectric materials of both components. The dielectric bonding is followed by metal bonding of the contacts, using annealing.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: April 18, 2023
    Assignee: META PLATFORMS TECHNOLOGIES, LLC
    Inventors: Stephan Lutgen, Thomas Lauermann
  • Patent number: 11631784
    Abstract: Disclosed herein is an apparatus including a first three-dimensional (3-D) structure, a second 3-D structure, and a conductive layer. The first 3D structure includes a first-type doped semiconductor material having a semi-polar facet. The second 3-D structure forms a light-emitting diode (LED) and includes a second-type doped semiconductor material, an active layer, and the first-type doped semiconductor material. The conductive layer at least partially overlays and is in ohmic contact with the semi-polar facet. The conductive layer is configured to carry current that flows between the semi-polar facet and the active layer. In some embodiments, the first-type doped semiconductor material may include an N-type doped semiconductor material, and the second-type doped semiconductor material may include a P-type doped semiconductor material. The first-type doped semiconductor material of both 3-D structures may be etched from a common first-type doped semiconductor epitaxial layer.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: April 18, 2023
    Assignee: META PLATFORMS TECHNOLOGIES, LLC
    Inventor: Daniel Bryce Thompson
  • Patent number: 11631785
    Abstract: A group III-nitride laminated substrate includes a sapphire substrate, a first layer that is formed on the sapphire substrate and is made of aluminum nitride, a second layer that is formed on the first layer and serves as an n-type layer made of gallium nitride and doped with an n-type dopant, a third layer that is formed on the second layer and serves as a light-emitting layer made of a group III-nitride, and a fourth layer that is formed on the third layer and serves as a p-type layer made of a group III-nitride and doped with a p-type dopant. The second layer has a thickness of 7 ?m or less. A half-value width of (0002) diffraction determined through X-ray rocking curve analysis is 100 seconds or less, and a half-value width of (10-12) diffraction determined through X-ray rocking curve analysis is 200 seconds or less.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: April 18, 2023
    Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Hajime Fujikura, Taichiro Konno, Takeshi Kimura
  • Patent number: 11626535
    Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, wherein the third sub-layer is adjacent to the light emitting layer. The electrical contact can be coupled to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. The first, second and third sub-layers, and the light emitting layer can each comprise a superlattice. The second layer can comprise a chirped superlattice.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: April 11, 2023
    Assignee: Silanna UV Technologies Pte Ltd
    Inventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray, Petar Atanackovic
  • Patent number: 11626550
    Abstract: A micro light emitting diode (LED) having a high light extraction efficiency includes a bottom conductive layer, a light emitting layer on the bottom conductive layer, and a top conductive structure on the light emitting layer. The micro LED additionally includes a conductive side arm electrically connecting the sidewall of the light emitting layer with the bottom conductive layer, and a reflective bottom dielectric layer arranged under the light emitting layer and above the bottom conductive layer. In some embodiments, the micro LED further includes an ohmic contact between the top conductive structure and the light emitting layer that has a small area and is transparent, thereby increasing the light emergent area and improving the light extraction efficiency.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: April 11, 2023
    Assignee: Jade Bird Display (Shanghai) Limited
    Inventor: Qiming Li
  • Patent number: 11611013
    Abstract: A method includes forming a first n-type nitride semiconductor layer; forming a first light-emitting layer on the first n-type nitride semiconductor layer; forming a first nitride semiconductor layer on the first light-emitting layer by introducing a gas comprising gallium and having a first flow rate; forming a first p-type nitride semiconductor layer on the first nitride semiconductor layer; forming an n-type intermediate layer on the first p-type nitride semiconductor layer; forming a second n-type nitride semiconductor layer on the n-type intermediate layer; forming a second light-emitting layer on the second n-type nitride semiconductor layer; forming a second nitride semiconductor layer on the second light-emitting layer by introducing a gas comprising gallium and having a second flow rate; and forming a second p-type nitride semiconductor layer on the second nitride semiconductor layer. The first flow rate is less than the second flow rate.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: March 21, 2023
    Assignee: NICHIA CORPORATION
    Inventor: Seiichi Hayashi
  • Patent number: 11600757
    Abstract: A semiconductor laser device includes: a package includes a recess and an upper surface that has an outer peripheral surface and a bonding surface positioned between the recess and the outer peripheral surface, the bonding surface having inner corners on the recess side and outer corners on the outer peripheral surface side; at least one semiconductor laser element disposed in the recess of the package; and a light-transmissive member bonded to the bonding surface of the package. The radius of curvature of inner corners is greater than the radius of curvature of outer corners.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: March 7, 2023
    Assignee: NICHIA CORPORATION
    Inventors: Kazuma Kozuru, Ryota Okuno
  • Patent number: 11588072
    Abstract: A semiconductor device is provided, which includes a first semiconductor structure, a second semiconductor structure, and an active region. The first semiconductor structure includes a first dopant. The second semiconductor structure is located on the first semiconductor structure and includes a second dopant different from the first dopant. The active region includes a plurality of semiconductor pairs and is located between the first semiconductor structure and the second semiconductor structure. One of the plurality of semiconductor pairs has a barrier layer and a well layer and includes the first dopant. The barrier layer has a first thickness and a first Al content, and the well layer has a second thickness and a second Al content, the second thickness is less than the first thickness, and the second Al content is less than the first Al content.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: February 21, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Yen-Chun Tseng, Kuo-Feng Huang, Shih-Chang Lee, Ming-Ta Chin, Shih-Nan Yen, Cheng-Hsing Chiang, Chia-Hung Lin, Cheng-Long Yeh, Yi-Ching Lee, Jui-Che Sung, Shih-Hao Cheng
  • Patent number: 11575065
    Abstract: A quantum device includes a substrate including a first material and including an upper surface thereof, a first layer comprising a compound of the first material disposed on the upper surface of the substrate, a second layer, comprising a metal oxide, disposed on the first layer, a third layer, comprising a noble metal, disposed on the second layer, a fourth layer, comprising a metal oxide, disposed on the third layer, a fifth layer, comprising a piezoelectric material, disposed on the fourth layer, a sixth layer, comprising a noble metal, disposed on the fifth layer, a seventh layer, comprising a material capable of quantum emission, disposed on the sixth layer, and an eighth layer, comprising a noble metal, disposed on the seventh layer, and at least one of the eighth layer and the seventh layer are sized to enable quantum emission from the seventh layer.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: February 7, 2023
    Assignee: Applied Materials, Inc.
    Inventor: Abhijeet Laxman Sangle
  • Patent number: 11575068
    Abstract: A method of manufacturing a semiconductor light emitting element includes: forming an active layer made of an aluminum gallium nitride (AlGaN)-based semiconductor material on an n-type clad layer made of an n-type AlGaN-based semiconductor material; removing a portion of each of the active layer and the n-type clad layer by dry etching to expose a portion of the n-type clad layer; forming a first metal layer including titanium (Ti) on an exposed surface of the n-type clad layer; forming a second metal layer including aluminum (Al) on the first metal layer; and forming an n-side electrode by annealing the first metal layer and the second metal layer at a temperature not lower than 560° C. and not higher than 650° C. A film density of the second metal layer before the annealing is lower than 2.7 g/cm3.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: February 7, 2023
    Assignee: NIKKISO CO., LTD.
    Inventors: Noritaka Niwa, Tetsuhiko Inazu, Haruhito Sakai
  • Patent number: 11569415
    Abstract: Described are light emitting diode (LED) devices comprising a plurality of mesas defining pixels, each of the mesas comprising semiconductor layers, an N-contact material in a space between each of the plurality of mesas, a dielectric material which insulates sidewalls of the P-type layer and the active region from the metal. A hard mask layer is above the semiconductor layers, the hard mask layer having a plurality of openings therein, each partially filled with a liner layer and partially filled with a P-metal material plug, the P-metal material plug having a width; and a passivation film is on the hard mask layer, the passivation film having a plurality of passivation film openings therein defining a width, the width of each passivation film opening being less than the width of a combination of the P-metal material plug and the liner layer.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: January 31, 2023
    Assignee: Lumileds LLC
    Inventors: Erik William Young, Yu-Chen Shen, Chee Yin Foo, Yeow Meng Teo