Patents Examined by Scott S Outten
  • Patent number: 10158157
    Abstract: In a high frequency signal line, a first signal line extends along a first dielectric element assembly, a first reference ground conductor extends along the first signal line, a second signal line is provided in or on the second dielectric element assembly and extends along the second dielectric element assembly, a second reference ground conductor is provided in or on the second dielectric element assembly and extends along the second signal line. A portion of a bottom surface at an end of the first dielectric element assembly and a portion of the top surface at an end of the second dielectric element assembly are joined together such that a joint portion of the first and second dielectric element assemblies includes a corner. The second signal line and the first signal line are electrically coupled together. The first and second reference ground conductors are electrically coupled together.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: December 18, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Nobuo Ikemoto, Yuki Wakabayashi, Shigeru Tago
  • Patent number: 10158160
    Abstract: A metamaterial for receiving electromagnetic waves having any polarization is provided. The metamaterial allows for receipt and/or propagation of electromagnetic waves at a resonant frequency of the metamaterial.
    Type: Grant
    Filed: September 12, 2016
    Date of Patent: December 18, 2018
    Assignee: THE MITRE CORPORATION
    Inventors: Ian T. McMichael, Jamie R. Hood, Mohamed Wajih Elsallal
  • Patent number: 10149377
    Abstract: A stacked, multi-layer transmission line is provided. The stacked transmission line includes at least a pair of conductive traces, each conductive trace having a plurality of conductive stubs electrically coupled thereto. The stubs are disposed in one or more separate spatial layers from the conductive traces.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: December 4, 2018
    Assignee: Invensas Corporation
    Inventors: Shaowu Huang, Javier A. Delacruz, Belgacem Haba
  • Patent number: 10141655
    Abstract: A multiport RF switch assembly with integrated impedance tuning capability is described that provides a single RFIC solution to switch between transmit and receive paths in a communication system. Dynamic tuning is integrated into each switch sub-assembly to provide the capability to impedance match antennas or other components connected to the multiport switch. The tuning function at the switch can be used to shape the antenna response to provide better filtering at the switch/RF front-end (RFFE) interface to allow for reduced filtering requirements in the RFFE. Memory is designed into the multiport switch assembly, allowing for a look-up table or other data to reside with the switch and tuning circuit. The resident memory will result in easier integration of the tunable switch assembly into communication systems.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: November 27, 2018
    Assignee: Ethertronics, Inc.
    Inventors: Laurent Desclos, Olivier Pajona
  • Patent number: 10135421
    Abstract: A bulk-acoustic wave filter device includes: a first substrate; a first filter disposed on the first substrate, within a cavity of the bulk-acoustic wave filter device; a second substrate coupled to the first substrate; a second filter disposed on the second substrate, within the cavity and facing the first filter; a first inductor layer disposed on the first substrate and around the first filter; a second inductor layer disposed on the second substrate and around the second filter, and bonded to the first inductor layer; and a sealing member sealing the cavity, together with the first and second inductor layers.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: November 20, 2018
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Seong Jong Cheon
  • Patent number: 10128556
    Abstract: The present invention relates to a transition arrangement (1) between a SIW and a waveguide interface (3). The SIW comprises a dielectric material (4), a first and second metal layer (5, 6) and a first and second electric wall element (7a, 7b) running essentially parallel and electrically connecting the metal layers (5, 6). The transition arrangement (1) comprises a coupling aperture (8) in the first metal layer (5) and a third wall element (7c) running between the first and second electric wall elements (7a, 7b). The transition arrangement (1) further comprises an intermediate transition element (9) with a first and second main surface (10, 11), and a transition aperture (12) having first and second opening (13, 14) with corresponding first and second widths (w1, w2).
    Type: Grant
    Filed: March 24, 2013
    Date of Patent: November 13, 2018
    Assignee: Telefonaktiebolaget LM Ericsson (Publ)
    Inventors: Per Ligander, Valter Pasku, Ove Persson, Pietro Sanchirico, Ola Tageman
  • Patent number: 10116285
    Abstract: A method includes forming a replica circuit above a surface of a glass-type material. The replica circuit includes a thin-film transistor (TFT) configured to function as a variable capacitor or a variable resistor. The method further includes forming a transformer above the surface of the glass-type material. The transformer is coupled to the replica circuit, and the transformer is configured to facilitate an impedance match between the replica circuit and an antenna.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: October 30, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Je-Hsiung Lan, Chi Shun Lo, Jonghae Kim, Mario Francisco Velez, John H. Hong
  • Patent number: 10116272
    Abstract: An amplifier with switchable and tunable harmonic terminations and a variable impedance matching network is presented. The amplifier can adapt to different modes and different frequency bands of operation by appropriate switching and/or tuning of the harmonic terminations and/or the variable impedance matching network.
    Type: Grant
    Filed: February 1, 2017
    Date of Patent: October 30, 2018
    Assignee: pSemi Corporation
    Inventors: Gary Frederick Kaatz, Chris Olson
  • Patent number: 10107843
    Abstract: An impedance detector for measuring an impedance of a circuit comprises a frequency source, a resistor connected in between the frequency source and the circuit to be measured, a phase shift circuit for applying a phase shift to a signal from the frequency source, a first multiplier for mixing the signal from the frequency source with a signal from the circuit to be measured, a second multiplier for mixing the phase shifted signal with the signal from the circuit to be measured, and a processing circuit for determining an indication of an impedance of the circuit to be measured in dependence on the first mixed signal and the second mixed signal.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: October 23, 2018
    Assignee: Dialog Semiconductor B.V.
    Inventors: Rahul Todi, Johannes Gerardus Willms
  • Patent number: 10090574
    Abstract: The present invention provides a microstrip isolation structure for reducing crosstalk, comprising a microstrip line and two grounded resistors. The microstrip line comprises a plurality of indentation structures arranged periodically. The two grounded resistors are connected to two ends of the microstrip line, respectively. The plurality of indentation structures are periodically arranged in a subwavelength configuration that a period length of the plurality of indentation structures is far smaller than a wavelength of a transmission signal generated by a crosstalk around the microstrip line, whereby impingement of electromagnetic wave is confined by the plurality of indentation structures.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: October 2, 2018
    Inventor: Chia-Ho Wu
  • Patent number: 10062942
    Abstract: A transmission line portion of a high-frequency transmission cable includes a dielectric body in which a first ground conductor, a signal conductor, and a second ground conductor are arranged along a thickness direction of the dielectric body from a first principle surface side. The second ground conductor is arranged at a position that does not overlap the signal conductor when viewed in a direction perpendicular or substantially perpendicular to the first principle surface. The third ground conductor and the signal conductor are located at the same position in the thickness direction of the dielectric body. The second and third ground conductors are connected to the first ground conductor via interlayer-connector conductors. The width of the second and third ground conductors is narrower than the width of the signal conductor, but a sum of the widths of the second and third ground conductors is larger than the width of the signal conductor.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: August 28, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Noboru Kato
  • Patent number: 10049807
    Abstract: In a laminated coil component, first coil conductor patterns define a coil opening that generates a magnetic flux in a first direction, second coil conductor patterns define a first coil opening that generates a magnetic flux in the first direction, and a second coil opening that generates a magnetic flux in a second direction. A difference in area between the first coil opening and the second coil opening determines a degree of coupling of the coil defined by the first coil conductor pattern and the coil defined by the second coil conductor pattern. This provides a close proximal arrangement of a plurality of coils proximally while significantly reducing or preventing unnecessary coupling between the coils.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: August 14, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kenichi Ishizuka
  • Patent number: 10050601
    Abstract: An elastic wave apparatus includes a piezoelectric substrate, an IDT electrode on the piezoelectric substrate and includes first electrode fingers, second electrode fingers, a first busbar, and a second busbar, a capacitive electrode including third electrode fingers, fourth electrode fingers, a third busbar, and a fourth busbar, an insulating film laminated on the capacitive electrode, a first wiring line including a first portion facing the capacitive electrode via the insulating film, and a second wiring line that connects the first busbar and the third busbar. The capacitive electrode extends in a lateral direction with respect to the IDT electrode in a surface acoustic wave propagation direction.
    Type: Grant
    Filed: June 14, 2017
    Date of Patent: August 14, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Tomohiko Murase
  • Patent number: 10051725
    Abstract: This circuit board includes a plate body made of a dielectric body and having a front surface and a back surface, a differential signal line formed on the front surface, the differential signal line being made of a pair of signal lines, and a ground conductor formed on the back surface. The signal lines include: terminals formed at a distance from the ground conductor, in an end portion at a prescribed distance from one end of the back surface; connection pads connected to the terminals and provided on the end portion of the front surface so as to be opposed to the terminals; transmission line units extending from the connections pads; and a widened portion provided in a position on the transmission line units corresponding to a space between the terminal and the ground conductor, the widened portion having a line width greater than that of the transmission line units.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: August 14, 2018
    Assignee: KYOCERA CORPORATION
    Inventor: Yoshiki Kawazu
  • Patent number: 10038420
    Abstract: A first coil element includes a first loop-shaped conductor and a second loop-shaped conductor. A second coil element includes a third loop-shaped conductor and a fourth loop-shaped conductor. The first loop-shaped conductor and the second loop-shaped conductor are sandwiched in a stacking direction between the third loop-shaped conductor and the fourth loop-shaped conductor. A conductive pattern which is a portion of the first loop-shaped conductor and a conductive pattern which is a portion of the second loop-shaped conductor are connected in parallel. Then, each of a conductive pattern which is a remaining portion of the first loop-shaped conductor and a conductive pattern which is a remaining portion of the second loop-shaped conductor is connected in series with the parallel circuit.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: July 31, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kenichi Ishizuka
  • Patent number: 10027010
    Abstract: There is provided a printed circuit board structure, a dielectric substrate structure and a method of manufacturing thereof using wideband microstrip lines for reducing signal reflection, resonance and radiation for maintaining signal quality. The widths of certain portions of the wideband microstrips and underlying substrate portions are tapered gradually for achieving a reduction in a signal reflection, resonance and radiation therefore resulting in maintaining signal quality.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: July 17, 2018
    Assignee: United Arab Emirates University
    Inventors: Rashad Ramzan, Omar Farooq Sidiqui, Azam Beg
  • Patent number: 9985584
    Abstract: According to one embodiment, a high-frequency semiconductor amplifier includes an input terminal, an input matching circuit, a high-frequency semiconductor amplifying element, an output matching circuit and an output terminal. The input terminal is inputted with a fundamental signal. The fundamental signal has a first frequency band and a first center frequency in the first frequency band. The input matching circuit includes an input end and an output end. The input end of the input matching circuit is connected to the input terminal. The high-frequency semiconductor amplifying element includes an input end and an output end. The input end of the high-frequency semiconductor amplifying element is connected to the output end of the input matching circuit. The high-frequency semiconductor amplifying element is configured to amplify the fundamental signal.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: May 29, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazutaka Takagi, Yukio Takahashi
  • Patent number: 9979065
    Abstract: A filter includes a top panel, a bottom panel, two first side panels located between the top panel and the bottom panel, and at least one diaphragm that has a metal surface. The two first side panels, the top panel and the bottom panel form a rectangular waveguide. The at least one diaphragm is connected to both the top panel and the bottom panel and separates a cavity of the rectangular waveguide into several cavity chambers that extend along an input/output direction of the rectangular waveguide. At least one of the first side panels is an adjustable side panel whose position relative to the diaphragm is adjustable.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: May 22, 2018
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Shaofeng Xu
  • Patent number: 9979375
    Abstract: A communication matching network for multi-harmonic suppression includes a communication circuit configured to provide a signal. The communication matching network further includes a matching circuit configured to receive the signal from the communication circuit and suppress one or more harmonics of the received signal to generate a filtered signal, wherein the matching circuit includes a transformer comprising a first winding and a second winding, wherein the first winding includes a first inductance and the second winding includes a second inductance and wherein the matching network includes a harmonic trap including a third inductance such that the third inductance is located inside or within a physical layout of the first winding and/or the second winding. The communication matching network further includes a receiver circuit configured to receive the filtered signal from the matching circuit for further processing.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: May 22, 2018
    Assignee: Intel IP Corporation
    Inventors: Stephan Leuschner, Jose Pedro Diogo Faisca Moreira
  • Patent number: 9972878
    Abstract: An adjustable constant impedance phase shifter is provided. In the adjustable constant impedance phase shifter a conductive circuit path is arranged between a conductive sheet and a parallel plane that is parallel to the conductive sheet; an edge of a dielectric plate and an edge of a conductive plate are adjoined such that the dielectric plate and the conductive plate form a slide member; and the slide member is movably arranged along a slide path between the circuit element and the conductive sheet so that any point of the conducting circuit path is consistently enclosed between the slide member and the parallel plane, and so that the relative permittivity of a medium adjacent to a point on the conductive circuit path is simultaneously changed as the slide member is moved.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: May 15, 2018
    Assignee: Filtronic Wireless AB
    Inventor: Bjorn Lindmark