Patents Examined by Scott S Outten
  • Patent number: 9641140
    Abstract: A matching network and method for matching a source impedance to a load impedance is provided. A bias feed microstrip structure is coupled to a direct current (DC) voltage source and has a bias feed microstrip electrical length less than one fifth of a fundamental wavelength of a fundamental frequency component of an input signal. A harmonic impedance transformation network can be configured to compensate for parasitic reactances of a precursor element. A tuned impedance element presents a short circuit impedance at the second harmonic impedance transformation network terminal for harmonic frequency components and presents a higher impedance for the fundamental frequency component. A fundamental impedance transformation network is configured to match a fundamental impedance transformation network input impedance for the fundamental frequency component to a load impedance of a load. Multiple instances of the harmonic impedance transformation network and the tuned impedance element can be provided.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: May 2, 2017
    Assignee: NXP USA, INC.
    Inventors: Ramanujam Srinidhi Embar, Weng Chuen Edmund Neo, Yu-Ting D. Wu
  • Patent number: 9634645
    Abstract: A particular device includes a replica circuit disposed above a dielectric substrate. The replica circuit includes a thin film transistor (TFT) configured to function as a variable capacitor or a variable resistor. The device further includes a transformer disposed above the dielectric substrate and coupled to the replica circuit. The transformer is configured facilitate an impedance match between the replica circuit and an antenna.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: April 25, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Je-Hsiung Lan, Chi Shun Lo, Jonghae Kim, Mario Francisco Velez, John H. Hong
  • Patent number: 9634371
    Abstract: A transmission line circuit assembly has a substrate layer having a transmission line trace, further having a functional portion and a transitional portion. An enclosure of the assembly houses the transitional portion of the transmission line trace. A first surface of a dielectric plug is conductively coupled to an inner top surface of the enclosure. A second surface of the plug is aligned and spaced apart from the transitional portion of the transmission line trace to define a gap therebetween. An interfacing portion of a connecting pin is housed within the enclosure and bonded to the transitional portion. A connecting portion of the pin is connectable to an external conductor. The gap may be filled with a dielectric material. The transitional portion, dielectric plug, dielectric filler and connecting pin form an electromagnetic transition providing tuning and matching of the function portion with the external conductor.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: April 25, 2017
    Assignee: COM DEV International Ltd.
    Inventors: Arvind Swarup, David Davitt
  • Patent number: 9628043
    Abstract: An EMC filtering device comprises a printed circuit comprising at least two parallel layers of a high-permittivity material, which are positioned between two layers of an insulating material that are parallel to one another and to the high-permittivity material layers. A core made of a magnetic material comprises three cylindrical arms passing perpendicularly through the high-permittivity and insulating material layers. At least two windings winding around the first arm of the magnetic material core, the windings and the first arm forming a first coil. At least two windings winding around the second arm of the magnetic material core, the windings and the second arm forming a second coil. The two coils being coupled coils.
    Type: Grant
    Filed: October 30, 2012
    Date of Patent: April 18, 2017
    Assignee: AIRBUS GROUP SAS
    Inventor: Marc Meyer
  • Patent number: 9627882
    Abstract: An impedance matching network comprises a first signal terminal configured to receive a signal from a source circuit and a second signal terminal configured to provide the signal to a load circuit. The network further comprises a series branch comprising a variable capacitive component between the first signal terminal and the second signal terminal. The variable capacitive component comprises a plurality of capacitive portions connected in series, wherein at least one of the capacitive portions comprises a switching element comprising a stack of series connected transistors. The impedance matching network also comprises a control component configured to control a capacitance of the variable capacitive component by controlling the at least one of the capacitive portions based on a predetermined algorithm.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: April 18, 2017
    Assignee: Infineon Technologies AG
    Inventor: Winfried Bakalski
  • Patent number: 9627733
    Abstract: To provide a millimeter waveband filter which can vary a resonance frequency in a wider band without causing deterioration of resonance characteristics due to leakage of electromagnetic waves. In a millimeter waveband filter 20, a first waveguides 22 and a second waveguide 24 are relatively moved to vary the interval between the electric wave half mirrors 30A and 30B, and the resonance frequency of a resonator formed between the mirrors varies to selectively transmit resonance frequency components. A groove 60 which has a length p along a longitudinal direction of the transmission line corresponding to a ¼ wavelength of electromagnetic waves to be a leakage prevention target is provided on the outside of the second waveguide 24 facing the inside of the first waveguide 22, thereby preventing leakage of electromagnetic waves from the gap between the first waveguide 22 and the second waveguide 24.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: April 18, 2017
    Assignee: ANRITSU CORPORATION
    Inventors: Takashi Kawamura, Hiroshi Shimotahira
  • Patent number: 9621132
    Abstract: An antenna tuning apparatus for a multiport antenna array used for sending and/or receiving electromagnetic waves for radio communication comprises: 4 antenna ports, 4 user ports, 10 adjustable impedance devices each presenting a negative reactance and having a terminal coupled to one of the antenna ports, 4 windings each having a first terminal coupled to one of the antenna ports and a second terminal coupled to one of the user ports, and 10 adjustable impedance devices each presenting a negative reactance and having a terminal coupled to one of the user ports. All adjustable impedance devices are adjustable by electrical means. Any small variation in the impedance matrix of the antenna array, caused by a change in operating frequency or a change in the medium surrounding the antennas, can be compensated with a new adjustment of the adjustable impedance devices.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: April 11, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Frédéric Broyde, Evelyne Clavelier
  • Patent number: 9621129
    Abstract: An ‘L’ shaped dynamically configurable impedance matching circuit is presented herein. The circuit can include a series element and a shunt element. The shunt element in the L-shaped impedance matching circuit can be moved or modified based on the impedance of the circuit elements in electrical communication with each side of the impedance matching circuit. Thus, in some cases, the impedance matching circuit may be a flexible circuit that can be dynamically modified based on the environment or configuration of the wireless device that includes the impedance matching circuit.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: April 11, 2017
    Assignee: Skyworks Solutions, Inc.
    Inventors: William J. Domino, Stephane Richard Marie Wloczysiak
  • Patent number: 9621125
    Abstract: A first variable capacitance section included in a variable capacitance circuit includes a plurality of first variable capacitance elements connected to a signal line and each having a first capacitance value or a second capacitance value greater than the first capacitance value according to driving voltage, and includes a first fixed capacitance element connected in series with the plurality of first variable capacitance elements. A second variable capacitance section included in the variable capacitance circuit includes a second variable capacitance element connected to the signal line and having the first capacitance value or the second capacitance value according to the driving voltage, and includes a second fixed capacitance element connected in series with the second variable capacitance element.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: April 11, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Takeaki Shimanouchi
  • Patent number: 9608343
    Abstract: A coaxial connector junction includes first and second coaxial connectors. The first coaxial connector includes: a first central conductor extension; a first outer conductor extension spaced apart from and circumferentially surrounding the first central conductor extension; and a first dielectric spacer interposed between the first central conductor extension and the first outer conductor extension. The second coaxial connector includes: a second central conductor extension; a second outer conductor extension spaced apart from and circumferentially surrounding the second central conductor extension; and a second dielectric spacer interposed between the second central conductor extension and the second outer conductor extension.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: March 28, 2017
    Assignee: CommScope Technologies LLC
    Inventors: Jeffrey D. Paynter, Ronald A. Vaccaro
  • Patent number: 9602063
    Abstract: An amplifier with switchable and tunable harmonic terminations and a variable impedance matching network is presented. The amplifier can adapt to different modes and different frequency bands of operation by appropriate switching and/or tuning of the harmonic terminations and/or the variable impedance matching network.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: March 21, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Gary Frederick Kaatz, Chris Olson
  • Patent number: 9596750
    Abstract: An electronic circuit includes: a semiconductor chip provided with a single-ended I/F including a pad on which single-ended signals are exchanged; and a mounting unit on which a differential transmission path transmitting a differential signal is formed, and on which the semiconductor chip is mounted so that the pad of the single-ended I/F is directly electrically connected to a conductor configuring the differential transmission path.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: March 14, 2017
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Tomoari Itagaki, Kenichi Kawasaki, Kentaro Yasunaka
  • Patent number: 9595792
    Abstract: A cable with connector includes a cable including at least two or more differential signal transmission cables for transmitting/receiving differential signals, a connector at both ends of the cable and including a built-in paddle card to electrically connect the differential signal transmission cables to a connected device. The paddle card includes a sending-side transmission path that is formed on the paddle card so as to transmit electrical signals input from the device to the differential signal transmission cables. The sending-side transmission path includes a common-mode reflecting transmission path that is in a common-mode impedance mismatched to a transmission path of the device so as to reflect common-mode signals input from the transmission path of the device.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: March 14, 2017
    Assignee: HITACHI METALS, LTD.
    Inventors: Kei Nishimura, Izumi Fukasaku, Takahiro Sugiyama
  • Patent number: 9584096
    Abstract: Apparatus and methods for digital step attenuators are provided herein. In certain configurations, a digital step attenuator (DSA) includes a plurality of DSA stages arranged in a cascade between an input terminal and an output terminal. Each of the DSA stages can be operated in an attenuation mode or in a bypass mode. The DSA further includes an attenuation control circuit, which can be used to control the modes of operation of the DSA stages. The attenuation control circuit can be used to operate the DSA over a plurality of attenuation steps, which can be digitally selectable. To provide low phase shift across the range of attenuation steps, a DSA stage can include one or more phase compensation capacitors used to provide low phase shift and to compensate for a phase difference between the DSA stage operating in the bypass mode and in the attenuation mode.
    Type: Grant
    Filed: May 5, 2015
    Date of Patent: February 28, 2017
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Joshua Haeseok Cho, Yunyoung Choi, Bipul Agarwal
  • Patent number: 9583810
    Abstract: A signal line includes a first line portion at a first layer level and a second line portion at a second layer level, which are connected by a first interlayer connection. A first ground portion at the first layer level includes end portions closer to the first line portion than an intermediate portion, and a second ground portion at the second layer level includes end portions closer to the second line portion than an intermediate portion. A second interlayer connection connects one of the end portions of the first ground portion and one of the end portions of the second ground portion. A distance between the first and second interlayer connections is less than a distance between the first line portion and the intermediate portion of the first ground portion and is less than a distance between the second line portion and the intermediate portion of the second ground portion.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: February 28, 2017
    Assignee: Murata Manufacturing Co., Ltd
    Inventors: Noboru Kato, Satoshi Ishino, Jun Sasaki
  • Patent number: 9584095
    Abstract: An acoustic wave device comprises a substrate and an acoustic wave element on one main surface of the substrate. Side surfaces of the substrate comprises a protruding portion which protrudes out at a side of an another main surface closer than a side with the one main surface side.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: February 28, 2017
    Assignee: KYOCERA CORPORATION
    Inventor: Yoshihiro Ookubo
  • Patent number: 9583836
    Abstract: An antenna is connected to a first end of a high-frequency transmission line, and a connector is connected to a second end of the high-frequency transmission line. A characteristic impedance of a microstrip line is higher than characteristic impedances of first and second strip lines, and a characteristic impedance of a coplanar line is higher than a characteristic impedance of the second strip line. Thus, at a certain frequency, a standing wave develops in which the position of the microstrip line and the position of the coplanar line are maximum voltage points and three-quarter-wavelength resonance is a fundamental wave mode. Thus, the cutoff frequency of the high-frequency transmission line is high, and an insertion loss of a signal is significantly reduced to be low over a wide band.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: February 28, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Noboru Kato, Satoshi Sasaki
  • Patent number: 9583809
    Abstract: A high-frequency signal line includes a body with a first layer level and a second layer level; a signal line including a first line portion provided at the first layer level, a second line portion provided at the second layer level, and a first interlayer connection connecting the first line portion and the second line portion; a first ground conductor including a first ground portion provided at the first layer level; a second ground conductor including a second ground portion provided at the second layer level; and a second interlayer connection connecting the first ground portion and the second ground portion. A distance between the first interlayer connection and the second interlayer connection is not less than a maximum distance between the first line portion and the first ground portion and is not less than a maximum distance between the second line portion and the second ground portion.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: February 28, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Noboru Kato, Satoshi Ishino, Jun Sasaki
  • Patent number: 9583807
    Abstract: A filter of the present invention comprises a multilayer substrate, two terminals, a ground conductor and a hybrid resonator. The multilayer substrate includes a plurality of conductor layers and a dielectric configured to isolate said plurality of conductor layers from each other. The hybrid resonator is disposed in the multilayer substrate and comprises a first and a second resonant elements and a coupling strip connecting the first and said second resonant elements. Each resonant element comprises a signal via, a group of ground vias and an artificial dielectric. Each signal via is disposed through the multilayer substrate. Each group of ground vias is disposed through the multilayer substrate and configured to surround the signal via. Each artificial dielectric is disposed in the multilayer substrate and between the signal via and the group of ground vias.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: February 28, 2017
    Assignee: LENOVO INNOVATIONS LIMITED (HONG KONG)
    Inventors: Taras Kushta, Takashi Harada
  • Patent number: 9577303
    Abstract: An attenuator module having a substrate; a attenuator disposed on one surface of the substrate, the attenuator having an input terminal at one end of the attenuator and an output terminal at an opposite end of the attenuator; an electrical conductor disposed on an opposite surface of the substrate; and an electrically conductive via passing from the output terminal through the substrate to the electrical conductor disposed on the opposite surface of the substrate.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: February 21, 2017
    Assignee: RAYTHEON COMPANY
    Inventors: Christopher M. Laighton, Michael T. Borkowski