Patents Examined by Scott S Outten
  • Patent number: 9570786
    Abstract: A transmission line portion of a high-frequency transmission cable includes a dielectric body in which a first ground conductor, a signal conductor, and a second ground conductor are arranged along a thickness direction of the dielectric body from a first principle surface side. The second ground conductor is arranged at a position that does not overlap the signal conductor when viewed in a direction perpendicular or substantially perpendicular to the first principle surface. The third ground conductor and the signal conductor are located at the same position in the thickness direction of the dielectric body. The second and third ground conductors are connected to the first ground conductor via interlayer-connector conductors. The width of the second and third ground conductors is narrower than the width of the signal conductor, but a sum of the widths of the second and third ground conductors is larger than the width of the signal conductor.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: February 14, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Noboru Kato
  • Patent number: 9559661
    Abstract: A duplexer includes: a transmit filter that is connected between an antenna terminal and a transmit terminal and has a plurality of acoustic wave resonators; a receive filter that is connected between the antenna terminal and a receive terminal and has a plurality of acoustic wave resonators; and a delay line or a longitudinal coupling type resonator that is connected in parallel with at least one of the plurality of acoustic wave resonators of the transmit filter and the plurality of acoustic wave resonators of the receive filter and has at least two IDTs (Interdigital Transducers).
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: January 31, 2017
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Shogo Inoue, Masafumi Iwaki, Jun Tsutsumi
  • Patent number: 9559659
    Abstract: Systems, devices, and methods for tunable filters that are configured to support multiple frequency bands, such as within the field of cellular radio communication, can include a first resonator and a second resonator configured to block signals within one or more frequency ranges, and one or more coupling element connected to both the first resonator and the second resonator. The one or more coupling element can be configured to provide low insertion loss within a pass band.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: January 31, 2017
    Assignee: WISPRY, INC.
    Inventor: Jorgen Bojer
  • Patent number: 9548715
    Abstract: A tunable impedance network and a method for tuning the tunable impedance network are disclosed. In one aspect, the tunable impedance network comprises a plurality of transformers connected in series. Each transformer has a primary winding and a secondary winding. The transformers have a voltage transformation ratio of N:1 with N>1. An impedance structure, acting as a resonant circuit together with the inductance of the secondary winding, is connected at the secondary winding of each transformer. A control circuit or processor is configured to tune the imaginary part of at least one of the impedance structures so as to change its resonance frequency to mimic a reference impedance. The control circuit is further configured to tune the real part of at least one of the impedance structures so as to change its Q-factor to mimic the reference impedance.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: January 17, 2017
    Assignee: IMEC
    Inventors: Barend Van Liempd, Jonathan Borremans
  • Patent number: 9548722
    Abstract: Apparatus and methods for reducing glitches in digital step attenuators are disclosed. By configuring a multi-bit DSA such that an attenuation control block changes a plurality of control signals in a manner sequencing individual switches of the DSA, glitches can be reduced and RF signal behavior can be enhanced. The sequence, based upon a unit time delay, causes the transient attenuation value to be bounded between a minimum and maximum and can improve settling time.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: January 17, 2017
    Assignee: Analog Devices Global
    Inventors: Yusuf Alperen Atesal, Peter J. Katzin
  • Patent number: 9543921
    Abstract: Apparatus and methods for controlling overshoot in digital step attenuators are disclosed. By configuring a multi-bit DSA such that an attenuation control block changes a plurality of control signals in a manner preventing a series cascade of attenuation units from having a transient attenuation value less than an initial and final value of attenuation, an overshoot condition can be prevented. Control signals transition the attenuation units to a first state of attenuation before they transition attenuation units to a second state of insertion.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: January 10, 2017
    Assignee: Analog Devices Global
    Inventor: Fatih Kocer
  • Patent number: 9543105
    Abstract: A high power RF energy device component is disclosed that is exposed to high power RF energy in a vacuum environment, and includes a multipactor-inhibiting carbon nanofilm covering at least one surface of the component. A secondary electron efficiency emission (SEE) coefficient of the multipactor inhibiting carbon nanofilm is desirably less than a SEE coefficient of the underlying surface of the component.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: January 10, 2017
    Assignee: Nokomis, Inc.
    Inventors: Patrick Fisher, Walter J. Keller, III
  • Patent number: 9537462
    Abstract: Aspects of the present disclosure are directed to addressing impedance-matching issues. As may be implemented in connection with one or more embodiments, an apparatus includes an integrated circuit (IC) chip having a signal-connection terminal and processing circuitry that passes signals along a communication path that is within the IC chip and connected to the signal-connection terminal. Impedance-matching circuitry operates to provide impedance-matching for the communication path, therein mitigating signal loss due to impedance-mismatching. A chip-mounting structure secures the IC chip and electrically connects thereto at the signal-connection terminal.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: January 3, 2017
    Assignee: NXP, B.V.
    Inventors: Madan Vemula, James Spehar
  • Patent number: 9531340
    Abstract: A communication device changes an applied voltage output from a voltage circuit, and allows a capacitance measuring device to measure the respective capacitance values of a variable capacitance element before and after a change in the applied voltage. The communication device calculates a voltage correction value for correcting an initial variation of the capacitance value of the variable capacitance element using the respective capacitance values of the variable capacitance element before and after the change in the applied voltage, and respective applied voltage values before and after the change, and a correction voltage for canceling the initial variation in the capacitance value of the variable capacitance element, and outputs the correction voltage from the voltage circuit.
    Type: Grant
    Filed: June 11, 2013
    Date of Patent: December 27, 2016
    Assignee: DENSO CORPORATION
    Inventors: Takashi Saitou, Akira Takaoka, Nobuya Watabe, Takatoshi Sekizawa, Munenori Matsumoto
  • Patent number: 9531048
    Abstract: A mode filter provides a low-loss transmission path for RF signals propagating in a first mode, while substantially suppressing at least one second mode. The mode filter includes a proximal port and a distal port, having a respective characteristic cross sectional dimension Dp1 and Dp2, and an electrically conductive hollow tube having a longitudinal axis that extends a length L between a distal end of the proximal port and a proximal end of the distal port. A cross section transverse to the longitudinal axis is non-uniform along length L and has a minimum internal characteristic dimension Dmin at least at a first longitudinal position and a maximum internal characteristic dimension Dmax at least at a second longitudinal position. The mode filter is configured to suppress the at least one second mode by at least 5 dB, and Dmax is less than 2.5 times the greater of Dp1 and Dp2.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: December 27, 2016
    Assignee: Space Systems/Loral, LLC
    Inventor: Behzad Tavassoli Hozouri
  • Patent number: 9525199
    Abstract: In a millimeter waveband filter, electric wave half mirrors are provided in transmission lines of a first waveguide configured to allow electromagnetic waves in a predetermined frequency range of a millimeter waveband to propagate in a TE10 mode and a second waveguide connected to the first waveguide in a state where one end of the second waveguide is inserted into the first waveguide, and the waveguides are relatively moved to vary the interval between the electric wave half mirrors, thereby changing a resonance frequency. The first waveguide is a square waveguide, and the second waveguide is a ridge waveguide in which the outside thereof is a rectangular shape at a predetermined interval with respect to the inside of the first waveguide and a sectional shape of a transmission line has a central portion having a height smaller than both side portions.
    Type: Grant
    Filed: February 16, 2015
    Date of Patent: December 20, 2016
    Assignee: ANRITUS CORPORATION
    Inventors: Takashi Kawamura, Hiroshi Shimotahira
  • Patent number: 9520632
    Abstract: A band-pass filter is provided that is configured to output a signal with a frequency within a desired frequency range and to attenuate signals with frequencies outside the desired frequency range. The band-pass filter comprises a CMOS resonator that comprises a resonator cavity and a reflector. The band-pass filter also comprises an impedance convertor that is configured to inhibit at least some insertion losses on the band-pass filter. The band-pass filter also comprises a variable capacitor that is connected between the CMOS resonator and the impedance convertor. The desired frequency range of the band-pass filter can be tuned by adjusting the capacitance of the variable capacitor.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: December 13, 2016
    Assignee: Tiawan Semiconductor Manufacturing Company Limited
    Inventors: Jun-De Jin, Tzu-Jin Yeh, Chewn-Pu Jou
  • Patent number: 9520853
    Abstract: An attenuator module having an attenuator disposed on a top surface of a substrate, an input terminal at one end of the attenuator and an output terminal at an opposite end of the attenuator. A pair of spaced electrical conductor pads is disposed on a bottom surface of the substrate, a first one of the pads being disposed under the input terminal and a second one of the pads being disposed under the output terminal. A pair of conductive vias passes through the substrate, one conductive via connecting the input terminal to the first one of the pads and the other conductive via connecting the output terminal to the second one of the pads. The module may be used to interconnect two adjacent circuit substrates.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: December 13, 2016
    Assignee: Raytheon Company
    Inventors: Christopher M. Laighton, Michael T. Borkowski, Alan J. Bielunis
  • Patent number: 9515031
    Abstract: In accordance with one aspect of the present description, a transmission line such as a microstrip or stripline transmission line, has stub-shaped projections adapted to compensate simultaneously for both far-end crosstalk (FEXT) induced by inductive coupling between the transmission line and an adjacent transmission line, and also far-end crosstalk induced by inductive coupling between the vertical electrical interconnect at the far end of the transmission line and an adjacent vertical electrical interconnect electrically connected to the adjacent transmission line. In another aspect of the present description, a microstrip transmission line may have multiple stubby line sections having different resistances and impedances to more gradually transition from to the typically low impedance characteristics of vertical interconnects such as the PTH vias and socket connectors. Other aspects are described.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: December 6, 2016
    Assignee: INTEL CORPORATION
    Inventors: Nevin Altunyurt, Kemal Aygun, Kevin J. Doran, Yidnekachew S. Mekonnen
  • Patent number: 9515632
    Abstract: A first coil element includes a first loop-shaped conductor and a second loop-shaped conductor. A second coil element includes a third loop-shaped conductor and a fourth loop-shaped conductor. The first loop-shaped conductor and the second loop-shaped conductor are sandwiched in a stacking direction between the third loop-shaped conductor and the fourth loop-shaped conductor. A conductive pattern which is a portion of the first loop-shaped conductor and a conductive pattern which is a portion of the second loop-shaped conductor are connected in parallel. Then, each of a conductive pattern which is a remaining portion of the first loop-shaped conductor and a conductive pattern which is a remaining portion of the second loop-shaped conductor is connected in series with the parallel circuit.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: December 6, 2016
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Kenichi Ishizuka
  • Patent number: 9490208
    Abstract: A semiconductor device includes a semiconductor chip, a dielectric substrate, and bonding wires. The dielectric substrate includes wiring patterns formed on a surface and a ground metal layer formed on a back side. The semiconductor chip includes an active element and a drain pad that is connected to an output end of the active element. Wiring pattern is formed at a position closer to the drain pad than wiring pattern, wiring pattern and the ground metal layer constitute a first capacitative element, and wiring pattern and the ground metal layer constitute a second capacitative element. The drain pad is connected to wiring pattern through bonding wire, and connected to wiring pattern through bonding wire. Bonding wire and the first capacitative element constitute a high-pass matching circuit.
    Type: Grant
    Filed: May 1, 2015
    Date of Patent: November 8, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Masaaki Nishijima
  • Patent number: 9490516
    Abstract: A transmission line portion of a flat cable includes first regions and second regions connected alternately. In the first region, the transmission line portion is a flexible tri-plate transmission line including a dielectric element including a signal conductor, a first ground conductor including opening portions, and a second ground conductor which is a solidly filled conductor. In the second region, the transmission line portion is a hard tri-plate transmission line including a wide dielectric element including a meandering conductor, and a first ground conductor and a second ground conductor which are solidly filled conductors. A variation width of the characteristic impedance in the second region is larger than a variation width of the characteristic impedance in the first region.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: November 8, 2016
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Noboru Kato, Satoshi Ishino, Jun Sasaki, Kuniaki Yosui, Takahiro Baba, Nobuo Ikemoto
  • Patent number: 9490514
    Abstract: A high-frequency signal transmission line includes a body; a signal line including a first line portion provided to a first layer of the body, a second line portion provided to a second layer of the body alternately being connected; and a first ground conductor provided to the first layer or a third layer positioned on an opposite side of the second layer relative to the first layer, and also overlaid with a plurality of second line portions in planar view from a normal direction of a principal surface of the body, and also not overlaid with a plurality of the first line portions. A property impedance of the first line portion and a property impedance of the second line portion are different from each other.
    Type: Grant
    Filed: January 24, 2013
    Date of Patent: November 8, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Noboru Kato, Satoshi Ishino, Jun Sasaki
  • Patent number: 9485854
    Abstract: Embodiments of the present disclosure are directed toward techniques and configurations for electrical signal absorption in an interconnect disposed in a printed circuit board (PCB) assembly. In one instance, a PCB assembly may comprise a substrate, and an interconnect formed in the substrate to route an electrical signal within the PCB. The interconnect may be coupled with a connecting component that is disposed on a surface of the PCB. An absorbing material may be disposed on the PCB to be in direct contact with at least a portion of the connecting component to at least partially absorb a portion of the electrical signal. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: November 1, 2016
    Assignee: Intel Corporation
    Inventors: Shaowu Huang, Kai Xiao, Beom-Taek Lee, Boping Wu, Xiaoning Ye
  • Patent number: 9467114
    Abstract: The invention relates to an impedance-matching device comprising a circuit consisting of a plane substrate (27) whereon at least one conductive stripline (26) is arranged, at least one conductive spring (22) applying mechanical stress on the circuit.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: October 11, 2016
    Assignees: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventor: Claude Baret