Abstract: A device for coupling RF power into a waveguide includes a push-pull output stage that includes an input and an output, a filter arrangement that is connected to the output of the push-pull output stage, and an induction loop that is connected to the filter arrangement is provided.

Abstract: In one embodiment, the present invention is a communication connector, comprising a compensation circuit for providing a compensating signal to approximately cancel an offending signal over a range of frequency, the compensation circuit including a capacitive coupling with a first magnitude growing at a first rate over the range of frequency and a mutual inductive coupling with a second magnitude growing at a second rate over the range of frequency, the second rate being greater than the first rate (e.g., the second rate approximately double the first rate).

Abstract: An impedance matching device includes a first variable capacitor connected to an RF power source and including a first shaft moving linearly, a first linear motion unit axially coupled to the first shaft of the first variable capacitor to provide linear motion, a first insulating joint connecting the first shaft to a first driving shaft of the first linear motion unit, and a first displacement sensor adapted to measure a movement distance of the first driving shaft of the first linear motion unit.

Abstract: A high-frequency signal line includes a base layer including first and second principal surfaces, a signal line provided on the first principal surface, a ground conductor provided on the first principal surface along the signal line, and a plurality of high-permittivity portions arranged along the signal line and in contact with a portion of both the signal line and the ground conductor, each of the high-permittivity portions having a higher specific permittivity than the base layer.

Abstract: In various embodiments, a broadband matching circuit is disclosed. In one embodiment. the broadband matching circuit comprises a low-pass matching section, a quarter-wavelength transformer, and a high-pass matching section.

Abstract: Systems (100) and methods (900) for providing a compliant micro-coaxial interconnect with an integrated circuit or other electronic device. The methods comprise: forming a well (108) in a first substrate (102) having a first Coefficient of Thermal Expansion (“CTE”); forming at least one three-dimensional micro-coaxial interconnect (100) on the first substrate so as to have a cantilevered end portion (110) disposed over the well; and using a first coupler (606) to electrically couple the cantilevered end portion to a second substrate (604) having a second CTE different from the first CTE. The cantilevered end portion has an angled joint (302) so that at least one of a pushing force and a pulling force applied thereby to the first coupler is minimized when mismatching movements of the first and second substrates occur.

Abstract: This invention is the Optically Powered and Controlled Non-Foster Circuit (OPCNFC) that is electrically floating; i.e., it does not have any metallic electrical/conductive connection to a power supply, ground, or control signal. Rather power and control signals are applied to the OPCNFC using optical energy. The Non-Foster Circuit (NFC) synthesizes negative inductance, negative capacitance, and/or negative resistance between metallic patches disposed in an array of an Artificial Impedance Surface (AIS).

Abstract: A matching network requiring a predetermined shunt capacitance in a transformation of the impedance at the output to a transistor to a load. The matching network includes a vertically stacked shunt capacitor, for providing the entire predetermined capacitance, and a series DC blocking capacitor.

Abstract: A variable matching circuit includes a transformer which is disposed between first and second transistor circuits. A primary inductor device and a secondary inductor device are magnetically coupled in the transformer. The primary inductor device is connected between an output terminal of the first transistor circuit and a bias circuit for the first transistor circuit. The secondary inductor device is connected between an input terminal of the second transistor circuit and a bias circuit for the second transistor circuit. Connection points between the primary inductor device and the bias circuit for the first transistor circuit and between the secondary inductor device and the bias circuit for the second transistor circuit are connected to first and second capacitive elements, respectively. At least one of inductance values of the respective primary and secondary inductor devices and capacitance values of the respective first and second capacitive elements is variable.

Abstract: A method and circuit for significantly reducing the switching transients of a digital step attenuator (DSA) by employing a segmented architecture that combines thermometer and binary coded stages. This approach reduces the number of attenuator stages switching at the same time and thus minimizes any glitch amplitude. Embodiments of a segmented DSA may be realized with “pi” and “bridged-T” attenuators, as well as with simple tuned L-pad attenuators combined in a resistor ladder network.

Abstract: An interposer element in a multidimensional integrated circuit with stacked elements has one or more conductors, especially power supply lines, coupled through decoupling networks defining low impedance shunts for high frequency signals to ground. The interposer has successive tiers including silicon, metal and dielectric deposition layers. The decoupling network for a conductor has at least one and preferably two reactive transmission lines. A transmission line has an inductor in series with the conductor and parallel capacitances at the inductor terminals. The inductors are formed by traces in spaced metal deposition layers forming coil windings and through vias connecting between layers to permit conductor crossovers. The capacitances are formed by MOScaps in the interposer layers. An embodiment has serially coupled coils with capacitances at the input, output and junction between the coils, wherein the coils are magnetically coupled to form a transformer.

Abstract: Embodiments of the present invention provide for a transmission line stub that includes a via stub of a conductive via. The conductive via includes a via stub and a coupling element, wherein a first transmission line configured to transmit a signal is coupled to the conductive via at the intersection of the via stub and the coupling element. The coupling element is configured to transmit the signal from the first transmission line. A line stub electrically coupled to the via stub, wherein the length of the line stub is selected such that the transmission line stub having a length of the sum of the lengths of the via stub and the line stub is configured to suppress a preselected frequency.

Abstract: An impedance matching device includes a matching element array unit with a matching element array to which a transmission pulse and a received pulse pass, an extraction/calculation unit extracting pulse information from the transmission pulse and the received pulse, calculating impedance values corresponding to the pulse information, and calculating an impedance value having best response characteristics of the received pulse with respect to the transmission pulse as a matching impedance value, an array control unit routing the matching element array unit according to the matching impedance value, a first converter converting a frequency of the transmission pulse into a carrier frequency and outputting the transmission pulse to the matching element array unit, a second converter converting the carrier frequency into a low frequency, and a converter control unit outputting a signal for controlling the frequency converting of the first converter and the second converter.

Abstract: A first transistor and a second transistor cascade-connected, a wiring which connects a drain of the first transistor and a gate of the second transistor, a capacitor whose one terminal is connected between the first transistor and the second transistor cascade-connected and whose other terminal is grounded, and a control circuit are included. The control circuit adjusts an inductance value by controlling a capacitance value of the capacitor or gate voltage of the first transistor or the second transistor.

Abstract: Hybrid-coding, multi-cell architecture and operating techniques for step devices provide advantages over binary-coded and thermometer-coded step devices by minimizing or avoiding glitches common in the transient response of binary-coded step devices and by minimizing or avoiding significant increases or degradation in one or more of area, package dimensions, pin counts, power consumption, insertion loss and parasitic capacitance common to thermometer-coded step devices having equivalent range and resolution.

Abstract: Disclosed is an insulation circuit comprising: a first pattern formed on a first layer of a substrate, that receives high-frequency signals; a second pattern formed on this first layer next to the first pattern and that outputs the high-frequency signals received by the first pattern; a third pattern formed on a second layer different from the first layer of the substrate and connected with a signal ground, in such a way that the first and second patterns respectively overlap in plan view; and a fourth pattern formed on the second layer next to the third pattern and connected with a frame ground, in such a way that the first and second patterns respectively overlap in plan view.

Abstract: A hybrid load pull tuner system uses a combination of a passive and active tuner system. A closed loop system means that the system is independent of the available power of the device under test (DUT). The proposed hybrid system is formed around a closed loop Gamma Boosting Unit (GBU) consisting of two back to back broadband directional couplers, broadband variable time-delay, broadband variable phase-shifter and a broadband microwave amplifier, all inserted in the coupled path of the couplers; the GBU is connected in cascade with a passive tuner and boosts its reflection factor; for this the amplifier must have enough linear power and gain to match the difference between the power reflected back to the DUT by the passive tuner and the desired total reflected power to reach the expected Gamma, considering coupling loss and insertion loss of the test fixture.

Abstract: Apparatus and methods for equalization are provided. In certain implementations, an equalizer includes first and second feedback resistors, first and second equalization resistors, an equalization capacitor, and an amplification circuit that includes first to fourth input terminals and first and second output terminals. The amplification circuit can receive a differential input voltage signal between the first and third input terminals, and the first and second equalization resistors and the equalization capacitor are electrically connected in series between the second and fourth input terminals with the equalization capacitor between the first and second equalization resistors. Additionally, the first feedback resistor is electrically connected between the first output terminal and the second input terminal, and the second feedback resistor is electrically connected between the second output terminal and the fourth input terminal.

Abstract: A RF filter system for filtering radio frequency is provided. A first plurality of capacitors, said first plurality of capacitors comprising at least a first capacitor and a second capacitor is provided. A first conductor and second conductor are wound around a first core member to forma first inductor formed from the first conductor and a second inductor formed from the second conductor, a first end of said first conductor being connected to a first end of a first load and to a first end of said first capacitor, wherein a first end of said second conductor being connected to a second end of the first load and a second end of said second capacitor. A first variable component has a first end connected to ground and a second end connected to a second end of said first capacitor and a first end of said second capacitor.

Abstract: A filter circuit includes: a filter element having a first terminal connected to an antenna, a second terminal connected to a receiving circuit, and a third terminal connected to a transmission circuit; a first inductor, a second inductor, and a third inductor connected in series between the first terminal and the third terminal of the filter element; a fourth inductor that has one end connected to a connecting node connecting the first inductor and the second inductor and that has the other end grounded; and a fifth inductor that has one end connected to a connecting node connecting the second inductor and the third inductor and that has the other end grounded.