Patents Examined by Sean Weinman
  • Patent number: 7346791
    Abstract: A clock controller controls a clock generated by a clock generator to determine a clock frequency. A computing device executes software obtained from a storage in accordance with the clock supplied via the clock controller. An exclusive processing section detector detects the start and end of an exclusive processing section which is a section during which an exclusive processing is executed. A clock control judging device commands the clock controller to decrease the clock frequency if the exclusive processing section detector has detected the start of a specific processing section, while commanding the clock controller to decrease the clock frequency if the exclusive processing section detector has detected the end of the specific processing section.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: March 18, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuomi Kato, Masashige Mizuyama
  • Patent number: 7320081
    Abstract: A clock-signal generation device which changes an average frequency of a clock signal independently of a reference clock signal. A reference-clock-signal generation circuit generates a reference clock signal. A frequency-division circuit divides the frequency of the reference clock signal by using a natural number equal to or greater than one so as to generate a frequency-divided signal. A control circuit controls the frequency-division circuit so as to modify the frequency-divided signal by inserting extension cycles into the frequency-divided signal at predetermined intervals, and output the modified, frequency-divided signal as a clock signal. An output circuit outputs the clock signal generated by the control circuit. Therefore, the average frequency of the clock signal can be set arbitrarily and independently of the reference clock signal.
    Type: Grant
    Filed: March 13, 2003
    Date of Patent: January 15, 2008
    Assignee: Fujitsu Limited
    Inventors: Nobuhiko Akasaka, Toshiyuki Igarashi
  • Patent number: 7302592
    Abstract: An integrated circuit comprising a processor, non-volatile memory, an input for receiving power from a power supply and a power detection unit, wherein the integrated circuit is configured to enable multi-word writes to the non-volatile memory, the power detection unit being configured to: monitor a quality of power supplied to the input; and in the event the quality of the power drops below a predetermined threshold, preventing subsequent words in any multi-word write currently being performed from being written to the memory.
    Type: Grant
    Filed: December 2, 2003
    Date of Patent: November 27, 2007
    Assignee: Silverbrook Research Pty Ltd
    Inventors: Gary Shipton, Simon Robert Walmsley
  • Patent number: 7287173
    Abstract: In some embodiments, a method and apparatus for power performance monitors for low-power program tuning are described. In one embodiment, the method includes the computation of power consumption levels of instructions of an application. Once consumption levels are computed, instruction sequences of the application are identified that exhibit an excess power consumption level. For the identified instruction sequences, the application program is recompiled to reduce power consumption levels of one or more of the identified instruction sequences. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: October 23, 2007
    Assignee: Intel Corporation
    Inventor: Cheng-Hsueh Hsieh
  • Patent number: 7281145
    Abstract: A method of managing resources in a data processing configuration includes allocating system resources to an application to ensure a specified level of performance for the application. A system parameter is then modified to conserve power consumption upon detecting a condition resulting in a reduction of available system power. The original system resource allocation is then modified to maintain the specified level of performance following the modification of the system parameter. The system resources may include system CPU cycles and allocating system resources may include allocating a specified percentage of the CPU cycles to a high priority application. The reduction of available system power may be caused by an excessive ambient temperature or the failure of a power supply. Modifying the system parameter to conserve power consumption includes throttling the CPU speed and then dynamically increasing the percentage of CPU cycles allocated to the high priority application.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: October 9, 2007
    Assignee: International Business Machiness Corporation
    Inventors: Aaron Eliahu Merkin, William Bradley Schwartz
  • Patent number: 7281126
    Abstract: A method for installing an image on a client including obtaining a wanboot binary from the boot server, determining whether the wanboot binary is valid, obtaining a security payload from the boot server using the wanboot binary if the wanboot binary is valid, establishing a first secure connection between the client and boot server, obtaining a boot file system from the boot server using the first secure connection, installing the boot file system on the client to obtain a kernel, establishing a second secure connection between the client and an installation server using the security payload and the kernel, obtaining an installation image from the installation server using the kernel and the second secure connection, and installing the installation image on the client.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: October 9, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Carl F. Smith, Michael W. Carney, Paul Sangster
  • Patent number: 7278034
    Abstract: An integrated circuit comprising a processor, a memory that the processor can access, a memory access unit for controlling accesses to the memory, an input for receiving power for the integrated circuit from an external power source, and a power detection unit, the power detection unit being configured to: monitor a quality of power supplied to the input; and in the event the quality of the power drops below a predetermined threshold, disabling a power supply to circuitry for use in writing to the memory, such that the memory access unit's ability to alter data in the memory is disabled prior to address or data values to be written to the memory becoming unreliable due to failing power.
    Type: Grant
    Filed: December 2, 2003
    Date of Patent: October 2, 2007
    Assignee: Silverbrook Research Pty Ltd
    Inventor: Gary Shipton
  • Patent number: 7278037
    Abstract: A storage control device comprises: a first I/O control unit for controlling read/write of data from/to one or more HDDs (Hard Disk Drives); a second I/O control unit whose current consumption is approximately equal to that of the first I/O control unit; two or more first power supply devices supplying electric power to the first I/O control unit; two or more second power supply devices supplying electric power to the second I/O control unit; and at least three circuit breakers receiving electric power supplied from outside and supplying the electric power to the first and second power supply devices while interrupting the supply of the electric power when current exceeding a preset level passes. Each of the first/second power supply devices includes a current balancing circuit for equalizing output currents of the first/second power supply devices.
    Type: Grant
    Filed: August 2, 2005
    Date of Patent: October 2, 2007
    Assignee: Hitachi, Ltd.
    Inventor: Masahiro Sone
  • Patent number: 7275173
    Abstract: Method for measuring and compensating skews of data transmission lines connecting at least one data transmission device with a data reception device via a parallel data bus comprising for each data transmission line the following steps: measuring the relative time delay of the data transmission line by transmitting a determined sequence of measurement vectors (MV) each consisting of an alternating bit pattern via said data transmission line, wherein the bit alternation frequency is halfed with every transmitted measurement vector (MV); comparing the received measurement vectors (MV?) transmitted via said data transmission line with corresponding reference vectors (RV) stored in said data reception device; shifting the received measurement vectors by inserting data unit intervals (UI) until a received measurement vector (MV?) matches a corresponding reference vector (RV); calculating a relative skew of the data transmission line depending of the number of inserted data unit intervals (UI) with respect to a slo
    Type: Grant
    Filed: March 24, 2004
    Date of Patent: September 25, 2007
    Assignee: Infineon Technologies AG
    Inventor: Paul Georg Lindt
  • Patent number: 7272832
    Abstract: A computer system includes at least one processor and a memory. A secure platform is stored in the memory for controlling the processor and the memory. An operating system image is stored in the memory for controlling the processor and the memory, and operates on top of the secure platform. An end user application is stored in the memory for controlling the processor and the memory, and operates on top of the operating system image. The secure platform is configured to provide a secure partition within the memory for storing secret data associated with and accessible by the end user application. The secure partition is inaccessible to the operating system and other tasks operating on top of the secure platform.
    Type: Grant
    Filed: October 25, 2001
    Date of Patent: September 18, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Robert D. Gardner
  • Patent number: 7266708
    Abstract: A processor disclosed herein comprises a clock configured to drive clock signals and a processor pipeline having a plurality of stages. The processor includes processor idling circuitry, which is configured within the stages and is responsive to an idle_request signal. A first stage comprises a device for stopping incoming instruction values from being further processed when the idle_request signal is received. Also, at least two of the remaining stages comprise idle_flag logic configured to receive the idle_request signal, the idle_flag logic further configured to transmit an idle_flag through the processor pipeline.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: September 4, 2007
    Assignee: VIA Technologies, Inc.
    Inventor: William V. Miller
  • Patent number: 7257722
    Abstract: A storage control device comprises: a first I/O control unit for controlling read/write of data from/to one or more HDDs (Hard Disk Drives); a second I/O control unit whose current consumption is approximately equal to that of the first I/O control unit; two or more first power supply devices supplying electric power to the first I/O control unit; two or more second power supply devices supplying electric power to the second I/O control unit; and at least three circuit breakers receiving electric power supplied from outside and supplying the electric power to the first and second power supply devices while interrupting the supply of the electric power when current exceeding a preset level passes. Each of the first/second power supply devices includes a current balancing circuit for equalizing output currents of the first/second power supply devices.
    Type: Grant
    Filed: August 2, 2005
    Date of Patent: August 14, 2007
    Assignee: Hitachi, Ltd.
    Inventor: Masahiro Sone
  • Patent number: 7257721
    Abstract: A system and method for power management in computer systems. System status assessed by a Northbridge, and the result transferred to a Southbridge. A system control table is provided in the Southbridge, whereby power management without software control is provided.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: August 14, 2007
    Assignee: VIA Technologies, Inc.
    Inventors: Chien-Ping Chung, Chung-Ching Huang, Jing-Rung Wang
  • Patent number: 7246249
    Abstract: A reproduction apparatus and method for reproducing selected digital data reproduces digital data selected by a user, detects remaining power of a battery, and determines whether the selected digital data can be reproduced to the end or not based on the detected remaining power. Before the selected digital data is reproduced, if it is determined that there is sufficient battery power to reproduce the selected digital data to the end, then the selected digital data is reproduced. If not, a warning is provided and the user selects either a first reproduction mode or a second reproduction mode. If the first reproduction mode is selected, the selected digital data is reproduced. If the second reproduction mode is selected, summary data that includes a summary of the selected digital data is reproduced.
    Type: Grant
    Filed: June 4, 2003
    Date of Patent: July 17, 2007
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hirotaka Shiiyama
  • Patent number: 7243222
    Abstract: A method of storing data related to system initialization in a data hub in a manner which provides accessibility to the data in either the pre-boot environment or the run-time environment.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: July 10, 2007
    Assignee: Intel Corporation
    Inventors: Michael A. Rothman, Vincent J. Zimmer
  • Patent number: 7243246
    Abstract: A system and method for determining the type of power source supplying electrical power to a power adapter for a portable computer. In an embodiment of the invention, a power adapter for a portable computer is provided with a first power identification circuit for generating system information relating to operation on an AC power source and a second power identification circuit for generating system information relating to operation on a DC power source. A power source detector is operable to detect whether the electrical power supplied to the power adapter is AC or DC power and to enable the first or second power identification circuit, respectively, thereby generating a data signal indicating the respective type of power source. The data signal is provided to a subsystem manager in the computer to allow identification of the type of external power source.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: July 10, 2007
    Assignee: Dell Products L.P.
    Inventors: Robert Allen, William O. Bain
  • Patent number: 7243247
    Abstract: Embodiments of a device and method for managing power in a computer system can reduce power consumption. A circuit such as a filter driver having a packet monitoring function can be used to perform a check on whether a specific device such as an audio or USB device is in use and a check on the power management state of a CPU. Depending on the checked results, the filter driver forces the CPU power management state to enter a specific power saving state. Accordingly, unnecessary power consumption caused by the CPU in an idle state can be reduced or prevented. Further, heat generated by the CPU can be reduced or suppressed.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: July 10, 2007
    Assignee: LG Electronics Inc.
    Inventor: Jang Geun Oh
  • Patent number: 7237106
    Abstract: A programmable device with an improved system for loading configuration data compresses configuration data by composing configuration data out of pairs of control words and data words. The configuration data is divided into configuration words. Each configuration word is further divided into a number of configuration blocks. In a control word/data word pair, the control word determines which configuration blocks in the configuration word will be loaded with the data word. Each configuration block designated by the control word will be simultaneously loaded with the data word. By taking advantage of the symmetry within the control word, typically only a small number of control word/data word pairs will be required to load a complete control word. If a given control word does not have sufficient symmetry, the programmable device can instead use an alternate system for loading the configuration word.
    Type: Grant
    Filed: July 18, 2003
    Date of Patent: June 26, 2007
    Assignee: Altera Corporation
    Inventors: Paul Tracy, Adam Wright
  • Patent number: 7228301
    Abstract: The present invention provides methods, systems, and computer program products for normalizing document search terms through use of an alias database, as may be found in an alias relationship file, such as a directory service. A gatherer module receives as input (or crawls through) several documents in series or in parallel and can recognize data segments as related to one of the aliases in the alias relationship file. The gatherer then associates the document appropriately so that a search engine may find all documents associated with a search term, regardless of whether the term has undergone several name changes (various aliases) over the course of time. Accordingly, a user may then search for a person's name, and receive as a search result all documents listing the person's name, as well as documents listing, for example, only the person's email address.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: June 5, 2007
    Assignee: Microsoft Corporation
    Inventors: Dmitriy Meyerzon, Kenji C. Obata
  • Patent number: 7213139
    Abstract: A method of computer start-up, using the configuration information of the internal and peripheral components of the computer system and information required for executing initialization of these components, and performing fast test and initialization of the components of the system. The information is pre-stored in the computer system. The present invention can perform fast start-up of the computer, significantly reduce the time needed to start up the computer, improve the efficiency of start-up of the computer, and save the waiting time for users.
    Type: Grant
    Filed: August 22, 2001
    Date of Patent: May 1, 2007
    Assignee: Legend (Beijing) Limited
    Inventor: JianHui Zhang