Patents Examined by Seokjin Kim
  • Patent number: 11374306
    Abstract: An electronic device comprising a metal case having a metal pad attached thereto is disclosed. According to the present invention, the electronic device comprises: a metal case having a metal terminal part formed therein; a metal pad joined to the metal terminal part by laser welding; and a conductive first coating layer coated on one surface of the metal pad, wherein the light reflectivity of the first coating layer is lower than the light reflectivity of the metal pad.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: June 28, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ja-myeong Koo, Jeong-gen Yoon, Young-chul Lee, Myeong-hwa Kim, Tae-hyeong Kim, Yeon-kwan Moon, Min-goo Seo, Seung-yup Lee
  • Patent number: 11367012
    Abstract: A tunable resonator is formed by shunting a set of asymmetric DC-SQUIDs with a capacitive device. An asymmetric DC-SQUID includes a first Josephson junction and a second Josephson junction, where the critical currents of the first and second Josephson junctions are different. A coupling is formed between the tunable resonator and a qubit such that the capacitively-shunted asymmetric DC-SQUIDs can dispersively read a quantum state of the qubit. An external magnetic flux is set to a first value and applied to the tunable resonator. A first value of the external magnetic flux causes the tunable resonator to tune to a first frequency within a first frequency difference from a resonance frequency of the qubit, the tunable resonator tuning to the first frequency causes active reset of the qubit.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: June 21, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Baleegh Abdo
  • Patent number: 11362432
    Abstract: A radio frequency (RF) aperture includes an interface printed circuit board. An array of electrically conductive tapered projections have bases disposed on a front side of the interface printed circuit board and extend away from the front side of the interface printed circuit board. Chip baluns are mounted on the back side of the interface printed circuit board. Each chip balun has a balanced port electrically connected with two neighboring electrically conductive tapered projections via electrical feedthroughs passing through the interface printed circuit board. Each chip balun further has an unbalanced port, and RF circuitry disposed at the back side of the interface printed circuit board is electrically connected with the unbalanced ports of the chip baluns. The electrically conductive tapered projections include dielectric tapered projections and an electrically conductive layer disposed on an inner or outer surface of the dielectric tapered projections.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: June 14, 2022
    Assignee: Battelle Memorial Institute
    Inventors: Daniel A. Perkins, Daniel G. Loesch, Donald C. Discher, Raphael Joseph Welsh
  • Patent number: 11349480
    Abstract: Logic circuits constructed with magnetoelectric (ME) transistors are described herein. A ME logic gate device can include at least one conducting device, for example, at least one MOS transistor; and at least one ME transistor coupled to the at least one conducting device. The ME transistor can be a ME field effect transistor (ME-FET), which can be can be an anti-ferromagnetic spin-orbit read (AFSOR) device or a non-AFSOR device. The gates and logic circuits described herein can be included as standard cells in a design library. Cells of the cell library can include standard cells for a ME inverter device, a ME minority gate device, a ME majority gate device, a ME full adder, a ME XNOR device, a ME XOR device, or a combination thereof.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: May 31, 2022
    Assignees: BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, BOARD OF REGENTS OF THE UNIVERSITY OF NEBRASKA, INTEL CORPORATION
    Inventors: Nishtha Sharma Gaul, Andrew Marshall, Peter A. Dowben, Dmitri E. Nikonov
  • Patent number: 11349209
    Abstract: A method for manufacturing a scanning antenna with a plurality of antenna units arrayed therein, the scanning antenna including a TFT substrate including a first dielectric substrate, a TFT, gate bus lines, source bus lines, and a plurality of patch electrodes, a slot substrate including a second dielectric substrate and a slot electrode including a plurality of slots disposed corresponding to the plurality of patch electrodes, a liquid crystal layer, and a reflective conductive plate, includes a step (a) of depositing a first conductive film containing copper on a first main surface of the second dielectric substrate, a step (b) of, after step (a), bringing the first conductive film into contact with an atmosphere to form an oxide film on a surface of the first conductive film, and a step (c) of, after step (b), depositing a second conductive film containing copper on the oxide film.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: May 31, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Katsunori Misaki
  • Patent number: 11328839
    Abstract: Energy and a control signal may be provided using a coupled power and control cable. The coupled power and control cable may comprise a power cable, a control cable, and an overall jacket. The power cable may be connected between a switch and a fixture and may provide energy to the fixture from the switch. The control cable may be connected between the control circuit and the fixture and may provide the control signal to the fixture from the control circuit. The power cable and the control cable may be disposed beneath the overall jacket.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: May 10, 2022
    Assignee: SOUTHWIRE COMPANY, LLC
    Inventors: Randy D. Kummer, Scotty Joe Ledbetter
  • Patent number: 11323118
    Abstract: A combinational logic circuit includes input circuitry to receive a first input signal that transitions between upper and lower voltages of a first voltage domain, and to generate, in response to the transitions of the first input signal, a first localized signal that transitions between upper and lower voltages of a second voltage domain. The combinational logic circuit additionally includes output circuitry to generate a first output signal that transitions between the upper and lower supply voltages of the first voltage domain based at least in part on the transitions of the first localized signal.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: May 3, 2022
    Assignee: Rambus Inc.
    Inventors: Frederick A. Ware, John Eric Linstadt
  • Patent number: 11322818
    Abstract: The present invention relates to a communication technique which fuses a 5G communication system with IoT technology to support higher data transmission rates after a 4G system, and system thereof. In addition, the present invention provides an antenna assembly which comprises: an antenna array which includes at least one antenna; a film layer which is made of at least one insulating material, spaced apart from the antenna array by a predetermined first distance and joined to one side of a window; and an installation aid which has a surface fixed and attached to the window and the other surface on which an antenna array seating portion is formed.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: May 3, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Junsig Kum, Yoongeon Kim, Seungtae Ko, Hyunjin Kim, Youngju Lee
  • Patent number: 11309896
    Abstract: A reconfigurable logic circuit comprises first, second and third switching circuits arranged for receiving first, second and third input bits, respectively, and each arranged for being configured in a mode wherein the corresponding input bit is passed on or in a mode; a first exclusive OR logic block operable on the outputs of the first, second and third switching circuits and arranged to output a sum bit; fourth, fifth and sixth switching circuits arranged for receiving a fourth, fifth and sixth input bits and arranged for being configured in a mode; first, second and third AND logic blocks, each arranged for receiving a different pair of the outputs of certain switching circuits; a second exclusive OR logic block operable on the outputs of certain AND logic blocks and arranged to produce a carry output bit.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: April 19, 2022
    Assignees: KATHOLIEKE UNIVERSITEIT LEUVEN, UNIVERSITÀ DELLA SVIZZERA ITALIANA, ECOLE POLYTECHNIQUE FÉDÉRALE DE LAUSANNE (EPFL)
    Inventors: Nele Mentens, Francesco Regazzoni, Edoardo Charbon
  • Patent number: 11301415
    Abstract: Systems, methods, and devices for enhancing the flexibility of an integrated circuit device with partially reconfigurable regions are provided. For example, a discovery interface may determine and/or communicate a suitable logical protocol interface to control data transfer between regions on the integrated circuit device. The techniques provided herein result in more flexible partial reconfiguration options to enable greater compatibility between accelerator hosts and accelerator function units.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: April 12, 2022
    Assignee: Intel Corporation
    Inventor: Evan Custodio
  • Patent number: 11289816
    Abstract: The present disclosure relates to a horn antenna or waveguide system comprising a corrugated horn or waveguide, wherein the corrugation takes the form of a helical spiral along the inner surface of the horn or waveguide. The present disclosure further relates to radar antenna.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: March 29, 2022
    Assignees: TOYOTA MOTOR EUROPE, TEADE AB
    Inventors: Gabriel Othmezouri, Harald Merkel
  • Patent number: 11264710
    Abstract: A mounting structure for protecting a transceiver located on an underside of a manhole cover is formed from a metal or rugged plastic in the shape of a truncated dome or cone with a sloping sidewall and a cavity configured to receive a transceiver, wherein the mounting structure is mountable to an underside of the manhole cover. A data communication system for an enclosure comprises a transceiver configured to communicate with a network outside of the enclosure and a mounting structure to mount the transceiver to an underside of the manhole cover. The mounting structure is configured to protect the transceiver from damage during removal of the manhole cover from the entrance port of the enclosure.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: March 1, 2022
    Assignee: 3M Innovative Properties Company
    Inventors: Ernesto M. Rodriguez, Jr., Steven E. Turch
  • Patent number: 11251523
    Abstract: Aspects of the disclosed technology relate to an active array system that can form and steer a directed beam across its aperture. The disclosed array system utilizes a novel configuration that significantly reduces a number of transmit and receive elements. In some aspects, the disclosed array system can be configured with a modular design, for example, to permit the extension of the transmit/receive array, e.g., to increase/decrease aperture size. In other aspects, the disclosed array system may be configured to dispose the elements of either the first or second group of radiators in a modular fashion.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: February 15, 2022
    Assignee: ST TECHNOLOGIES LLC
    Inventors: Philippe Kassouf, Long Bui, Jeb Binkley
  • Patent number: 11251542
    Abstract: An antenna array for a radar sensor, having an antenna designed as a group antenna and operable as a transmit antenna and having an antenna configuration operable as a receive antenna, wherein the array has, in addition to the first antenna designed as a group antenna, a second antenna operable as a transmit antenna that has a smaller aperture than the first antenna, and the first and second antenna are designed for the transmission of radar waves having polarization orthogonal to one another, and the antenna configuration operable as a receive antenna is sensitive to both directions of polarization.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: February 15, 2022
    Assignee: Robert Bosch GmbH
    Inventors: Klaus Baur, Marcel Mayer
  • Patent number: 11245397
    Abstract: A signal transmitting and receiving apparatus including: a first on-die termination circuit connected to a first pin through which a first signal is transmitted or received and, when enabled, the first on-die termination circuit is configured to provide a first termination resistance to a signal line connected to the first pin; a second on-die termination circuit connected to a second pin through which a second signal is transmitted or received and, when enabled, the second on-die termination circuit is configured to provide a second termination resistance to a signal line connected to the second pin; and an on-die termination control circuit configured to independently control an enable time and a disable time of each of the first on-die termination circuit and the second on-die termination circuit.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: February 8, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Changkyo Lee, Dongkeon Lee, Jinhoon Jang, Kyungsoo Ha, Kiseok Oh, Kyungryun Kim
  • Patent number: 11233333
    Abstract: The present disclosure relates to a tunable waveguide system comprising a waveguide configured to guide radio waves in at least two dimensions, and an electronically tunable metamaterial configured to tune the radio waves by electronically changing its dielectric and/or conductive characteristics. The present disclosure further relates to a radar antenna system.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: January 25, 2022
    Assignees: TOYOTA MOTOR EUROPE, TEADE AB
    Inventors: Gabriel Othmezouri, Harald Merkel
  • Patent number: 11233514
    Abstract: A subsystem interface, a semiconductor device including the subsystem interface, and a communications method of the semiconductor device are provided, the subsystem interface comprising a transmitter including a first transmission port configured to transmit a first clock signal, a second transmission port configured to transmit a first data signal, a first reception port configured to receive a first flow control signal, and a third transmission port configured to transmit a first synchronization signal, a receiver including a second reception port configured to receive a second clock signal, a third reception port configured to receive a second data signal, a fourth transmission port configured to transmit a second flow control signal, a fourth reception port configured to receive a second synchronization signal, and a control module configured to control operations of the transmitter and the receiver, including performing a transmitter hand-shake by sending a request signal from the second transmission por
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: January 25, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Dong Sik Cho
  • Patent number: 11233330
    Abstract: The monopole wire-plate antenna includes a ground plane, a roof arranged at a distance from the ground plane and at least one electrically conductive element electrically linking the ground plane to the roof. The antenna includes a supply loop arranged substantially orthogonally with respect to the ground plane, the supply loop being open such that it has two opposing longitudinal ends arranged so as to be linked to a differential connection.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: January 25, 2022
    Assignee: Commissariat a l'energie atomique et aux energies alternatives
    Inventors: Olivier Clauzier, Serge Bories, Christophe Delaveaud
  • Patent number: 11228119
    Abstract: A phased array antenna system comprises a feeding network which includes power combiners/dividers and an amplitude tapering system. The phased array antenna system comprises a plurality of antenna elements coupled to the feeding network. The amplitude tapering system is configured to generate amplitude coefficients and apply an amplitude tapering function on a transmitted or received radio frequency signal. The amplitude tapering function comprises a combination of a least two disparate amplitude tapering functions.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: January 18, 2022
    Assignee: Palo Alto Research Center Incorporated
    Inventors: David Eric Schwartz, Shabnam Ladan
  • Patent number: 11217898
    Abstract: A continuous antenna array includes a plurality of antenna elements whose opposing electrodes create an electric field that excites polarization currents in an enclosed dielectric. Each of the antenna elements comprises one or more stripline feeds configured to provide a flat form factor and apply a signal with controlled phase differences between the plurality of antenna elements.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: January 4, 2022
    Assignee: Triad National Security, LLC
    Inventors: Frank L. Krawczyk, John Singleton, Andrea Caroline Schmidt