Patents Examined by Sharon Gibson
  • Patent number: 6265138
    Abstract: A process and apparatus for carrying out the removal of a coating substance from the sidewalls of a surface to be stripped comprising, providing a laser beam incidence on the surface at an incidence angle &agr; relative to the plane of the surface being treated, wherein the angle &agr;>0, and periodically switching or gradually changing the azimuth of the beam incidence plane.
    Type: Grant
    Filed: April 29, 1998
    Date of Patent: July 24, 2001
    Assignee: Oramir Semiconductor Equipment Ltd.
    Inventors: Menachem Genut, Boris Livshits (Buyaner), Ofer Tehar-Zahav, Eliezer Iskevitch
  • Patent number: 6153357
    Abstract: Herein disclosed is an exposure technology for a semiconductor integrated circuit device which has a pattern as fine as that of an exposure wavelength. The technology contemplates to improve the resolution characteristics of the pattern by making use of the mutual interference of exposure luminous fluxes.
    Type: Grant
    Filed: July 17, 1997
    Date of Patent: November 28, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Yoshihiko Okamoto, Noboru Moriuchi
  • Patent number: 6130027
    Abstract: A process for producing lead frames having lead tips with a minimum of side etching includes the steps of coating a metal lead frame substrate with a first photosensitive film, patterning the first photosensitive film, developing the patterned first photosensitive film, partially etching the metal surface of the lead-frame substrate beneath the developed patterned first photosensitive film, coating the partially etched metal surface with a positive second photosensitive, exposing the positive second photosensitive film to light passing through the developed first photosensitive film, developing the exposed second photosensitive film, performing fine etching through the developed second photosensitive film to a desired depth at least once, and removing the first and second photosensitive films.
    Type: Grant
    Filed: February 4, 1998
    Date of Patent: October 10, 2000
    Assignees: Sumitomo Metal Mining Co., Ltd., Possehl Sumiko Electronics Singapore PTE Ltd.
    Inventor: Yoichiro Hamada
  • Patent number: 6120974
    Abstract: A pattern forming material includes a binary copolymer represented by the following general formula or a ternary or higher copolymer obtained by further polymerizing the binary copolymer with another group: ##STR1## wherein R.sub.1 indicates a hydrogen atom or an alkyl group; R.sub.2 and R.sub.3 independently indicate a hydrogen atom, an alkyl group, a phenyl group or an alkenyl group or together indicate a cyclic alkyl group, a cyclic alkenyl group, a cyclic alkyl group having a phenyl group or a cyclic alkenyl group having a phenyl group; R.sub.4 indicates a hydrogen atom or an alkyl group; x satisfies a relationship of 0<x<1; and y satisfies a relationship of 0<y<1.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: September 19, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takahiro Matsuo, Masayuki Endo, Masamitsu Shirai, Masahiro Tsunooka
  • Patent number: 6110651
    Abstract: A polysilane pattern-bearing substrate is prepared by the steps of (1) forming a polysilane film on a substrate, (2) subjecting the polysilane film to selective light exposure in the presence of a first solvent which does not dissolve polysilane, but dissolves siloxane, for converting the polysilane in selected areas to siloxane for thereby forming a pattern, (3) removing only the siloxane from the substrate of step (2) using a second solvent which does not dissolve polysilane, but dissolves siloxane, and (4) completely removing the second solvent. The polysilane pattern has a high degree of definition.
    Type: Grant
    Filed: December 10, 1998
    Date of Patent: August 29, 2000
    Assignee: Shin-Etsu Chemical, Co., Ltd.
    Inventors: Motoo Fukushima, Shigeru Mori
  • Patent number: 6107013
    Abstract: An exposure method includes the phase-shifting mask supply step, the phase-shifting mask being prepared by selectively forming a light-shielding portion and a phase shifter on a substrate, and the resist exposure step of performing both exposure of a resist by dark field illumination light and exposure of the resist by bright field illumination light by using the phase-shifting mask, thereby removing residual resist generated by the influence of the edge of the phase shifter.
    Type: Grant
    Filed: December 12, 1997
    Date of Patent: August 22, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tadahito Fujisawa, Satoshi Tanaka, Akiko Mimotogi, Shoji Mimotogi, Soichi Inoue
  • Patent number: 6090534
    Abstract: The present invention provides, an apparatus and method for decreasing circular defects and charge buildup on a semiconductor wafer having a photoresist formed thereon. In one embodiment, the method comprises the steps of positioning a semiconductor wafer in a track developer, applying a photoresist developer to a first side the semiconductor at a predetermined speed. That initial speed is then increased to a speed that ranges from about 400 rpm to 800 rpm. The photoresist is rinsed from the semiconductor while a back spray is applied to a second side of the semiconductor during the rinsing. Additionally, the semiconductor wafer is subjected to a flow of ions from an ionization source within the tracking device itself. The ionization within the tracking device is one advantageous aspect over prior art systems because the substantial direct flow of ions within the tracking device reduced the charge buildup associated with the increased spin speeds.
    Type: Grant
    Filed: June 3, 1998
    Date of Patent: July 18, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: John G. Costigan, David Huibregtse
  • Patent number: 6080531
    Abstract: An improved method of photoresist removal is disclosed in which a treating solution of ozone and bicarbonate or other suitable radical scavengers is used to treat a substrate for use in an electronic device. The method is particularly well suited to photoresist removal where certain metals such as aluminum, copper and oxides thereof are present on the surface of the substrate. The method is also well suited to the removal of other organic materials as well.
    Type: Grant
    Filed: March 30, 1998
    Date of Patent: June 27, 2000
    Assignee: FSI International, Inc.
    Inventors: Lawrence E. Carter, Steven L. Nelson
  • Patent number: 6078013
    Abstract: A solder mask having a clover-leaf shaped opening around a PTH for enhanced performance. The solder mask resides on a surface of a printed circuit board comprising lands and PTH's. The opening around the PTH is configured to maintain a minimum channel width between the PTH and an adjacent land while maximizing the opening around the PTH, thereby decreasing the likelihood that the solder mask material will be inadvertently drawn into the PTH.
    Type: Grant
    Filed: October 8, 1998
    Date of Patent: June 20, 2000
    Assignee: International Business Machines Corporation
    Inventor: James Richard Stack
  • Patent number: 6074804
    Abstract: After forming a resist film by coating a semiconductor substrate with a resist, pattern exposure is conducted by irradiating the resist film with ArF excimer laser with a mask used. A silylation agent of 4-dimethylsiloxy-3-penten-2-one is supplied onto the surface of the resist film having been subjected to the pattern exposure, thereby forming a silylated layer in an unexposed portion of the resist film. The resist film is etched by using the silylated layer as a mask, so as to remove an exposed portion of the resist film. Thus, a resist pattern can be formed out of the resist film.
    Type: Grant
    Filed: June 22, 1998
    Date of Patent: June 13, 2000
    Assignees: Matsushita Electric Industrial Co., Ltd., Shin-Estu Chemical Co., Ltd.
    Inventors: Masayuki Endo, Toshinobu Ishihara, Toru Kubota, Katsuya Takemura
  • Patent number: 6060224
    Abstract: The present invention provides a method for maskless lithography. A plurality of individually addressable and rotatable micromirrors together comprise a two-dimensional array of micromirrors. Each micromirror in the two-dimensional array can be envisioned as an individually addressable element in the picture that comprises the circuit pattern desired. As each micromirror is addressed it rotates so as to reflect light from a light source onto a portion of the photoresist coated wafer thereby forming a pixel within the circuit pattern. By electronically addressing a two-dimensional array of these micromirrors in the proper sequence a circuit pattern that is comprised of these individual pixels can be constructed on a microchip. The reflecting surface of the micromirror is configured in such a way as to overcome coherence and diffraction effects in order to produce circuit elements having straight sides.
    Type: Grant
    Filed: January 14, 1999
    Date of Patent: May 9, 2000
    Inventors: William C. Sweatt, Richard H. Stulen
  • Patent number: 6051369
    Abstract: A lithography process includes a step of forming an antireflective coating film on a substrate. A film is formed on the antireflective film and a radiation sensitive film is formed on the film. The radiation sensitive film is selectively exposed. During the selective exposing, the antireflective film covers the lower surface of the portion of film on which the radiation sensitive film is formed, and the antireflective coating film reduces reflections of radiation during the selective exposing of the radiation sensitive film. A fabrication process using the lithography process is also described.
    Type: Grant
    Filed: January 8, 1998
    Date of Patent: April 18, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsukasa Azuma, Takashi Sato
  • Patent number: 6048668
    Abstract: Patterning a film by accumulating a first electric charge in a first area of a film under treatment, applying a resist to the film, and subsequently exposing a second area of the resist adjoining the first area to the first electric charge.
    Type: Grant
    Filed: February 3, 1998
    Date of Patent: April 11, 2000
    Assignee: Fujitsu Limited
    Inventor: Tsunehiro Hato
  • Patent number: 6043001
    Abstract: A method for forming lenslets of a solid-state imager, includes providing a first etch-stop layer on a spacer layer formed on a substrate or layer(s) on a substrate; providing a patterned first photosensitive resin layer to form a first mask pattern; performing an etch transfer of the first mask pattern to the first photosensitive resin layer to form a first etch-stop mask pattern, and removing the first photosensitive resin layer; providing a transparent lenslet-forming layer on the spacer layer.
    Type: Grant
    Filed: February 20, 1998
    Date of Patent: March 28, 2000
    Assignee: Eastman Kodak Company
    Inventors: Jeffrey I. Hirsh, Joseph F. Revelli, Joseph Jech
  • Patent number: 6042993
    Abstract: In a process for photolithographic generation of structures in the sub-200 nm range, a layer of amorphous hydrogen-containing carbon (a-C:H) with an optical energy gap of <1 eV or a layer of sputtered amorphous carbon (a-C) is applied as the bottom resist to a substrate (layer thickness .ltoreq.500 nm); the bottom resist is provided with a layer of an electron beam-sensitive silicon-containing or silylatable photoresist as the top resist (layer thickness .ltoreq.50 nm); the top resist is structured by means of scanning tunneling microscopy (STM) or scanning force microscopy (SFM) with electrons of an energy of .ltoreq.80 eV; and then the structure is transferred to the bottom resist by etching with an anisotropic oxygen plasma and next is transferred to the substrate by plasma etching.
    Type: Grant
    Filed: August 7, 1997
    Date of Patent: March 28, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventors: Rainer Leuschner, Ewald Gunther, Albert Hammerschmidt, Gertrud Falk
  • Patent number: 6042995
    Abstract: A lithographic process for semiconductor device fabrication is disclosed. In the process a patterned mask having a multilayer film formed on a substrate is illuminated by extreme ultraviolet (EUV) radiation and the radiation reflected from the pattern mask is directed onto a layer of energy sensitive material formed on a substrate. The image of the pattern on the mask is thus introduced into the energy sensitive material. The image is then developed and transferred into the underlying substrate. The multilayer film is inspected for defects by applying a layer of energy-sensitive film (called the inspection film) in proximity to the multilayer film and exposing the energy-sensitive material to EUV radiation. The thickness of the multilayer film is such that a portion of the EUV radiation is transmitted through the inspection film, reflected from the multilayer film and back into the inspection film.
    Type: Grant
    Filed: December 9, 1997
    Date of Patent: March 28, 2000
    Assignee: Lucent Technologies Inc.
    Inventor: Donald Lawrence White
  • Patent number: 6043004
    Abstract: The ashing method comprises the steps of forming resist on a part of an underlying layer, ion-implanting elements into the underlying layer and the resist, placing the resist in radical atmosphere including oxygen radical and then ashing an upper layer portion which includes the impurity elements and is formed an a surface of the resist, and ashing remaining portion of the resist by increasing an amount of the oxygen radical in the radical atmosphere.
    Type: Grant
    Filed: March 13, 1998
    Date of Patent: March 28, 2000
    Assignee: Fujitsu Limited
    Inventor: Takashi Kurimoto
  • Patent number: 6040117
    Abstract: A negative photoresist stripping liquid composition is provided which comprises from 30 to 75% by weight of dimethyl sulfoxide, from 20 to 65% by weight of 1,3-dimethyl-2-imidazolidinone, from 0.1 to 5% by weight of a tetraalkylammonium hydroxide and from 0.5 to 15% by weight of water. The composition has a superior stripping performance especially against photoresists that are alkali-developable and can form films of at least 20 .mu.m in thickness, and has no problem of freezing even when stored outdoors in the winter. The composition is useful for the stripping of negative photoresists for bump formation and for fabricating circuit substrates.
    Type: Grant
    Filed: February 24, 1998
    Date of Patent: March 21, 2000
    Assignee: JSR Corporation
    Inventors: Toshiyuki Ota, Kimiyasu Sano, Hideaki Tashiro, Hozumi Sato
  • Patent number: 6030752
    Abstract: A method of stitching segments defined by adjacent image patterns of a photolithographic system during the manufacture of a semiconductor device is disclosed. The method includes forming a material over a semiconductor substrate, projecting a first image pattern over the substrate that defines a first segment and a contact region, projecting a second image pattern over the substrate that defines a second segment with an end that overlaps the contact region, and removing a portion of the material corresponding to the first and second image patterns to form the first and second segments stitched by a portion of the contact region. The contact region has a greater width than the first and second segments. In this manner, the contact region accommodates misalignments that might otherwise lead to inadequate coupling or decoupling between the first and second segments. The invention is particularly well-suited for stitching polysilicon gates of N-channel and P-channel devices.
    Type: Grant
    Filed: February 25, 1997
    Date of Patent: February 29, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: H. Jim Fulford, Jr., Robert Dawson, Mark I. Gardner, Frederick N. Hause, Mark W. Michael, Bradley T. Moore, Derick J. Wristers
  • Patent number: 6030753
    Abstract: A magnetoresistive (MR) head and a method are disclosed providing a longitudinal bias layer and conductor leads at end regions of sensor elements to form a sensor region between the end regions. A uniform longitudinal bias thin film layer is deposited overlaying the entirety of the upper MR sensor, and a uniform conductor thin film layer is deposited overlaying the entirety of the longitudinal bias thin film layer. A photoresist process is conducted over the conductor thin film layer to develop a mask of the end regions and to expose a central region between the end regions.
    Type: Grant
    Filed: May 10, 1999
    Date of Patent: February 29, 2000
    Assignee: International Business Machines Corporation
    Inventor: Tsann Lin