Abstract: A request can be received to perform a read operation to retrieve data at a memory sub-system. A time to perform the read operation can be determined. A time a write operation was performed to store the data at the memory sub-system can be determined. An amount of time that has elapsed since the time the performance of the write operation until the time to perform the read operation can be determined. A read voltage from a plurality of read voltages can be selected based on the amount of time that has elapsed. The read operation can be performed to retrieve the data by using the read voltage.

Abstract: A memory controller includes a temperature monitor configured to update temperature states of a memory device divided into groups as temperature scores and a scheduler configured to update a command score using the temperature scores and change a priority of the command score to match with a current operation mode.

Abstract: An aspect of managing data block compression in a storage system includes performing, for each block written to the storage system: bit-wise traversing the block, searching the block for a pattern indicating a repeating sequence of bits and, upon determining the pattern exists in the block and the repeating sequence of bits in the pattern exceeds a threshold value, removing the repeating sequence of bits from the block thereby yielding a reduced-size block.

Abstract: A device and method dynamically optimize processing of a storage command within a storage system. The device and method execute a rule based on predetermined criteria and internal operation parameters of the storage system. An extended application program interface within the storage system provides internal operation parameters for use in execution of the rule. Based on execution of the rule, the storage system controls processing of the storage command.

Abstract: An electronic device may include: a controller; a non-transitory computer-readable storage medium configured to store operation codes for causing the controller to perform operations; and a buffer configured to temporarily store data between a host device and the non-transitory computer-readable storage medium through control of the controller, wherein the operations comprise monitoring a foreground buffer usage rate of the buffer in response to a command of the host device and adjusting a foreground buffer capacity for the command in the buffer, based on the monitored foreground buffer usage rate.

Abstract: A method, a system and a computer program product for performing deduplicating data. A data stream having a plurality of data zones is received. One or more data storage locations in a plurality of data storage locations for deduplicating one or more zones in the plurality of zones is identified. Each data storage location stores its respective deduplicated data zones. A data storage location for deduplicating a first data zone is selected. The first data zone is deduplicated using the selected data storage location.

Abstract: Techniques for data storage optimization processing that may include: receiving I/O access information characterizing observed I/O operations directed to a logical address space; analyzing the I/O access information to identify a predicted I/O access distribution expected for the plurality of logical regions of the logical address space at multiple points in time; determining a placement plan specifying placement of data portions of the plurality of logical regions among a plurality of storage tiers; and performing, in accordance with the placement plan, at least one data movement that moves at least a first data portion of a first of the plurality of logical regions from a first of the plurality of storage tiers to a second of the plurality of storage tiers.

Abstract: To combine and apply a data volume reduction technique and an automatic tier management function, the invention provides a storage system that includes a processor and a storage medium and manages and stores data in tiers. The storage system includes a first storage tier that includes a storage area for storing data, and a second storage tier that includes a storage area for storing the data which is stored in the storage area of the first storage tier and whose storage area is changed. The processor calculates an I/O volume of the data in the first storage tier, determines the tier where data is stored based on the I/O volume, and physically stores data which is stored in the second storage tier in a storage medium corresponding to the determined tier.

Abstract: Methods and systems for managing Key-Value Solid State Drives (KV SSDs). A method includes writing, by a host processor, at least one Key-value pair of at least one write command to at least one KV SSD of a plurality of KV SSDs of at least one RAID group based on at least one of slab information, available space and load. Further, the method includes reading, by the host processor, at least one value from the at least one KV SSD of the plurality of KV SSDs for at least one key of at least one read command using at least one of a consistent hashing function and slab information.

Abstract: According to one embodiment, a memory system includes a volatile memory, a nonvolatile memory and a controller circuit. The controller circuit configured to control the volatile memory and the nonvolatile memory and to perform a write process and a non-volatilization process. The controller circuit is further configured to, during the write process, store write data in the volatile memory, and during the non-volatilization process, upon determining that data size stored in the write buffer being less than unit of writing of the nonvolatile memory, suspend completion of the non-volatilization process and not return a notification of completion of the non-volatilization process.

Abstract: The invention introduces a method for controlling data access to a flash memory, performed by a processing unit, including steps of: obtaining a logical address associated with a data read operation; determining whether a group table corresponding to the logical address is queued in a locked queue, or a hot zone of a swap queue; and prohibiting content of the locked queue and the swap queue from being modified when the group table corresponding to the logical address is queued in the locked queue, or the hot zone of the swap queue.

Abstract: A method, computer program product, and computer system for identifying, by a computing device, a pattern in a super block of a logger tier. It may be determined that the pattern in the super block of the logger tier is a known pattern, wherein the known pattern indicates invalid data in the logger tier. The logger tier may be booted up by storing an unknown pattern in the super block into the logger tier, wherein the unknown pattern indicates valid data in the logger tier.

Abstract: A hybrid memory module includes cache of relatively fast and durable dynamic, random-access memory (DRAM) in service of a larger amount of relatively slow and wear-sensitive flash memory. An address buffer on the module maintains a static, random-access memory (SRAM) cache of addresses for data cached in DRAM.

Abstract: Methods and systems are provided for improving memory control. A memory architecture includes a plurality of memory units and an interface. A respective memory unit of the plurality of memory units is configured with a Processing-In-Memory (PIM) architecture. The interface includes a plurality of lines. The interface is coupled between the plurality of memory units and a host. The interface is configured to receive one or more signals from a host via the plurality of lines. The respective memory unit of the plurality of memory units is coupled with a respective line of the plurality of lines, and the respective memory unit is further configured to receive a respective signal of the one or more signals via the interface so as to be individually selected by the host.

Abstract: A method, a computing device, and a non-transitory machine-readable medium for performing a multipath selection based on a determined quality of service for the paths. An example method includes a host computing device periodically polling a storage system for path information including an indication of a recommended storage controller. The host computing device periodically determines a quality of service information corresponding to a plurality of paths between the host computing device and a storage volume of the storage system, where at least one of the plurality of paths including the recommended storage controller. The host computing device identifies a fault corresponding to a path of the plurality of paths that routes I/O from the host computing device to the storage volume. The host computing device re-routes the I/O from the path to a different path of the plurality of paths, where the different path is selected for the re-routing based on the quality of service information and the path information.

Abstract: A data verification apparatus includes a storage, a management unit, and a verification unit. The storage includes a first storage and a second storage. The first storage stores first data and first status information. The second storage stores second data and second status information. The management unit controls a write process and updates the first status information and the second status information in response to the write process, the write process being a process of writing the first data to the first storage on a basis of data acquired by communication with an external apparatus, and thereafter writing the second data to the second storage on a basis of the data. The verification unit verifies, in a state in which the communication is disconnected, the first data and the second data on a basis of the first status information and the second status information.

Abstract: A memory system includes a non-volatile memory device including at least one memory blocks storing a data and a controller coupled to the non-volatile memory device. The controller can perform at least one program operation or at least one erase operation within the at least one memory block. The controller can recognize an operation status of the at least one memory block in response to a time consumed for completing the at least one operation, and determine whether the at least one memory block is used and which priority is given to the at least one memory block based at least on the operation status so that the at least one memory block is allocated for a following operation.

Abstract: Apparatuses and methods can be related to supplementing AI processing in memory. An accelerator and/or a host can perform AI processing. Some of the operations comprising the AI processing can be performed by a memory device instead of by an accelerator and/or a host. The memory device can perform AI processing in conjunction with the host and/or accelerator to increase the efficiency of the host and/or accelerator.

Abstract: A memory controller configured to control a memory device including memory cells includes an input/output buffer configured to store input data provided from a host; a data converter configured to generate program data obtained by converting the input data such that the number of specific data patterns among data patterns to be stored in the memory cells is changed; and an operation controller configured to provide the program data to the memory device. The program data is generated by selectively inverting a plurality of pieces of logical page data included in the input data.

Abstract: A computer system monitors usage of an application on a computing device to identify one or more pre-fetch situations corresponding to a user of the computing device. The computer system determines whether the computing device is in a situation that corresponds to at least one of the identified one or more pre-fetch situations. In response to determining that the computing device is in the situation that corresponds to the at least one of the identified one or more pre-fetch situations, the computer system causes data corresponding to the application to be pre-fetched.