Abstract: An embodiment of the present disclosure contemplates a data sending and receiving method and apparatus. A first FEC unit of a sending device sends, by using a first channel, a first data stream on which first FEC encoding has been performed; a second FEC unit of the sending device sends, by using a second channel, a second data stream on which second FEC encoding has been performed; and the sending device performs interleaving on the first data stream and the second data stream, to obtain an output data stream, and sends the output data stream to a receiving device.

Abstract: An on-die controller can provide an error correction capability for data stored in an array of memory cells located on the same die as the on-die controller. The error correction capability provided by the on-die controller eliminates a need to transfer error correction code (ECC) data to an external controller that may have provided the error correction capability in lieu of the on-die controller, which can provide more channel bandwidth for other types of non-user data for further strengthening data reliability, security, integrity of the memory system.

Abstract: This application relates to communicating information between communication devices. A channel coding method is disclosed. A communication device obtains an input sequence of K bits. The communication device encodes the input sequence using a low density parity check (LDPC) matrix H, to obtain an encoded sequence. The LDPC matrix H is determined according to a base matrix and a lifting factor Z. The base matrix includes m rows and n columns, m is greater than or equal to 5, and n is greater than or equal to 27. The lifting factor Z satisfies a relationship of 22*Z?K. According to the encoding method provided in the embodiments, information bit sequences of a plurality of lengths can be encoded for transmission between the communication devices.

Abstract: Provided is an apparatus including an acquisition unit that acquires an information block generated from transmission data for a user and subjected to error correction coding, and an interleaving unit that interleaves a bit sequence of the information block using an interleaver unique to the user. The interleaving unit interleaves the bit sequence by interleaving each of two or more partial sequences obtained from the bit sequence.

Abstract: Techniques are described for deploying a fault tolerant data center by determining that the physical infrastructure deployment of the data center meets the fault tolerance levels and the fault domains specified for the data center. Techniques are described for obtaining configuration information related to various infrastructure resources deployed in a data center. A resource graph for the data center is generated based on the configuration information. The resource graph represents a logical representation of a set of vertices representing the physical and logical resources used to power a data center and a set of edges that connect the set of vertices. The resource graph is used to determine if a set of infrastructure nodes deployed in the data center meet the fault tolerance levels and fault domains specified for the data center. Results indicative of whether a deployed data center is fault tolerant are then transmitted to a user.

Abstract: For example, an apparatus may include an encoder configured to encode data into a plurality of codewords according to a parity function for a transmission modulated according to a Differential Modulation (DM) scheme, and/or a decoder to decode received codewords of the transmission.

Abstract: A method for operating a DRAM device. The method includes receiving in a memory buffer in a first memory module hosted by a computing system, a request for data stored in RAM of the first memory module from a host controller of the computing system. The method includes receiving with the memory buffer, the data associated with a RAM, in response to the request and formatting with the memory buffer, the data into a scrambled data in response to a pseudo-random process. The method includes initiating with the memory buffer, transfer of the scrambled data into an interface device.

Abstract: The present disclosure relates generally to the field of data encoding and decoding, and particularly to automorphism-based polar encoding and decoding apparatuses and methods, as well as computer program products embodying the method steps in the form of computer codes. More specifically, polar codes are designed such that their frozen bits support automorphisms described by a binary upper triangular matrix having a diagonal including at least one of zeros and units. Codewords generated using these polar codes may be subsequently subjected to automorphism-based polar decoding in an efficient manner and with a lower decoding latency compared to the conventional Successive Cancellation List decoding algorithms. Furthermore, the efficiency of the automorphism-based polar decoding may be increased even more if the automorphisms are based on matrix elements arranged above the diagonal in a vicinity of a bottom right corner of the binary upper triangular matrix.

Abstract: A method is provided for decompressing wide word data compressed in parallel. The method includes creating an instance of memory structure for a wide word in the wide word data, where the instance of memory structure is an inverse of a compression dictionary for the wide word; retrieving multiple compressed codes iteratively from a gap-free compressed output stream of the wide word data using the instance of memory structure, where each compressed code includes at least one character code and a reverse-pointer, and where at least one compressed code includes a multi-symbol string having a multiple character codes; forming an intermediate decompressed output stream by iteratively following the reverse-pointers for the multiple compressed codes, respectively; and forming decompressed output stream by reversing an order of the character codes in the multi-symbol string of the at least one compressed code.

Abstract: An embodiment of the present disclosure contemplates a data sending and receiving method and apparatus. A first FEC unit of a sending device sends, by using a first channel, a first data stream on which first FEC encoding has been performed; a second FEC unit of the sending device sends, by using a second channel, a second data stream on which second FEC encoding has been performed; and the sending device performs interleaving on the first data stream and the second data stream, to obtain an output data stream, and sends the output data stream to a receiving device.

Abstract: Provided is a storage device including a memory device configured to store original data; and a controller configured to control the memory device, the controller including a first error correction circuit configured to correct an error of the original data, and a second error correction circuit configured to correct an error of the original data, a maximum number of correctable error bits of the second error correction circuit being greater than a maximum number of correctable error bits of the first error correction circuit, a mapping memory configured to store at least some of parity bits generated by the second error correction circuit and store an address of the memory device at which the original data is stored; and a control block configured to control the first error correction circuit, the second error correction circuit, and the mapping memory.

Abstract: Provided is a transmission method executed by a transmitting apparatus to transmit a content to a plurality of terminals. The content having transmission count information indicating a number of times the content is to be transmitted by the transmitting apparatus. The transmission method including a first transmission step of generating and transmitting a first transmission signal which transfers at least a first portion of a plurality of data packets including a plurality of content packets, storing data of the content therein, and a plurality of parity packets, generated from the content packets, and a second transmission step of, when the transmission count information of the content indicates a plurality of times, generating a second transmission signal including at least a second portion of the plurality of data packets, and transmitting the second transmission signal during a period which differs from a period during which the first transmission signal is transmitted.

Abstract: Methods, systems, and devices for wireless communications are described. Cyclic redundancy check (CRC) bits may be appended to a set of information bits on a per-group basis prior to encoding using an error correcting code. The amount of CRC bits appended to each group of information bits may be based on the priority of the group of information bits. For example, the priority may be based on the type of information conveyed by the group of information bits. For example, for a video stream, information bits conveying low frequency information may have a higher priority than information bits conveying high frequency information, as the low frequency bits may be more important to user perception/experience of the video. The transmitting device and the receiving device may negotiate the CRC configuration (e.g., the CRC bits per-group and the locations of the groups) so that the receiving device can verify the information bits.

Abstract: An apparatus for avoiding a collision between data. The apparatus includes a plurality of integrated circuits (ICs) configured to mutually perform insulation communication, an amplitude detection module configured to detect amplitudes of transmission data and reception data that are input and output through pins of the IC during the insulation communication between the plurality of ICs, and a signal pattern error detection module configured to determine a collision situation between the transmission data and the reception data by comparing an amplitude of transmission data, which is generated by a processor in a TX mode of the IC, and the amplitude of the transmission data, which is detected through the pins of the IC by the amplitude detection module.

Abstract: A block processing method, node and medium are provided. The method includes: determining, in a metro transport network, Ethernet or flexible Ethernet, 64B/66B blocks of a forward error correction (FEC) codeword with errors that cannot been corrected; replacing all of the 64B/66B blocks in the FEC codeword with error control blocks, or replacing each invalid 64B/66B block in the FEC codeword with an error control block.

Abstract: A storage device syndrome-weight-based error correction system includes a syndrome-weight-based error correction subsystem coupled to a storage subsystem in a chassis. The syndrome-weight-based error correction subsystem performs a plurality of respective first error correction hard decoding operations on the storage subsystem that each utilize respective read voltage thresholds and that each generate a respective final codeword candidate having a respective syndrome weight.

Abstract: A transmission apparatus includes a signal processing circuit configured to obtain information data bits to be transmitted; add known information data bits to the information data bits to generate first data blocks; perform error-correction coding on the first data blocks to generate first coded data blocks including parity data blocks such that the first coded data blocks satisfy a first code rate; remove the known information data bits from the first coded data blocks to generate second coded data blocks, the second coded data blocks satisfying a second code rate different from the first code rate; and modulate the second coded data blocks using a modulation scheme to generate a modulated signal, which is then transmitted. A number of the known information data bits depends on a number of the information data bits such that the first code rate is fixed regardless of the number of the information data bits.

Abstract: Message faults are caused by network crowding and signal fading at high frequencies of 5G and 6G. Current error-detection and correction algorithms are computationally demanding, especially for new low-cost reduced-capability IoT devices. Disclosed are methods for (a) determining whether a message is faulted using a compact error-detection code, (b) localizing the most likely faulted message element(s) according to the waveform signal, and (c) determining the likely corrected version by back-calculating from the error-detection code. Other versions include testing various modulation substitutions for the most suspicious message elements, having the worst signal quality. The waveform parameters may include a deviation from an average amplitude, phase, frequency, or polarization, as well as an amount of amplitude variation and phase variation within the message element. Identification of the most likely faulted message elements may enable recovery of the message without a costly retransmission.

Abstract: The invention relates to systems, methods, network devices, and machine-readable media for encoding an input message with robustness against noise by executing a compressing hash function on the input message, encoding an output of the hash function and the input message to generate a single combined message, executing a permutation function on the combined message, and encoding the result of the permutation function with a list-decodable code.

Abstract: A HARQ-ACK feedback method and apparatus are provided, so as to solve a problem that a terminal cannot perform HARQ-ACK feedback in a case that the terminal is configured with a DL SPS. The method may be applied to a terminal. The method includes determining, based on first information, a HARQ-ACK codebook corresponding to M DL SPS configurations; where the first information includes at least one of the following: first HARQ-ACK feedback indication information, first TDD configuration information, or first dynamic slot format information; and M?1, and M is an integer.