Abstract: A controller for a power converter. The power converter comprises an inverter for receiving a supply power and providing an inverter output at an inverter frequency. There is a primary inductance for receiving the inverter output and providing a primary output. There is at least one current sensor for sensing at least one output current and providing at least one output current signal based on the at least one output current. The controller is adapted to receive the at least one output current signal, and control the inverter frequency by providing a switch control signal to the inverter based on the at least one output current signal and a reference signal thereby providing a desired primary output corresponding to the reference signal.

Abstract: Systems and methods are provided for generating a stable reference current that has low sensitivity to operating temperature and supply voltage variations and is stable across process corners. In an example implementation, an improved reference current generator circuit is provided that includes a first circuit generating a first current that is proportional to absolute temperature and a second circuit generating a second current that is complementary to absolute temperature based on first transistors operating in respective triode regions. The second current compensates for process, voltage, and temperature variations in the first current at a node. According to some examples, the second current is also generated based on second transistors operating in respective saturation regions. The first current may be generated using a forward biased PN junction diode.

Abstract: A compensator circuit for a PWM active rectifier includes a look up table containing compensating voltage values for given values of input phase current and input voltage frequency, and a low pass filter arranged to filter the input phase current to the rectifier based on a filter bandwidth determined according to the input voltage frequency. The compensator circuit arranged to receive measured input current and voltage frequency values and to output corresponding compensation voltage values from the look up table, the compensation voltages to be provided, in use, to the rectifier to adjust the switching pattern of the rectifier.

Abstract: A ground fault circuit interrupter (GFCI) can include a current transformer (CT) comprising a single core, a first winding wound around the single core, and a second winding wound around the single core. The GFCI can include a ground fault (GF) detection module operatively connected to the first winding to receive signals from the first winding and configured to determine whether a line-to-ground fault exists. The GFCI can also include a GN stimulus operatively connected to the second winding to provide a GN stimulus signal to the second winding. The GFCI can also include a grounded neutral (GN) detection module operatively connected to second winding and configured to receive signals from the second winding to determine whether a neutral-to-ground fault exists.

Abstract: A bleeder current control method. The bleeder current control method includes the following steps: The rectifier bridge transmits a post-bridge input signal to the power system. The shaping circuit obtains the post-bridge input signal and shapes it into a bleeder current reference signal, the bleeder current reference signal is inversely correlated with the initial post-bridge input signal. Acquiring a current sampling signal representing the bleeder current, and comparing the error of the current sampling signal with the bleeder current reference signal to obtain an error signal. The current sampling signal is controlled according to the error signal, so that the current sampling signal is output based on the waveform of the bleeder current reference signal. Thus, a reliable and full-time sine wave envelope signal is provided to the power system, so as to reduce the loss caused by the bleeder current to the power system.

Abstract: The monitoring device is configured for monitoring a converter comprising a first and a second input terminals, two output terminals, a first filter branch connected between the input terminals, a second filter branch connected in parallel with the first branch, two switching branches connected in parallel with the second branch, each switching branch including two switching half-branches connected in series and in an intermediate point forming an output terminal. The monitoring device comprises a detection impedance configured for being connected between the first and the second branches, and a detection module configured for comparing the voltage across the detection impedance with a predefined threshold, then for generating a detection signal as soon as said voltage is greater than said threshold.

Abstract: Systems, apparatuses, and methods that compensate for total ionizing doses and intrinsic base currents in transistors of a bandgap reference circuit are provided. A compensation circuit can include a compensation transistor with a size and one or more bias conditions that are based at least in part on a respective bipolar transistor of a bandgap reference circuit. The compensation circuit can include an operational amplifier that is configured to: (i) set a base-collector voltage of the compensation transistor to zero; and (ii) provide a compensation base current to a base terminal of the compensation transistor that is representative of at least a radiation-induced current transistor or an intrinsic base current for the respective bipolar transistor. A bandgap reference circuit can be augmented with one or more compensation circuits to accommodate for a total ionizing dose and/or an intrinsic base current for one or more transistors of the bandgap reference circuit.

Abstract: The system response time of a factorized power architecture may be reduced using a high bandwidth accelerator connected in parallel with a low bandwidth switching regulator to feed one or more downstream high bandwidth current multipliers, e.g. at the point of load. The accelerator may use a high speed linear amplifier to drive the factorized bus using stored energy derived from the bus or a low voltage bias supply. The accelerator may alternatively be connected in series between the switching regulator and the downstream current multipliers.

Abstract: A circuit includes a voltage divider circuit configured to generate a feedback voltage according to an output voltage, an operational amplifier configured to output a driving signal according to the feedback voltage and a reference voltage and a pass gate circuit including multiple current paths. The current paths are controlled by the driving signal and connected in parallel between the voltage divider circuit and a power reference node.

Abstract: A method for operating a power converter and a control circuit are disclosed. The method includes, in a power converter including an input, a converter stage, a first switch connected between the input and the converter stage, a second switch connected between input nodes of the converter stage, and an output capacitor connected between output nodes of the converter stage: detecting an operating state of the power converter; and operating the power converter in a first operating mode when the power converter is in a first operating state. Operating the power converter in the first operating mode includes regulating an input current received at the input by a switched-mode operation of the first and second electronic switches.

Abstract: System and method for detecting a power. For example, a system for detecting a power includes: a first signal converter configured to receive a first signal and generate a pulse-width-modulation signal based at least in part on the first signal; a second signal converter configured to receive a second signal and generate a voltage signal based at least in part on the second signal; and a low-pass filter configured to receive the pulse-width-modulation signal and the voltage signal and generate a power detection signal based at least in part on the pulse-width-modulation signal and the voltage signal; wherein: the first signal is either an input current or an input voltage; the second signal is either the input current or the input voltage; and the first signal and the second signal are different.

Abstract: Described herein is method for controlling an electrical converter, the electrical converter converting an input voltage (vin) into a multi-level output voltage (vout), the method incudes: determining an optimized pule pattern (u(x)); and determining switching states from the optimized pulse pattern (u(x)) and applying the switching states to semiconductor switches of the electrical converter, such that the multi-level output voltage (vout) is generated, where the optimized pulse pattern (u(x)) includes a plurality of switching transitions (?u), each switching transition (?ui) encoding a transition between two different levels of the multi-level output voltage (vout), at a switching angle (xi), where the optimized pulse pattern (u(x)) is determined by optimizing a cost function, where the cost function J(x)=?uTA(x)?u is a cost matrix A(x), and where each entry of the cost matrix A(x) depends on polynomials into which the switching angles (xi) are input.

Abstract: A power conversion apparatus includes a filter capacitor to be charged with electric power fed from a main power source, and a power converter to convert electric power fed via the filter capacitor and feed the converted electric power to a load. The power conversion apparatus further includes a power-source contactor to electrically connect the filter capacitor and the power converter to the main power source or electrically disconnect the filter capacitor and the power converter from the main power source, and a discharging circuit connected in parallel to the filter capacitor. The power conversion apparatus also includes a discharge control circuit to close a discharging contactor included in the discharging circuit after opening of the power-source contactor, and thereby cause the filter capacitor to be discharged.

Abstract: A system may include a voltage regulator controller and a driver. The voltage regulator controller may be configured to maintain a phase voltage. The driver may be associated with the phase voltage. The driver may include a first signal line that may be communicatively coupled to the voltage regulator controller. The driver may be configured to transmit a multiplexed signal on the first signal line to the voltage regulator controller.

Abstract: A cascode bias circuit biases a gate of a cascode transistor in a cascode current mirror. The cascode bias circuit includes a first transistor configured to conduct a first current and includes a second transistor configured to conduct a second current. The first and second transistors couple to a third transistor configured to conduct a sum of the first current and the second current. A gate of the first transistor couples to a gate of the cascode transistor to bias the cascode transistor.

Abstract: A power conversion circuit is provided. According to the topologies of power conversion circuits and the corresponding control manners of the present disclosure, the output voltage is greatly reduced relative to the input voltage, and thus the function of voltage reduction is achieved. Moreover, a voltage-second product of the time and the voltage across the first output inductor and a voltage-second product of the time and the voltage across the second output inductor are both greatly reduced. Accordingly, the inductance, volume and loss of the first output inductor and the second output inductor are greatly reduced. Therefore, the voltage regulation module may receive the low output voltage outputted by the power conversion circuit, thereby reducing the overall volume of the voltage regulation module and increasing the power conversion density and conversion efficiency of the voltage regulation module.

Abstract: A synchronized rectification control method for use in a flyback converter is provided. The flyback converter includes a transformer including a secondary winding, a synchronous rectifier switch and a synchronous rectifier controller. The synchronous rectifier switch is coupled to the secondary winding and the synchronous rectifier controller, and is used to output a voltage difference signal and receive a control voltage. The method includes the synchronous rectifier controller detecting a rapid falling edge of the voltage difference signal to generate a rapid falling edge signal, generating an envelope signal according to the voltage difference signal, generating a time length control signal according to the voltage difference signal and the envelope signal, generating a blanking time signal according to the voltage difference signal and the time length control signal, and performing a logic operation on the blanking time signal and the rapid falling edge signal to generate the control voltage.

Abstract: A modular power conversion system is provided which includes a plurality of modules (building blocks) comprised of transformers and power conversion bridges. The modules are connected in series on either the input or output side and in parallel on the other side. A substantial number of the modules are operated in a fixed input-to-output voltage ratio, with the remaining module(s) operated in a variable input-to-output ratio. The fixed ratio modules are either placed in an active mode or in a bypassed mode. A controller sets the proportion of active and bypassed modules and controls the variable ratio modules, thus allowing an adjustable input-to-output ratio for the overall converter system. Prior to the bypassing of a module, the energy stored in its internal bus or link is dissipated or stored in an auxiliary circuit or moved to a neighboring module.

Abstract: A modulation device may include a variable burst regulator and a current-driven clock generator. The modulation device may include a first output terminal configured to provide a modulated voltage for an operating frequency over a modulation period. The current-driven clock generator may include a second input terminal configured to receive a buffered version of the modulated voltage. The current-driven clock generator may include a second output terminal configured to provide a modulated current during the modulation period. The operating frequency may be proportional to the modulated current. The operating frequency may control the operating frequency over the modulation period.

Abstract: Disclosed is a gate control circuit that generates a gate control signal of an output transistor connected between an application end of a power supply voltage and an application end of an output voltage. The gate control circuit includes a first current source connected between the application end of the power supply voltage and the application end of the output voltage, a second current source connected between an application end of a booster voltage and an application end of a reference voltage, the booster voltage being raised to a voltage value higher than the power supply voltage in a steady state, an output stage that uses at least one of the first and second current sources to generate a gate charge current for charging a gate of the output transistor, and a controller that uses at least one of the first and second current sources according to the output voltage.