Abstract: A display device includes: a plurality of pixel electrodes; a plurality of pixel circuits below the plurality of pixel electrodes; some scan lines, each of the scan lines being connected to a corresponding one group of the plurality of pixel circuits; and a scan drive circuit configured to selectively send scanning signals to the scan lines. The plurality of pixel electrodes include effective pixel electrodes corresponding to respective pixels constituting a displayed image, and dummy pixel electrodes between the effective pixel electrodes and the scan drive circuit and corresponding to none of the respective pixels. Each of the effective pixel electrodes is connected to a corresponding one of the plurality of pixel circuits. Each of the scan lines is electrically connected to the scan drive circuit through a corresponding at least one of the dummy pixel electrodes.

Abstract: The present description concerns a package for an electronic device. The package including a plate and a lateral wall, separated by a layer made of a bonding material and at least one region made of a material configured to form in the region an opening between the inside and the outside of the package when the package is heated.

Abstract: According to one embodiment, in a first concentration of an impurity element contained in a first impurity region, a second concentration of the impurity element contained in a second impurity region, a third concentration of the impurity element contained in a third impurity region, and a fourth concentration of the impurity element contained in a high-concentration impurity region, the third concentration is equal to the fourth concentration, the third concentration is higher than the first concentration, and the first concentration is higher than the second concentration.

Abstract: A device includes an active region, an isolation structure, a gate structure, an interlayer dielectric (ILD) layer, a reading contact, and a sensing contact. The isolation structure laterally surrounds the active region. The gate structure is across the active region. The ILD layer laterally surrounds the gate structure. The reading contact is in contact with the isolation structure and is separated from the gate structure by a first portion of the ILD layer. The sensing contact is in contact with the isolation structure and is separated from the gate structure by a second portion of the ILD layer.

Abstract: A semiconductor memory device, and a method of manufacturing the same, includes a lower stack in which a plurality of first interlayer insulating layers and first conductive layers are alternately stacked, a plurality of cell plugs passing through the lower stack in a vertical direction, an upper stack in which a plurality of second interlayer insulating layers and at least one second conductive layer are alternately stacked on the lower stack, a plurality of drain select plugs passing through the upper stack and being in contact with an upper portion of the plurality of cell plugs, and a separation pattern separating adjacent drain select plugs among the plurality of drain select plugs, wherein the separation pattern is in contact with a sidewall of each of the adjacent drain select plugs.

Abstract: A transparent touch display apparatus includes a light-emitting device on an emission area of a device substrate and a touch electrode on a transmission area of the device substrate. The light-emitting device includes a first electrode, a light-emitting layer and a second electrode. The touch electrode includes the same material as the second electrode. An encapsulating element is disposed on the light-emitting device and the touch electrode. An over-coat layer is disposed between the device substrate and the light-emitting device, and between the device substrate and the touch electrode. A first link wire electrically connected to the second electrode of the light-emitting device and a second link wire electrically connected to the touch electrode are disposed between the device substrate and the over-coat layer.

Abstract: An electromagnetic radiation detector includes an InP substrate having a first surface opposite a second surface; a first InGaAs electromagnetic radiation absorber stacked on the first surface and configured to absorb a first set of electromagnetic radiation wavelengths; a set of one or more buffer layers stacked on the first InGaAs electromagnetic radiation absorber and configured to absorb at least some of the first set of electromagnetic radiation wavelengths; a second InGaAs electromagnetic radiation absorber stacked on the set of one or more buffer layers and configured to absorb a second set of electromagnetic radiation wavelengths; and an immersion condenser lens formed on the second surface and configured to direct electromagnetic radiation through the InP substrate and toward the first InGaAs electromagnetic radiation absorber and the second InGaAs electromagnetic radiation absorber.

Abstract: An optical semiconductor element includes a substrate and a plurality of cells. Each cell includes an optical layer, a first semiconductor layer, and a second semiconductor layer. The plurality of cells include a first cell and a second cell. The second semiconductor layer of the first cell and the first semiconductor layer of the second cell are electrically connected to each other by a first connection portion of a first wiring portion. The first wiring portion has a first extending portion that extends from the first connection portion so as to surround four side portions of the optical layer of the first cell. The optical layer is an active layer that generates light having a central wavelength of 3 ?m or more and 10 ?m or less or an absorption layer having a maximum sensitivity wavelength of 3 ?m or more and 10 ?m or less.

Abstract: A display device may prevent external moisture from being permeated thereinto. The display device comprises a substrate provided with a display area for displaying an image by a plurality of subpixels, a plurality of first electrodes provided in each of the plurality of subpixels over the substrate, a light emitting layer provided over the plurality of first electrodes, a second electrode provided over the light emitting layer, and a common power line provided between the substrate and the first electrodes, including a contact area to which the second electrode is connected. Each of the plurality of first electrodes is provided with a first opening area in an edge area adjacent to the contact area of the common power line.

Abstract: An integrated photodetecting optoelectronic semiconductor component for detecting light bursts in a light signal received by the component includes a silicon photomultiplier for: measuring the intensity of the light signal received by the component, and outputting a measurement signal that is indicative of the light intensity of the received light signal. The component is characterised by a comparator circuit: having a first input section, a second input section and an output section, and operatively connected to the silicon photomultiplier via its first input section.

Abstract: An optoelectronic synaptic memristor includes: a bottom electrode layer, a porous structure layer modified with quantum dots, a two-dimensional material layer, a transparent top electrode layer, and a waveguide layer, which are arranged in sequence from top to bottom, wherein the waveguide is ridge shaped for light conduction, comprising a wedge-shaped output terminal, wherein: through the wedge-shaped output terminal of the waveguide, light is vertically injected into the two-dimensional material layer and the porous structure layer modified with the quantum dots. By integrating the waveguide and the optoelectronic memristor, the present invention obtains the highly controlled characteristics with high alignment and confinement for light effect on the device and has advantages in realizing optoelectronic synergy in the optoelectronic synaptic memristors.

Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a substrate having an active region and an isolation region. The semiconductor structure includes gate stacks on the substrate that extend over the active region and the isolation region. The semiconductor structure includes a gate spacer on sidewalls of the gate stacks. The semiconductor structure includes an interlevel dielectric (ILD) layer over the substrate and implanted with one or more dopants, the ILD layer having a top implanted portion over a bottom nonimplanted portion. The top implanted portion seals an air gap between a sidewall of the ILD layer and the gate spacer.

Abstract: An apparatus includes a substrate on which a pixel with a color filter is formed. The pixel includes a first conversion portion and a second conversion portion in an in-plane direction of the substrate, the second conversion portion having a lower sensitivity to light than a sensitivity of the first conversion portion. In a depth direction of the substrate, the apparatus includes a first member between the first conversion portion and the color filter and a second member between the second conversion portion and the color filter in a depth direction of the substrate. The first member is adjacent to the second member in the in-plane direction of the substrate. A refractive index of the first member is higher than a refractive index of the second member.

Abstract: A semiconductor device including: a semiconductor substrate; a temperature sensing unit provided on a front surface of the semiconductor substrate; an anode pad and a cathode pad electrically connected with the temperature sensing unit; a front surface electrode being set to a predetermined reference potential; and a bidirectional diode unit electrically connected in a serial bidirectional way between the cathode pad and the front surface electrode is provided. The bidirectional diode unit may be arranged between the anode pad and the cathode pad on the front surface.

Abstract: A semiconductor device includes a thin-film transistor. The thin-film transistor comprises an oxide semiconductor layer, a gate insulating layer, a gate electrode overlapped on the oxide semiconductor layer through the gate insulating layer, a source electrode in contact with the oxide semiconductor layer, a drain electrode in contact with the oxide semiconductor layer and n (n is a natural number) metal layer(s) in contact with the oxide semiconductor layer and disposed across the oxide semiconductor layer between the source electrode and the drain electrode. The oxide semiconductor layer has (n+1) channel regions between the source electrode and the drain electrode in a plan view.

Abstract: A semiconductor light receiving element in which a photodiode is formed on the main surface side of a first semiconductor substrate, and a cone ave mirror reflecting an incident light toward the light receiving element. The concave mirror comprises a flat first surface of the second semiconductor substrate that is transparent to the incident light, a convex surface formed in a convex shape toward the side opposite to the first surface on the second surface side opposite to the first surface, and a reflective film formed on the convex surface, and the incident light entering from the first surfaceside is reflected by the reflective film to a condensing positionnear the first surface, and the light receiving element was fixed to the first surface so as to overlap the light focusing position of the concave mirror.

Abstract: The present application discloses a method for fabricating a semiconductor device including: providing a photomask including an opaque layer on a mask substrate and surrounding a translucent layer on the mask substrate; forming a pre-process mask layer on a device stack; patterning the pre-process mask layer using the photomask to form a patterned mask layer including a mask region corresponding to the opaque layer, a trench region corresponding to the translucent layer, and a via hole corresponding to the mask opening of via feature; performing a damascene etching process to form a via opening and a trench opening in the device stack. The device stack includes a first dielectric layer on a substrate, a first etch stop layer on the first dielectric layer, and a second dielectric layer on the first etch stop layer. The damascene etching process forms the trench opening having a bottom on the first etch stop layer.

Abstract: Some embodiments relate to an integrated circuit, comprising: a pixel, comprising: a photodetection region; and a drain configured to discard charge carriers from within a semiconductor region of the pixel outside of the photodetection region. Some embodiments relate to an integrated circuit, comprising: a pixel, comprising: a photodetection region; and a drain configured to discard charge carriers from the photodetection region, wherein the drain comprises a semiconductor region and the semiconductor region is contacted by a metal contact. Some embodiments relate to an integrated circuit, comprising: a pixel, comprising: a photodetection region; and a drain configured to discard charge carriers from the photodetection region, wherein the drain comprises a semiconductor region that to which electrical contact is made through a conductive path that does not include a polysilicon electrode.

Abstract: The method includes: providing a substrate, the substrate including a first region and a second region; forming an insulating layer on the substrate; etching a portion of the insulating layer in the second region, the insulating layer in the first region being configured as a first insulating layer, a remaining portion of the insulating layer in the second region being configured as a second insulating layer; forming a first barrier layer covering the first insulating layer and a second barrier layer covering the second insulating layer; etching the first barrier layer, a portion of the second barrier layer and the first insulating layer to form a through hole in the first insulating layer, and to form a hole segment in the second barrier layer; and removing the first barrier layer and the second barrier layer.

Abstract: A display device includes a light emitting area, a non-light emitting area surrounding the light emitting area, and a separation area spaced apart from the light emitting area, the non-light emitting area disposed between the light emitting area and the separation area; a bank disposed in the non-light emitting area; a first alignment electrode and a second alignment electrode that extend from the light emitting area through the non-light emitting area to the separation area; light emitting elements electrically connected to at least one of the first alignment electrode and the second alignment electrode; a first contact electrode disposed in the separation area and electrically connected to the first alignment electrode; and a second contact electrode disposed in the separation area and electrically connected to the second alignment electrode.