Patents Examined by Sitaramarao S Yechuri
  • Patent number: 11515609
    Abstract: A coplanar waveguide structure includes a dielectric layer disposed over at least a portion of a substrate and a planar transmission line disposed within the dielectric layer. In some instances, the planar transmission line can include a conductive signal line and one or more ground lines. In other instances, the planar transmission line may include a conductive stacked signal line and one or more stacked ground lines.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: November 29, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Jun-De Jin
  • Patent number: 11515442
    Abstract: An optical semiconductor element having a mesa portion includes a substrate and semiconductor layers on the substrate. The optical semiconductor element further includes a first contact electrode, a second contact electrode on the semiconductor layer, first and second lead-out wires connected to the first and second contact electrodes, respectively, and an insulating film covering at least an upper surface of the semiconductor layer and the second contact electrode. The second lead-out wire is connected to the second contact electrode in an opening of the insulating film. An outer peripheral end of the second contact electrode in at least a portion where the second contact electrode and the second lead-out wire are connected is above and outside an outer peripheral end of a connection portion with the semiconductor layer, and an inner peripheral end is above and inside an inner peripheral end of the connection portion with the semiconductor layer.
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: November 29, 2022
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenji Fujimoto, Koshi Himeda, Toshihiro Tada, Tetsuro Toritsuka, Shinji Kaburaki
  • Patent number: 11508492
    Abstract: Provided is a radioisotope battery. A radioisotope battery according to exemplary embodiments may include: a substrate; a shield layer disposed on the substrate and including a first material; a source layer embedded in the shield layer and including a second material which is a radioisotope of the first material; a PN junction layer on the shield layer and the source layer; and a window layer between the PN junction layer and the source layer.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: November 22, 2022
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Seong Mo Park, Tae Wook Kang, Kyung Hwan Park, Byounggun Choi
  • Patent number: 11508744
    Abstract: A memory device may include a substrate; a first stack structure comprising a plurality of first gate layers and a plurality of first interlayer insulating layers alternately stacked on the substrate; a second stack structure comprising a plurality of second gate layers and a plurality of second interlayer insulating layers alternately stacked on the first stack structure; and a channel structure penetrating the first stack structure and the second stack structure, wherein the channel structure comprises a first portion in a first channel hole penetrating the first stack structure, a second portion in a second channel hole penetrating the second stack structure, and a first protrusion located in a first recess recessed into one layer of the plurality of first interlayer insulating layers from a side portion of the first channel hole.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: November 22, 2022
    Inventors: Jisung Cheon, Kiyoon Kang
  • Patent number: 11508856
    Abstract: A semiconductor device includes a photosensitive element, an insulating region, and a quench element. The photosensitive element includes a first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type on the first semiconductor region, a third semiconductor region of a second conductivity type on the second semiconductor region, and a fourth semiconductor region of the second conductivity type around the second and third semiconductor regions. An impurity concentration of the first conductivity type in the second semiconductor region is higher than that in the first semiconductor region. An impurity concentration of the second conductivity type in the fourth semiconductor region is lower than that of the third semiconductor region. The insulating region is around the first and fourth semiconductor regions. The quench element is electrically connected to the third semiconductor region.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: November 22, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Koichi Kokubun, Mitsuhiro Sengoku
  • Patent number: 11499688
    Abstract: A light device may include a printed circuit board having at least one conductive section. An LED may be electrically connected and fixed on a conductive section of the printed circuit board by means of a soldered connection. The printed circuit board may also include a coating-type insulating layer and/or the conductive section has an edge. The fixing region of the LED is connected to a discharge space by means of an outlet, so that during the production process, melted solder can flow off in a defined manner. The arrangement and/or embodiment of the outlet is such that in a preferred direction of movement of the LED is developed in order to position same in a defined manner.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: November 15, 2022
    Assignee: OSRAM GMBH
    Inventor: Markus Stange
  • Patent number: 11502215
    Abstract: Examples described herein relate to an avalanche photodiode (APD) and an optical receiver including the APD. The APD may include a substrate and a photon absorption region disposed on the substrate. The substrate may include a charge carrier acceleration region under the photon absorption region; a charge region adjacent to the charge carrier acceleration region; and a charge carrier multiplication region adjacent to the charge region. The charge carrier acceleration region, the charge region, and the charge carrier multiplication region are laterally formed in the substrate. When a biasing voltage is applied to the optoelectronic device, photon-generated free charge carriers may be generated in the photon absorption region and are diffused into the charge carrier acceleration region.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: November 15, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Yuan Yuan, Di Liang, Xiaoge Zeng, Zhihong Huang
  • Patent number: 11489084
    Abstract: A photodetection element that includes: a substrate with a high infrared transmittance in a desired wavelength region; an electron barrier layer of a type-I superlattice structure, the electron barrier layer being formed above the substrate and lattice-matched to the substrate; and a light-receiving layer of a type-II superlattice structure, formed in contact with the electron barrier layer.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: November 1, 2022
    Assignee: NEC CORPORATION
    Inventor: Yuichi Igarashi
  • Patent number: 11476209
    Abstract: Various embodiments relate to a packaged radio frequency (RF) amplifier device implementing a split bondwire where the direct ground connection of an output capacitor is replaced with a set of bondwires connecting to ground in a direction opposite to the wires connecting to the output of a transistor to an output pad. This is done in order to reduce the effects of mutual inductance between the various bondwires associated with the output of the RF amplifier device.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: October 18, 2022
    Assignee: NXP B.V.
    Inventors: Vikas Shilimkar, Kevin Kim, Richard Emil Sweeney, Eric Matthew Johnson
  • Patent number: 11476340
    Abstract: A device is provided that comprises a first layer deposited onto a second layer. The second layer comprises a lightly doped n-type or p-type semiconductor drift layer, and the first layer comprises a high-k material with a dielectric constant that is at least two times higher than the value of the second layer. A metal Schottky contact is formed on the first layer and a metal ohmic contact is formed on the second layer. Under reverse bias, the dielectric constant discontinuity leads to a very low electric field in the second layer, while the electron barrier created by the first layer stays almost flat. Under forward bias, electrons flow through the first layer, into the metal ohmic contact. For small values of conduction band offset or valence band offset between the first layer and the second layer, the device is expected to support efficient electron or hole transport.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: October 18, 2022
    Assignee: Ohio State Innovation Foundation
    Inventors: Siddharth Rajan, Zhanbo Xia, Wyatt Moore
  • Patent number: 11476375
    Abstract: A light detection device includes a photo detector and a circuit board connected to the photo detector by conductive connection parts. In this light detection device, the photo detector includes a substrate, a semiconductor layer provided on one surface of the substrate, a first groove dividing the semiconductor layer into sections for respective pixels, and first electrodes provided on the semiconductor layer and serving as the pixels. Each of the conductive connection part contains indium. Each of the first electrode includes a Ti layer and a Pt layer stacked in this order on the semiconductor layer, and the conductive connection parts are provided on the Pt layers of the first electrodes.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: October 18, 2022
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Kenichi Machinaga, Takeshi Okada, Akira Ouchi, Rie Maruyama
  • Patent number: 11469337
    Abstract: An optically controlled switch includes a substrate integrated waveguide (SIW) including: a first port and a second port, the first port and the second port being located at ends of the SIW to input and output an electromagnetic wave; and a shorting via electrically connected to a bottom layer of the SIW and separated from a top layer of the SIW by a dielectric gap. The optically controlled switch includes: a photoconductive element located on the top layer of the SIW and electrically connected to the shorting via and the top layer of the SIW, the photoconductive element being configured to have a dielectric state and a conductor state depending on a state of a controlling light flux; and a cutoff waveguide formed around the dielectric gap and the photoconductive element, and configured to provide control of the photoconductive element from a light source and block parasitic radiation.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: October 11, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Mikhail Nikolaevich Makurin, Gennadiy Alexandrovich Evtyushkin, Anton Sergeevich Lukyanov, Artem Yurievich Nikishov, Elena Aleksandrovna Shepeleva
  • Patent number: 11469273
    Abstract: An organic semiconductor detector for detecting radiation has an organic conducting active region, an output electrode and a field effect semiconductor device. The field effect semiconductor device has a biasing voltage electrode and a gate electrode. The organic conducting active region is connected on one side to the field effect semiconductor device and is connected on another side to the output electrode. The organic semiconductor detector has an option switching circuitry having a field effect semiconductor device and resistance.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: October 11, 2022
    Inventor: Michael Bardash
  • Patent number: 11456361
    Abstract: Various forms of MgxGe1-xO2-x are disclosed, where the MgxGe1-xO2-x are epitaxial layers formed on a substrate comprising a substantially single crystal substrate material. The epitaxial layer of MgxGe1-xO2-x has a crystal symmetry compatible with the substrate material. Semiconductor structures and devices comprising the epitaxial layer of MgxGe1-xO2-x are disclosed, along with methods of making the epitaxial layers and semiconductor structures and devices.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: September 27, 2022
    Assignee: Silanna UV Technologies Pte Ltd
    Inventor: Petar Atanackovic
  • Patent number: 11444216
    Abstract: According to the present disclosure, techniques related to manufacturing and applications of power photodiode structures and devices based on group-III metal nitride and gallium-based substrates are provided. More specifically, embodiments of the disclosure include techniques for fabricating photodiode devices comprising one or more of GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, structures and devices. Such structures or devices can be used for a variety of applications including optoelectronic devices, photodiodes, power-over-fiber receivers, and others.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: September 13, 2022
    Assignee: SLT Technologies, Inc.
    Inventors: Drew W. Cardwell, Mark P. D'Evelyn
  • Patent number: 11444220
    Abstract: A method for producing a light detection device includes preparing a back-illuminated light receiving element that includes a plurality of light receiving sections and a trench which is open to a first main surface so as to isolate the adjacent light receiving sections from each other; disposing the light receiving element on a wiring substrate such that the first main surface of the light receiving element faces the wiring substrate; forming a resin mold, which reaches at least a position that is further away from the wiring substrate than an end portion on a second main surface side of the trench in a thickness direction of the wiring substrate, on the wiring substrate so as to surround an entire side surface of the light receiving element; polishing the light receiving element and the resin mold from the second main surface side of the light receiving element.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: September 13, 2022
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventor: Masaru Morishita
  • Patent number: 11444093
    Abstract: A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers. A horizontal pattern of operative memory-cell pillars extends through the insulative tiers and the conductive tiers in individual of the memory blocks. The operative memory-cell pillars have intrinsic compressive mechanical stress. At least one dummy structure in the individual memory blocks extends through at least upper of the insulative tiers and the conductive tiers. The at least one dummy structure is at least one of (a) and (b), where (a): at a lateral edge of the horizontal pattern, and (b): at a longitudinal end of the horizontal pattern. The at least one dummy structure has intrinsic tensile mechanical stress. Other embodiments, including methods, are disclosed.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: September 13, 2022
    Assignee: Micron Technology, Inc.
    Inventor: Chandra Tiwari
  • Patent number: 11437531
    Abstract: A photodetector especially useful for infrared detection. The photodetector includes a two-dimensional arrangement of resonator-photodiode units disposed along a detector surface for detecting radiation incident from above the detector surface and having a target frequency (vt) that corresponds to a target wavelength (?t) in vacuum, wherein each resonator-photodiode unit has a photodiode semiconductor structure, which is sensitive to the target frequency (vt), and a subwavelength dielectric resonator.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: September 6, 2022
    Assignee: IEE INTERNATIONAL ELECTRONICS & ENGINEERING S.A.
    Inventors: Norbert Herschbach, Christian Pauly
  • Patent number: 11437539
    Abstract: A manufacturing method of an optical sensor package includes: disposing a chip on a circuit board, the chip including a light emitting area and a light receiving area; disposing at least one light emitting element, which is electrically connected to the circuit board, on the light emitting area of the chip; coating a light blocking material between the light emitting area and the light receiving area; filling a light permeable material that covers the circuit board, the chip, the light blocking material, and the at least one light emitting element; removing a part of the light permeable material disposed between the light emitting area and the light receiving area, forming a first recess and expose the light blocking material; and filling an anti-light-leakage material in the first recess, to form a lateral light blocking structure through stacking the anti-light-leakage material and the light blocking material.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: September 6, 2022
    Assignee: LITE-ON SINGAPORE PTE. LTD.
    Inventors: Chien-Hsiu Huang, Yu-Chou Lin, Teck-Chai Goh
  • Patent number: 11424377
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a photodiode with an integrated, light focusing elements and methods of manufacture. The structure includes: a trench photodiode comprising a domed structure; and a doped material on the domed structure, the doped material having a concave underside surface.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: August 23, 2022
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventors: Rajendran Krishnasamy, Steven M. Shank, John J. Ellis-Monaghan, Ramsey Hazbun