Abstract: Apparatus and methods for sensing long wavelength light are described herein. A semiconductor device includes: a carrier; a device layer on the carrier; a semiconductor layer on the device layer, and an insulation layer on the semiconductor layer. The semiconductor layer includes isolation regions and pixel regions. The isolation regions are or include a first semiconductor material. The pixel regions are or include a second semiconductor material that is different from the first semiconductor material.

Abstract: An electronic package is provided. The electronic package includes a carrier, a first electronic component, a bonding element, and a barrier. The carrier has a conductive layer. The first electronic component is disposed adjacent to the carrier and has a first terminal and a second terminal. The bonding element is configured to electrically connect the conductive layer to the first terminal. The barrier is configured to avoid electrically bypassing an electrical path in the first electronic component and between the first terminal and the second terminal.

Abstract: A single photon avalanche diode may include a substrate and a plurality of junction structures supported by the substrate. The substrate may have an upper surface and a lower surface that are opposite to each other. The junction structures may support by the substrate to make contact with the upper surface of the substrate. The junction structures may include portions that overlap with each other in a vertical direction perpendicular to the substrate. Each of the junction structures may include a first impurity region having a first conductive type and disposed to make contact with the upper surface of the substrate, and a second impurity region having a second conductive type and disposed to make contact with the upper surface of the substrate and a bottom surface of the first impurity region. The first impurity region and the second impurity region in each of the junction structures may be configured to receive a bias voltage through the upper surface of the substrate.

Abstract: An apparatus includes a first semiconductor region of a first conductivity type configured to collect a signal charge, and a connection region of a second conductivity type configured to feed a predetermined potential to a well including a second semiconductor region of the second conductivity type at a depth to which the connection region extends, a third semiconductor region of the second conductivity type at a position deeper than the connection region and the second semiconductor region, and a fourth semiconductor region between the second semiconductor region and the third semiconductor region, wherein a dopant for use in forming a semiconductor region of the first conductivity type is injected in the fourth semiconductor region, and a main carrier of the fourth semiconductor region is a carrier of the same conductivity type as a majority carrier of a semiconductor region of the second conductivity type.

Abstract: A detection device comprising: an insulating substrate; a plurality of gate lines that are provided on the insulating substrate, and extend in a first direction; a plurality of signal lines that are provided on the insulating substrate, and extend in a second direction intersecting the first direction; a switching element coupled to each of the gate lines and each of the signal lines; a first photoelectric conversion element that comprises a first semiconductor layer containing amorphous silicon, and is coupled to the switching element; and a second photoelectric conversion element that comprises a second semiconductor layer containing polysilicon, and is coupled to the switching element.

Abstract: The present disclosure provides an array substrate, a method for manufacturing the array substrate, and a display apparatus. The array substrate includes a plurality of substrates spaced apart from each other; a plurality of display units which are provided on the plurality of substrates, respectively; a plurality of connection lines each of which is configured to connect two adjacent display units; a plurality of stretchable connection bridges each of which is configured to connect two adjacent substrates of the plurality of substrates; and a length of the connection line is greater than a length of the stretchable connection bridge.

Abstract: Semiconductor lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a semiconductor lighting device includes a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The semiconductor lighting device also includes an indentation extending from the second semiconductor material toward the active region and the first semiconductor material and an insulating material in the indentation of the solid state lighting structure.

Abstract: A thin film transistor array substrate for a digital X-ray detector device includes a base substrate; a driving thin film transistor disposed over the base substrate; a PIN (P type semiconductor-Intrinsic type semiconductor-N type semiconductor) diode configured to be connected to the driving thin film transistor, the PIN diode including a lower electrode, a PIN layer, and an upper electrode; and at least one leakage current blocking layer configured to cover a side surface of the PIN layer and contact the PIN layer to thereby minimize generation of the leakage current of the PIN diode and improve characteristics such as detective quantum efficiency (DQE) and signal to noise ratio (SNR) and improving an image quality of the digital X-ray detector device.

Abstract: The present invention is to provide a GePD, the optical sensitivity of which is independent from a temperature, and to achieve a photodetector in which heat applied from heaters is constant even when a plurality of GePDs are provided and in which a temperature and sensitivity of each of the GePDs are the same. The photodetector includes germanium photoreceivers including a silicon substrate, a lower clad layer, a silicon core layer, a silicon waveguide layer, a germanium layer, an upper clad layer, and electrodes. In the photodetector, two or more germanium photoreceivers are arranged adjacent to each other on the silicon substrate, and the photodetector includes resistors embedded in the upper clad layer to cover or surround respective germanium layers of the two or more germanium photoreceivers arranged adjacent to each other, the resistors being made of a metal or a metal compound.

Abstract: An optoelectronic integrated substrate, a preparation method thereof and an optoelectronic integrated circuit. The electronic integrated substrate includes a base substrate and an electronic device and a photo-diode disposed on the base substrate, wherein the photo-diode includes an ohmic contact layer and an intrinsic amorphous silicon layer, and the ohmic contact layer and the intrinsic amorphous silicon layer are sequentially arranged along a direction parallel to the plane of the base substrate and are connected.

Abstract: A semiconductor photodiode which functions in a wide band range up to medium wave infrared and far wavelengths in addition to visible region and near infrared includes: a light absorber region in micro structure which can provide light absorbance upon being roughened by laser; a first electrical lower contact coated with metal materials such as aluminium (Al), silver (Ag); a silicon which consists of crystalline silicon (c-Si); a second electrical lower contact which is coated with metal materials such as aluminium (Al), silver (Ag); a chalcogen doped hyper-filled silicone region which is obtained as a result of doping by pulse laser to the silicone region implanted by chalcogen elements; and upper electrical contact parts which are coated generally in the thickness range of 10 nm-1000 nm by using two-layered alloys with aluminium (Al)—(Al)-silver (Ag), two-layered alloys with titanium (Ti)-gold (Au), three-layered alloys with Ti-Platinum(Pt)—Au—Ag or three-layered alloys with Ti-lead(Pb)—Ag.

Abstract: A photosensitive sensor, a manufacturing method thereof and a display panel are provided. The photosensitive sensor includes a first type semiconductor layer, an intrinsic semiconductor layer disposed on a side of the first type semiconductor layer, and a second type semiconductor layer disposed on a side of the intrinsic semiconductor layer away from the first type semiconductor layer. The intrinsic semiconductor layer is provided with metal particles capable of generating a surface plasmon effect. The metal particles are dispersely distributed in the intrinsic semiconductor layer.

Abstract: A solid-state relay having favorable electrical characteristics is provided. The solid-state relay includes a first circuit and a second circuit. The first circuit includes a first light-emitting element. The second circuit includes a first light-receiving element, a memory, and a first switch. The memory includes a second switch. The second switch includes a second semiconductor layer. The first switch and the first light-emitting element are formed using a first semiconductor layer. The first semiconductor layer and the second semiconductor layer contain gallium, and the second semiconductor layer further contains oxygen. On or off of the first light-emitting element is controlled by a first signal supplied to the first circuit. First data, which is generated when the first light-receiving element converts light emitted by the first light-emitting element into voltage, is supplied to the memory. Conduction or non-conduction of the first switch is controlled by the first data stored in the memory.

Abstract: An integrated optical sensor is formed by a pinned photodiode. A semiconductor substrate includes a first semiconductor region having a first type of conductivity located between a second semiconductor region having a second type of conductivity opposite to the first type one and a third semiconductor region having the second type of conductivity. The third semiconductor region is thicker, less doped and located deeper in the substrate than the second semiconductor region. The third semiconductor region includes both silicon and germanium. In one implementation, the germanium within the third semiconductor region has at least one concentration gradient. In another implementation, the germanium concentration within the third semiconductor region is substantially constant.

Abstract: Some embodiments relate to an integrated circuit (IC) disposed on a silicon substrate, which includes a well region having a first conductivity type. An epitaxial pillar of SiGe or Ge extends upward from the well region. The epitaxial pillar includes a lower epitaxial region having the first conductivity type and an upper epitaxial region having a second conductivity type, which is opposite the first conductivity type. A dielectric layer is arranged over an upper surface of the substrate and is disposed around the lower epitaxial region to extend over outer edges of the well region. The dielectric layer has inner sidewalls that contact outer sidewalls of the epitaxial pillar. A dielectric sidewall structure has a bottom surface that rests on an upper surface of the dielectric layer and has inner sidewalls that extend continuously from the upper surface of the dielectric layer to a top surface of the epitaxial pillar.

Abstract: Provided are a photodetector, a manufacturing method thereof, and a lidar system. A photosensitive region of the photodetector is circular and has a diameter range of 100-300 ?m. Compared with a conventional photodetector having a photosensitive region with a diameter of 50 ?m, the photodetector of the present invention can have a detection range greater than 200 m, responsivity greater than 20 A/W and a dark current less than 10 nA.

Abstract: The present disclosure is directed to a package, such as a wafer level chip scale package (WLCSP), with a die coupled to a central portion of a transparent substrate. The transparent substrate includes a central portion having and a peripheral portion surrounding the central portion. The package includes a conductive layer coupled to a contact of the die within the package that extends from the transparent substrate to an active surface of the package. The active surface is utilized to mount the package within an electronic device or to a printed circuit board (PCB) accordingly. The package includes a first insulating layer separating the die from the conductive layer, and a second insulating layer on the conductive layer.

Abstract: Stitched die packaging techniques and structures are described in which reconstituted chips are formed using wafer reconstitution and die-stitching techniques. In an embodiment, a chip includes a reconstituted chip-level back end of the line (BEOL) build-up structure to connect a die set embedded in an inorganic gap fill material.

Abstract: A semiconductor apparatus includes a first semiconductor layer, a second semiconductor layer, and a structure provided between the first and second semiconductor layers. The semiconductor apparatus further includes a first electrode supported by a first insulating layer, a second electrode supported by a second insulating layer, a first wire bonded to the first electrode through a first opening provided in the first semiconductor layer, and a second wire bonded to the second electrode through a second opening provided in the first semiconductor layer, and an annular member made of a non-insulating material and provided between the first semiconductor layer and the first electrode. A distance from the second semiconductor layer to a first joint between the first electrode and the first wire is longer than a distance from the second semiconductor layer to a second joint between the second electrode and the second wire.

Abstract: The present application relates to semiconductor photodetectors, in particular to a silicon carbide-based UV-visible-NIR full-spectrum-responsive photodetector and a method for fabricating the same. The photodetector includes a silicon carbide substrate, and metal counter electrodes and a surface plasmon polariton nanostructure arranged thereon. The silicon carbide substrate and the metal counter electrodes constitute a metal-semiconductor-metal photodetector with coplanar electrodes. When the ultraviolet light is input, free carriers directly generated in silicon carbide are collected by an external circuit to generate electrical signals. When the visible light is input, hot carriers generated in the surface plasmon polariton nanostructure tunnel into the silicon carbide semiconductor to become free carriers to generate electrical signals.