Abstract: A complementary metal oxide semiconductor (CMOS) field effect transistor (FET) memory sense amplifier to detect a relatively small differential voltage that is superimposed on a relatively large common mode precharge signal. The sense amplifier is implemented so as to provide latched output signals after a short time delay and in response to sensed input signals that are supplied via a pair of data bus lines.

Abstract: An analog signal multiplier has a pulse former which forms pulses with heights that are proportional to a first input signal and widths that are proportional to a second input signal, integrates the pulses so formed and at the conclusion of the integration, samples the integrated values and resets the integrator and pulse former.

Abstract: A pulse generating circuit comprises means for charging from a DC power source through a resistor for charge to a capacitor; means for detecting a predetermined value of charge of the capacitor and triggering a main thyristor to discharge the charge of the capacitor through the main thyristor and means for generating the pulse output to a load by the discharge current.

Abstract: A current mirror circuit wherein an I.sup.2 L circuit is employed as the load of a current mirror circuit formed of a PNP (NPN) transistor, the injector of the I.sup.2 L circuit is common with those of another group of I.sup.2 L circuits, and a predetermined current is derived from the PNP (NPN) transistor of the current mirror circuit.

Abstract: A continuously variable, reversible active circuit parameter trimming or adjustment method and apparatus are described. An active field effect transistor having a control gate to which a voltage is applied for the purpose of varying the conduction in the FET is achieved by supplying the control gate voltage from the stored voltage on a floating gate FET which has been charged to the desired variable level for controlling the conduction in the controlled FET at the desired operating point for parameter adjustment in an active circuit of which the FET may form a part. The floating gate FET structure can be electrically adjusted by charging or discharging the floating gate thereof which acts as a fixed memory to supply the appropriate control voltage to the controlled FET electrically connected thereto by a conductor connecting the control gate of the FET with the floating gate in the trimming or parameter adjustment floating gate FET element.

Abstract: A temperature sensor circuit is disclosed which employs a plurality of semiconductor junctions arranged either in a current-mirror configuration or a bridge configuration in order to provide a differential output voltage which is linearly proportional to temperature. The temperature sensor circuit is ideally suited for fabrication as an integrated circuit, and the differential output voltage is relatively insensitive to integrated circuit processing variations as well as power supply variations. By providing a differential output signal, the circuit is particularly useful in high noise environments such as automotive applications.

Abstract: A circuit arrangement for monitoring the square of the RMS value of a periodic signal in which an integrator following a squarer is reset to zero at periodic intervals. A first limit detector connected thereto delivers, if the limit set therein is exceeded, a pulse which is fed, via a first conjunctive logic element, to the counting input of a counter. The counter delivers a continous signal to an indicator and to the first conjunctive logic element when a preset counter reading is reached. A gate circuit blocks the periodic resetting of the counter as long as the first limit detector responds in each periodic time interval or when the preset counter reading is reached. This circuit permits quick determination of the RMS value.

Abstract: A radiation hardened circuit for a bit line driver in a ROM or PROM wherein the discharge of the bit line capacitance is enhanced by shorting the current limiting resistor momentarily at the initiation of the discharge cycle and by allowing the bit line charging voltage to go to a value only slightly less than the power supply voltage without sacrificing speed and noise immunity. The result is decreased delay time during the discharge transition without loss in noise immunity.

Abstract: Operate/release timing circuits are employed to generate time delayed pulse signals, for example, dial pulses, wink signals and other supervisory signals employed in telecommunications signaling systems. Pulse position and pulse width errors and other problems found in prior operate/release timers are resolved by employing a single digital counter and associated control logic elements. The timing circuit is controllably configured into several timer circuit arrangements including an integrating timer, AM timer, integrating timer including coast option, and AM timer including coast option. With the coast option enabled, initial noise immunity in the pulse signal is realized by resetting the counter to an initial state in response to any discontinuity in the input pulse signal until the input pulse signal is continuously present for a predetermined interval.

Abstract: A method and apparatus for driving a transistor wherein a control voltage and a cut-off voltage are applied to the base of the transistor to cause the transistor to conduct current and to cut-off, respectively, and wherein, preceding the application of the cut-off voltage, a further voltage is applied to the base of the transistor for a predetermined desaturation time interval .DELTA.t which depends upon the storage or delay time of the transistor. In accord with the invention, the aforesaid further voltage corresponds to the voltage at which the current at the base of the transistor is approximately zero.

Abstract: A semiconductor device comprises electrically isolated semiconductor segments embedded in a common crystalline substrate. Each of the semiconductor segments is electrically isolated from the other segments and from the substrate by an insulating film disposed therebetween. The substrate, the semiconductor segments, and the insulating film are thermally compatible over a wide temperature range, so that the insulating film also serves to effect a bond between the substrate and the segments.

Abstract: Each of an array of capacitive touchpad sensors has a single touchpad electrode fabricated upon a substrate and accessible to user personnel, with series coupling and shunt capacitance being provided respectively between a driving generator and the touchpad electrode, and the touchpad electrode and an array ground. Each capacitive touchpad sensor operates with a sense amplifier to provide a high density sensor array requiring relatively low driving voltage amplitudes and may be utilized with driven shields and a normalization network to provide reliable capacitance sensing with reduced sensitivity to contamination of the surface of the sensor array.

Abstract: A circuit for producing a digital output varying linearly with temperature changes by measuring the width of a pulse from a monostable multivibrator, in which the pulse is measured more than twice in succession and the results added. A greater change in the digital output for a given temperature change is achieved, providing higher measurement accuracy.

Abstract: A floating transistorized switching circuit comprises an optical coupler for electrically isolating a source of control signals from the switching circuit; a floating DC voltage supply, electrically isolated from the AC power line, for providing positive and negative logic level operating voltages, referenced to whatever voltage appears at the output terminal of the switching circuit; an output stage including first and second NPN switching transistors connected in a Darlington configuration; and a logic network responsive to the output signal from the optical coupler going on for turning on the Darlington output stage, and to this output signal going off for turning off the Darlington output stage.

Abstract: A noise-free electronic switching circuit selects one of a pair of audio input signals in an audio system. Each input signal is connected by separate conductors to a single output terminal. The output terminals of two transistors are respectively connected between each conductor and ground. When a manually-operated switch is switched to a first operating condition, an exponentially increasing and an exponentially decreasing control voltage are respectively applied to the bases of a first and a second transistor. When the actuating switch is switched to a second operating condition, an exponentially decreasing and an exponentially increasing control voltage are respectively applied to the bases of the first and the second transistor. In either operating condition, one transistor is turned on and the other is turned off. Thus, only the selected audio signal is delivered to the output terminal; and the other non-selected audio signal is shorted to ground before reaching the output terminal.

Abstract: An adaptive control circuit for use with a machine performance optimizing system for producing a control delay between a first event and the time at which a response to that event is to take place. The adaptive control circuit of this invention, when used with an internal combustion point closure signal and will advance or retard the generation of a spark plug firing signal for a period determined by the optimizing system's operating parameters, while still maintaining the desired dwell dictated by the engine manufacturer.

Abstract: The present invention relates to an electrical gain control system which provides a first signal logarithmically related to an input signal, sums a gain control signal with the first signal; and then provides an output signal which is an antilogarithmic function of the sum of the gain control signal and first signal. In accordance with the present invention in order to at least partially compensate for errors in the output signal arising from inherent characteristics of the components of the system, the system is improved by comparing the input signal and the output signal; generating an error correction signal in response to the comparison as a function of the errors in the output signal; and summing the error correction signal with the first signal and the gain control signal so as to reduce the error in the output signal.

Abstract: A circuit and method of paralleling power transistors connected as a Darlington circuit or device for use with electric motor controls. The circuit is comprised of a plurality of Darlington devices having a drive circuit from a motor controller connected to a common base connection and a plurality of active pull-down circuits for reducing the rise and fall times and effectively controlling the storage times of the power transistors. The active pull-down circuits are capacity coupled to an inverted drive signal to synchronize the turn-off time and speed-up discharge of storage in the power transistor circuit.

Abstract: Method and apparatus for independently, adjustably limiting both the peak current and average current in a switching servo amplifier.

Abstract: A system for switching among a plurality of input clock signals to produce an output clock signal which avoids the presence of spurious signals during the process of switching from one to another of said plurality of input clock signals. When it is desired to switch from one input clock signal to a new input clock signal, clock output logic is inhibited from supplying any clock output signal for a selected time period, after which the newly selected input clock signal is supplied as the clock output signal. The time period is dependent on the clock pulse rate of the newly selected input clock signal and is sufficiently long to assure that no spurious signals will occur thereafter.