Abstract: A pulse repetition interval generator with stagger circuit for providing a ulse repetition interval signal. The pulse repetition interval generator can be used with a device for generating simulated antenna scan patterns of conventional search radar antennas and comprises a source of clock pulses, a counter circuit, a repetition interval setting means, pulse generator means and a pulse width determining means.

Abstract: A constant amplitude, variable frequency, synchronized, linear ramp generr is disclosed for generating a sawtooth waveform signal, whose amplitude is independent of frequency. A capacitor is charged by a voltage controlled current source, which is responsive to a feedback control signal provided by an integrator; and subsequently discharged by a clamp, which is responsive to a trigger pulse signal, so as to establish a ramp voltage across the capacitor. The ramp voltage, which appears at the output of the linear ramp generator as the sawtooth waveform signal, in turn allows a television system to operate at various line rates.

Abstract: A circuit suitable for providing constant current bias for I.C's includes two transistors arranged to pass current in parallel in which base emitter voltage applied to one transistor is derived from the base emitter voltage applied to the other transistor with the base emitter voltage applied to the one transistor reduced by a component proportional to the magnitude of the current passed by the other transistor.

Abstract: A Hall sensing apparatus having a large dynamic range is adapted for generating a current signal substantially in phase with the current in a conductor. The Hall sensing apparatus has a magnetic field concentrator assembly with oppositely disposed pick-up plates, each with a centrally attached concentrator rod for being symmetrically positioned on either side of the conductor. A Hall sensor element is wholly positioned in the space between the ends of the rods remote from the plates. A current circuit, having an externally controlled current varying device and temperature drift control device in series with a current source, provides a Hall current through the sensor element. A detection circuit, coupled across the width of the sensor element, provides an inverted and non-inverted signal in phase with the conductor current which are coupled to the inverting input of a summing amplifier.

Abstract: A control circuit is adapted to control the movement of a pintle relative to the die head of extrusion apparatus. A command signal is supplied to a signal generator, which produces a first output signal in the form of a series of continuous voltage triangles, and a second output signal in the form of unit pulses. An impedance matrix contains a plurality of potentiometers which may be remotely connected to a summing amplifier. The potentiometers are arranged in a numerical order. Odd-numbered potentiometers are supplied with the triangular output signal from the signal generator. Even-numbered potentiometers are supplied with the signal generator triangular output signal, but which has been phase-shifted by half the width of one triangle. The pulse output from the signal generator is supplied to a decoder, which successively connects pairs of numerically-adjacent potentiometers with the summing amplifier during overlapping time intervals.

Abstract: An all-NPN bipolar transistor driver circuit characterized by low standby power dissipation and fast response, particularly at high input driving conditions. The bases of a pair of NPN transistors are commonly connected to an input terminal. The emitter of a third NPN transistor is connected to the collector of one transistor of the transistor pair and to an output terminal. The collector of the other transistor of the transistor pair is connected to the base of the third NPN transistor. The base and collector of the third NPN transistor are coupled to a first biasing means. The emitters of the transistor pair are connected to a second biasing means through respective resistors so that those emitters may be independently biased. The values of the biasing means are set, relative to the lowest input voltage excursion occurring at the input terminal so that no current flows through transistor pair during the lowest input voltage excursion.

Abstract: A noise eliminator circuit for use in a decoding circuit. A flip-flop is used to delay a first pulse train by the pulse width of a second pulse train so that pulse level transitions of the first pulse train occur non-coincident with the pulse level transitions of a synchronously generated third pulse train.

Abstract: The present invention relates to a control circuit adapted for CMOS implementation for the control of the supply voltage for integrated circuits, and particularly, relates to the indication of and/or control of variations of a supply voltage from a predetermined value.

Abstract: This invention relates to a tri-state type driver circuit in which any one of the three possible output signals of "float", "on", or "off" is produced at high speed even when an output terminal is accompanied with a great load. The tri-state type driver circuit comprises an output inverter circuit which employs a bipolar transistor as a load thereof and a MOS-FET as a driver thereof, a first logical circuit which is coupled to an input terminal of the bipolar transistor, which first logical circuit is made up of a C-MOS circuit receiving an external select signal and a C-MOS circuit having an input signal transmitted thereto and whose output can be specified by the external select signal, and a second logical circuit which is coupled to an input terminal of the MOS-FET, which second logical circuit is made up of a C-MOS circuit receiving the external select signal and a C-MOS circuit having the input signal transmitted thereto.

Abstract: A method of control for a metal halide electrolytic display cell consists in passing a control current through the cell in a first direction during periods of erasure and in the opposite direction during writing periods, a zero control current being maintained during periods of holding in the erased state and during periods of holding in the written state. A low leakage current is superimposed on the control current and passes through the cell in the first direction, at least during the periods of holding in the erased state.

Abstract: There is disclosed improved time slot scanner control apparatus, including a fail-safe control pulse former apparatus provided for each of a desired plurality of information time slots to sequence the data information transfer in relation to the respective track circuits operative with a transit vehicle. An information timing track is provided for sequencing this data information transfer and to reset the apparatus after each provided sequence of time slot control pulses.

Abstract: A phase-sensitive detector has its reference signal modified in a manner to ensure that the output of the rectifier is substantially insensitive to harmonic frequencies of the reference signal. To achieve this the reference signal is used to generate a low-distortion sinusoidal control signal of the same frequency as the reference signal. The control signal controls a switching signal generator to generate a switching signal for repetitively switching the signal being rectified. The switching signal has spaces of interval T1 and marks of interval T2 given byT1=To/(1+kVp)T2=To/(1-kVp)where Vp is the mean value of the control signal during the relevant interval and To and k are constants chosen so that the output of the rectifier is substantially insensitive to harmonic frequencies of the reference signal.

Abstract: A semiconductor switch circuit comprises first, second and third transistors. The complementary first and second transistors make up an inverted Darlington circuit. The third transistor with the base and collector thereof connected to the collector and base of the inverted Darlington circuit respectively makes up a positive feedback circuit with the inverted Darlington circuit. The conduction current of the switch circuit is split into two conduction currents flowing through the complementary first and second transistors making up the inverted Darlington circuit. By controlling the base current of at least one of the first and second transistors, the switch circuit is subjected to on-off control, thereby making it possible to reduce the required control power and increase the off-controllable load current.

Abstract: A resettable D type flip flop for integrated circuit counter circuits, which flip flop comprises master and slave flip flop stages. The slave flip flop stage includes NOR and an INVERTER circuit selectively coupled via a first transmission gate to form a latch or via a second transmission gate to accept new data. The master flip flop stage having an output terminal coupled to apply signal to the slave includes a NOR circuit having an input and its output terminals directly connected to the output and input terminals respectively of a second INVERTER circuit. The NOR is selectively energized to complete a latch circuit or inactivated to permit input data to be applied to an interconnection at its output terminal via a third inverter having an input connected to a DATA input terminal for receiving input signal and which third INVERTER is selectively energized to render it alternately active and inactive.

Abstract: A closed cycle, high repetition pulsed laser having a laser flow channel with an annular flow return surrounding the laser flow channel. Ultra high vacuum components and low out-gassing materials are used in the device. An externally driven axial flow fan is used for gas recirculation. A thyratron-switched low-inductance energy storage capacitor is used to provide a transverse discharge between profiled electrodes in the laser cavity.

Abstract: A ramp generator has a capacitor connected via a resistor to charge toward 2-volts on the clock lead. The other side of the capacitor is connected to a voltage divider between the control voltage input and ground, to give the initial value of the ramp, which determines the pulse width output. The ramp output is connected to the set input of a D type flip-flop, whose output is the desired pulse width. Another flip-flop is toggled by each clock pulse, to control the alternating selection of two output gates. Three diodes in series from the clock lead to the ramp conductor, across the capacitor, and then to ground are used to reset the ramp when each clock pulse goes to ground potential.

Abstract: An improved input system for isolating resolver or synchro outputs from inputs to demodulators or analog-to-digital converters uses current transformers rather than voltage transformers. The resistances of resistors connected in series with the primary windings of the isolation transformers are adjusted to standardize the input currents of the transformers.

Abstract: Two independent power supplies for an I.sup.2 L or ISL logic array can be timed to turn on at different times by a simple RC network connected externally of the logic array. The differential timing is utilized to condition or set a bistable device in a predetermined initial desired state, without requiring an additional device terminal pin for that purpose.

Abstract: Signal-processing circuitry including at least two pairs of bipolar transistors with the transistors of one pair being series-connected with the transistors of the second pair, and the second pair being cross-connected from collector-to-base. Other circuitry includes (1) an input arrangement for converting a single-ended input voltage to a complementary pair of currents, (2) a differential emitter-follower providing 2V.sub.BEs of level-shifting, (3) means for obtaining an output signal proportional to the square of an input signal, and (4) a simple active rectifier.

Abstract: An impulse generator apparatus for a high resolution Chirp radar utilizing a fast settling time VHF oscillator in combination with a digital counter and a low phase distortion output filter to provide a sharp gated sinusoid impulse waveform to excite the receiver dispersive delay line.