Abstract: A driving method for an optical modulation device comprising matrix picture elements each formed at intersecting points of scanning lines and data lines between which a bistable optical modulation material represented by a ferroelectric liquid crsytal is interposed. The driving method comprises an erasure step of applying a voltage signal orienting the optical modulation material to the first stable state between the scanning and data lines, at all or a part of the matrix picture elements, and a writing step of sequentially applying a scanning selection signal to the scanning lines and applying an information orientation signal orienting the optical modulation material to the second stable state to the data lines in phase with the scanning selection signal.

Abstract: A TTL compatible CMOS high-speed lower-power supply-independent input buffer has a first current mirror which supplies current to a reference node of the input buffer when the signal at the input node of the buffer goes to a high state. An MOS transistor has its gate connected to the input node and switches hard on when the input node goes to a high level, pulling the reference node to a low level. A second current mirror is provided which injects current into the reference node for a predetermined period of time after the voltage level at the input of the buffer goes to a low level to pull the reference node to a high level. Both the first and second current mirror are switched on only during transition states of the input buffer, to minimize power dissipation when the input buffer is in its quiescent state.

Abstract: A liquid crystal display and a method for manufacturing the same wherein the light transmissivity of selected regions of the indium tin oxide film forming the common electrode on a first substrate is decreased and the regions are made substantially non-reflecting by reducing the oxygen content of the film. The shading material thus produced does not reflect light to the thin film transistors which control the picture elements on a second, facing substrate and therefore does not affect their operation. Reduction is accomplished by providing a protective mask for areas that are not to be reduced, immersing the substrate containing the thin film with the protective mask applied thereto in an electrolyte, and applying a voltage sufficient to reduce the indium tin oxide in regions unprotected by the mask. The mask, which may be a photoresist, is then removed and the substrate may be incorporated into the display.

Abstract: An optical low-pass filter comprising a liquid crystal device or electrooptic device having a birefringent phenomenon and formed so as to be able to vary the birefringent amount of the incident light. This low-pass filter is favorably used to remove the Moire without so much reducing the resolving power in a television camera, electronic camera or fiberscope provided with a solid-state image sensor.

Abstract: A logic circuit has a plurality of serially connected logic units wherein each unit is a gate comprising a resistor serially connected to a combination of a plurality of transistors connected together in parallel. The transistors of the logic circuit are arranged to enable reduction of the requisite voltage to be provided by an external power source. By reduction of the voltage, the values of resistance can be reduced without exceeding a power dissipation budget. Alternate logic units, in a series of logic units, are constructed of PNP and NPN transistors. Furthermore, the voltage drop across a transistor of a preceding logic unit, as measured between the emitter and collector terminals of a transistor, is applied, essentially, across the base-emitter junction of a transistor in a succeeding logic unit so as to provide a supply of base current to the transistor of the succeeding logic unit without danger of saturating the transistor and without cutting off current flow to the transistor.

Abstract: A horizontal transfer shift register is formed on a semiconductor substrate for use in a solid state image sensor of the charge transfer device type. The horizontal transfer shift register is coupled to receive electric charge signals in parallel and operates to serially transfer the received electric charge signals to an signal output circuit. The horizontal transfer shift register comprises a plurality of horizontal transfer electrodes formed on the substrate, a control electrode formed on the substrate adjacent to a horizontal transfer electrode adjacent to the signal output circuit, and a drain diffusion region formed in the substrate adjacent to the control electrode.

Abstract: A semiconductor logic circuit for realizing bit expansion comprises a series of CMOS transfer gates that transfer, for example, a fourth bit of input data to all bit positions upper than the fourth bit. The transfer of the fourth bit is done through clocked inverters. Each of the clocked inverters gives the fourth bit to, for instance, four of the upper bit positions in parallel.

Abstract: A liquid crystal apparatus includes a plurality of volumes of liquid crystal material in a containment medium such as a polymer. Some or all of the volumes of liquid crystal material can be interconnected. The walls defining the volumes tend to distort the natural liquid crystal structure in the absence of an electric field, and the optical and electrical properties of the material are such that in the absence of a field incident light is scattered or absorbed and in the presence of a field scattering and/or absorption are reduced. Pleochroic dye in the liquid crystal material increases absorption of incident light. The liquid crystal material may include an additive which tends to align the liquid crystal material in a direction generally normal to the walls. The apparatus may be used in an optical display, optical shutter, billboard, etc., and it functions independently of polarization.

Abstract: The present invention provides a CMOS output buffer with ECL output characteristics that allows the outputs to be terminated in any manner desired and which is not limited by the op amp settling time. The buffer establishes a bus internally for the VOH and VOL levels and then switches between the buses using transmission gates. In the disclosed embodiment of the invention, the op amp's feedback path includes a P-channel device which is either identical to or, to conserve power, a carefully scaled down equivalent of the P-channel output device.

Abstract: A linear feedback shift register comprises a shift register formed of first to (n)th flipflops cascaded in such a manner that an output of a (i)th flipflop is connected to an input of a (i+1)th flipflop, where 2.ltoreq.n and 1.ltoreq.i.ltoreq.(n-1). First to (n)th output terminals are connected to outputs of the first to (n)th flipflops, respectively, and a clock terminal connected to a clock input of each of the flipflops. First to (n-1)th multiplexors of a "1-out-of-2" type are connected at their first input to a common preset value input terminal. Second inputs of the first to (n-1)th multiplexors are connected to the outputs of the first to (n-1)th flipflops, respectively. Each of the first to (n-1)th multiplexors has a control input connected to an individual control terminal.

Abstract: The present invention provides a color display system characterized in that polarized surface control means comprises a ferro-electric liquid crystal cell, and a spacer and adhesive layer is interposed between a first panel and a second panel, the spacer and adhesive layer substantially setting a gap d between the first and second panels holding the ferroelectric liquid crystal therebetween to electrically drive the same to: ##EQU1## wherein: .lambda.: specific wavelength.DELTA.n: refractive index anisotropyd: gap (thickness of a liquid crystal layer).

Abstract: A can counting machine having an inclined housing into which a collection of beverage cans may be dumped. A rotor in the housing defines elongate openings spaced about its periphery for the singular reception and transport of cans upwardly to a discharge outlet in a backing plate rearward of the rotor. The rotor includes a rim projecting from the rotor for rotation therewith to facilitate lateral can movement into a disk opening. Ejector plates on the backing plate dislodge improperly, endwise inserted cans from the opening to prevent the simultaneous discharge of two cans past a can counting component. A motor circuit is responsive to motor loads resulting from a jammed can to automatically reverse motor and rotor direction. A receptacle support assembly receives a plastic bag and includes a frame member spring biased to maintain the bag in open configuration. A liquid barrier directs residual liquid from the cans to a receptacle. A display unit on the housing indicates a can total.

Abstract: An output buffer circuit advantageously uses a simple integrated circuit package including two separate ground leads for connection to an externally supplied ground voltage. The relatively large pull down current which passes through the pull down transistor of one or more output buffers are fed through a first ground lead of the lead frame to the external ground and the remaining circuitry is connected to the external ground through the second ground lead of the lead frame. The transients in the pull down current will cause ground bounce which affects the pull down transistor only, and not the remaining components of the output buffer. In this manner, base drive to the output pull down transistor is not decreased due to ground bounce, and the high to low transition of the output voltage is not degraded by the presence of ground bounce. In an alternative embodiment, the amount of ground bounce is controlled to provide a desired characteristic of the output transition.

Abstract: A circuit incorporating a clocked first stage and unlocked second and third stages with amplification for driving capacitance loads with the output nodes each coupling its changed state back to the earlier stages to reset them independent of the clock. The circuit may use complementary metal-oxide semiconductor devices of various gate widths.

Abstract: A CMOS switch driver capable of driving a plurality of CMOS switches is disclosed. A pair of cascade coupled output inverters provide the complementary driver outputs. Their inputs are obtained respectively from the first of the pair and a third, or input, inverter. The circuit includes resistance elements in the output inverters that greatly reduce current spikes.

Abstract: A drive circuit for a voltage-controlled type semiconductor device is provided which comprises ON gate drive circuit for supplying an ON control signal to a control electrode of the semiconductor device which performs a current switching, OFF gate drive circuit for supplying an OFF control signal to the control electrode of the semiconductor device, high voltage power source, connected to at least one of the ON gate drive circuit and OFF gate drive circuit, for supplying a control current of a predetermined current increase rate to the control electrode of the semiconductor device through at least one of the ON gate drive circuit and OFF gate drive circuit, low voltage power source, provided in juxtaposition with the high voltage power source, for supplying, to the control electrode, enough control current to hold the semiconductor device in a normal state, and switch for supplying an output of the high voltage power source to the control electrode in an earlier portion of a turn ON or a turn OFF period, and

Abstract: The invention relates to a liquid crystal display device wherein phase difference plates equal in retardation value, being composed of uniaxial polymer film or the like, are disposed symmetrically at the front side and back side of an STN liquid crystal panel, and the wavelength dispersion is made nearly ideal. As a result, the phase difference is compensated over the entire wavelength region, and the azimuth angles of the exit ellipsoidal polarization are aligned. Thus, a colorless display and a high contrast may be realized at the same time.

Abstract: A liquid crystal display device is described which contains picture element electrodes arranged on an insulating substrate and thin film transistors for switching the voltage to be applied to the picture element electrodes. The device is characterized in that additional capacity electrodes are formed from the same material as electrodes of the thin film transistors, between the insulating substrate and the picture element electrodes.

Abstract: A circuit formed with an input stage (20) and an output stage (22 or 28) uses capacitively enhanced switching to improve switching speed without significantly raising steady-state current utilization. The output stage contains a pair of amplifiers (A1and A2) that respond to complementary signals (V.sub.M1 and V.sub.M2) produced by the input stage. The amplifiers are coupled to a pair of corresponding nodes (N1 and N2). A third amplifier (A3) in the output stage has a control electrode coupled to one of the nodes, a flow electrode coupled to the other node, and another flow electrode coupled to a further node (N3). A current supply (24) provides current at the further node. A charge/discharge element (CD1) produces a capacitive-type charge/discharge action between the further node and a source of a reference voltage (V.sub.R1).

Abstract: A transmission line is connected in series to the emitter of an output transistor of an ECL circuit which outputs a logical signal, and a pair of series-connected switching diodes is connected to the output end of the transmission line. A parallel switching diode is provided which has its anode connected to the common connection point of the pair of series-connected switching diodes and has its cathode connected to a common potential point. A current pull-in circuit responsive to a control signal and a bias supply circuit are connected to the common connection point. The current pull-in circuit is turned ON to pull in current from the pair of series-connected switching diodes, thereby turning them ON. At this time, the parallel switching diode is turned OFF and the logical signal from the ECL circuit passes through the pair of series-connected switching diodes and is then output.