Abstract: A method and an apparatus relating to a fine frequency synchronization compensating for a carrier frequency deviation from an oscillator frequency in a multi-carrier demodulation system of the type capable of carrying out a differential phase decoding of multi-carrier modulated signals, the signals comprising a plurality of symbols, each symbol being defined by phase differences between simultaneous carriers having different frequencies. A phase difference between phases of the same carrier in different symbols is determined. Thereafter, a frequency offset is determined by eliminating phase shift uncertainties related to the transmitted information from the phase difference making use of a M-PSK decision device. Finally, a feedback correction of the carrier frequency deviation is performed based on the determined frequency offset. Alternatively, an averaged frequency offset can be determined by averaging determined frequency offsets of a plurality of carriers.

Abstract: Logic gates are provided that include a diode-connected metal-oxide-semiconductor field-effect transistor (MOSFET) to produce a gate threshold voltage that differs from a mid-supply voltage level, while providing symmetry in the switching transients of the output logic signals. In one embodiment, the logic gate is a NAND gate. Use of a diode-connected n-type MOSFET in a ground path produces a threshold voltage level higher than the mid-supply voltage level. Use of a diode-connected p-type MOSFET in a supply voltage path produces a threshold voltage level lower than the mid-supply voltage level. In another embodiment, the logic gate is a NOR gate. Use of a diode-connected n-type MOSFET in a ground path produces a threshold voltage level higher than the mid-supply voltage level. Use of a diode-connected p-type MOSFET in a supply voltage path produces a threshold voltage level lower than the mid-supply voltage level.

Abstract: To generate a high-power modulated radio frequency signal SOUT from an input low or medium frequency information signal SIN, the information signal is pulse-shaped in a quantifier to form a digital signal SD having discrete signal values. The digital signal is processed in a switching unit comprising switches for each signal value, in radio frequency wave generators for each switch generating carrier waves of radio frequency, and in control circuits for each switch to control the opening and closing thereof. When a switch is closed, its associated generator is connected to the output line of the switching unit, and when it is opened, the generator is disconnected therefrom. In the switching unit, a switched radio frequency signal SSW carrying the information of the input signal is formed by opening and closing the switches when the digital signal adopts or does not adopt, respectively, the signal value associated with the respective switch.

Abstract: A method for interference mitigation in a wireless communication system having multiple transmitters and receivers by introducing transmission time delays between the transmission of signals from the individual transmitters to ensure coherent reception of the signals at a specific point in the coverage area, such as at a center of distribution of the receivers. To further aid in interference mitigation the signals are assigned training patterns chosen to be distinguishable by the receiver and to optimize interference mitigation. The training patterns can be selected based on a feedback parameter, e.g., a measure of the quality of interference mitigation obtained from the receiver. The present method can be used in wireless communication systems which re-use frequencies including TDMA, CDMA, FDMA, OFDMA or other multiplex communication systems using a multiple access method or a combination of such methods.

Abstract: A method for selecting a modulation detector in a receiver and a receiver which includes a first and a second modulation detector, mechanisms for determining at least one cross-correlation value between the stored training sequence and at least one training sequence of the received signal, and mechanisms for selecting the detector used for the detection of a signal to be received in response to the determined at least one cross-correlation value.

Abstract: A high speed signal transmission system employs differential receivers for receiving data signals transmitted over circuit transmission lines. One input each receiver is coupled to the output of a transmission line and to a termination network. The termination network generates a termination voltage and a source impedance that is matched to the characteristic impedance of the transmission line. The other input of the receiver is coupled to a reference voltage. The termination voltage may be adjusted by programming signals while keeping the source impedance constant and matched to the transmission line. A test mode may be employed where known data signals are transmitted and received and the termination voltage is adjusted while monitoring the states of the received signals on the output of the receivers. In this manner, the system may be optimized or tested for noise margin in an actual operation environment without resorting to probing methods.

Abstract: According to the present invention, a three-line bus is used for communication between a first digital unit (1) and two other digital units (3). The three-line bus includes a system clock line (SCL) as well as a data transmission line (SD) through which data is sent from the two other units (3), i.e. transmitting units, to the first unit (1), i.e. receiving unit. The system uses an authorization line (WS) for determining which of the two transmitting units (3) is capable of writing data on the data transmission line (SD) and when it can do so. The communication from the first unit (1), now operating as a transmitter, to the two other units (3), now operating as receivers, is made possible by the fact that data signals are also injected in the authorization line (WS) and transmitted through the line together with the authorization control signals.

Abstract: The present invention provides a method of characterizing a frequency response of a transmission channel between a transceiver and a subscriber unit. The method includes once per predetermined interval of time, the transceiver transmitting a signal including multiple carriers, a plurality of the carriers including training symbols, a plurality of the carriers including information symbols. The subscriber unit generates frequency response estimates at the frequencies of the carriers including training symbols, each interval of time. The frequency response estimates are converted into a time domain response generating an impulse response once per interval of time. The impulse responses are filtered over a plurality of intervals of time. A channel profile is determined from the filtered impulse responses. The channel profile is converted to the frequency domain generating a channel interpolator. The characterized frequency response is generated from the channel interpolator and the frequency response estimates.

Abstract: A transmitter chain has a quadrature modulator, a variable gain amplifier, an up-converter, and a variable gain power amplifier. An overall phase of the transmitter chain is adjusted on the basis of pre-stored phase information reflecting phase changes due to simultaneous gain changes of gains of at least the variable gain amplifier and the variable gain power amplifier.

Abstract: A high-speed serial data transceiver includes multiple receivers and transmitters for receiving and transmitting multiple analog, serial data signals at multi-gigabit-per-second data rates. Each receiver includes a timing recovery system for tracking a phase and a frequency of the serial data signal associated with the receiver. The timing recovery system includes a phase interpolator responsive to phase control signals and a set of reference signals having different predetermined phases. The phase interpolator derives a sampling signal, having an interpolated phase, to sample the serial data signal. The timing recovery system in each receiver independently phase-aligns and frequency synchronizes the sampling signal to the serial data signal associated with the receiver. A receiver can include multiple paths for sampling a received, serial data signal in accordance with multiple time-staggered sampling signals, each having an interpolated phase.

Abstract: A high speed Bluetooth system with switch-to quadrature amplitude modulation allows for simple mobile devices with video data rates in applications such as Internet downloading. Mobile devices may have multiple antennas and adaptive hopping frequencies.

Abstract: A reverse data rate controlling method in a mobile communication system for transmission of packet data is provided. In an embodiment of the present invention, an RRL (Reverse Rate Limit) message includes an ignore RAB (Reverse Activity Bit) field to ensure a predetermined data rate for a particular access terminal (AT). In another embodiment of the present invention, an access probability is set for each data rate in the RRL message. Upon receipt of an RAB, an AT compares a random number with the access probability for its data rate and increases or decreases the data rate according to the comparison result.

Abstract: A phase lock circuit has a signal path to which a phase comparator, a loop filter and a voltage control oscillator are connected in series, the phase comparator being adapted to compare the phase of an input signal VIN with the phase in the output signal of the voltage control oscillator and to output its result of comparison, the loop filter being adapted to receive the output signal of the phase comparator and to output a DC voltage; the voltage control oscillator being adapted to control the output oscillation frequency depending on the DC output voltage of the loop filter, the phase lock circuit further comprising voltage tracking means for adding, to the voltage of the signal path, a signal causing the average voltage in the output voltage of the phase comparator to coincide with a predetermined reference voltage, whereby the voltage tracking means can enlarge the lock range in the phase lock circuit.

Abstract: A truly random sequence of bits is transmitted from a transmitter, such that a receiver can receive and store a portion of the transmission for the duration of time that the receiver is within range of the transmitter. Thereafter, the stored sequence in the receiver is compared to a stored copy of the continuous transmission to determine the time that the stored sequence was transmitted. If the sequence of bits is truly random, the security of the system is assured.

Abstract: A vestigial sideband (VSB) modulation minimum output energy (MOE) pre-equalizer operating on a received ATSC 8-VSB DTV signal includes one or more of an adaptive feed-forward filter and an adaptive feedback filter each utilizing only real adaptive coefficients, with the direct term for the overall filter constrained to unity to remove one degree of filter parameterization freedom. Adaptation of the filter(s) is based on minimizing a blind energy cost function, and is independent of adaptation of a conventional adaptive channel equalizer. The pre-equalized signal is passed to the conventional adaptive equalizer for channel equalization utilizing DFE, IIR-CMA, etc., resulting in performance improvements including faster convergence and greater robustness with relatively small implementation costs.

Abstract: In a parallel signal transmission device for converting serial signals into parallel signals at a transmitting unit to be transmitted to a receiving unit, the transmitting unit generates serial code signals from periodically latched parallel signals besides transmitted parallel signals, and adjusts phases of the parallel signals to the serial code signals by delaying the parallel signals by a predetermined delay time; and the receiving unit changes over bits of the parallel signals from the transmitting unit based on recovered clocks, detects bit shift amounts of the parallel signals after bit changeover, and performs skew adjustments of the parallel signals depending on the bit shift amounts.

Abstract: A wireless endpoint employs frequency hopping for communicating signals in a wireless communications system. Over a time period T, the wireless endpoint performs pseudo-random selection of a frequency from a hopping set of N frequencies such that over at least a portion of the time period T, the frequency selection is constrained to less than the N frequencies.

Abstract: A CDMA mobile telephone allowing the drive mode to be automatically set and canceled without increasing the amount of hardware is disclosed. A frequency offset for each of N fingers is detected from despread data which are obtained by despreading received spectrum-spread data of M branches. Based on the detected N frequency offsets, it is determined whether the mobile telephone is moving at speeds higher than a predetermined speed. An operation mode of the mobile telephone switches between a drive mode and a normal mode depending on whether the mobile telephone is moving at speeds higher than the predetermined speed.

Abstract: A method and system for determining the average long-term is described, in which a short-term power of a segment of the input signal is determined and a data sequence is produced that is contained in the segment and with which the input signal is modulated. A reference signal is produced by modulation with the data sequence at a predetermined reference control factor of a modulator, in which a long-term power of the reference signal corresponds to the reference control factor, and a short-term power of the reference signal within the segment is determined. A correction value is determined by comparing the short-term power of the reference signal with the long-term power of the reference signal corresponding to the reference control factor; and the short-term power of the segment of the input signal is corrected based on the correction value in order to obtain the long-term power of the input signal.

Abstract: A facility transport system for transporting high speed Ethernet data over digital subscriber lines. The system, referred to as 100BaseS, is capable of transmitting 100 Mbps Ethernet over existing copper infrastructure up to distances of approximately 400 meters. The system achieves bit rates from 25 to 100 Mbps in increments of 25 Mbps with each 25 Mbps increment utilizing a separate copper wire pair. Each pair used provides a bidirectional 25 Mbps link with four copper wire pair connections providing 4×25 Mbps downstream channels and 4×25 Mbps upstream channels. The system utilizes framing circuitry to adapt the 100BaseT input data signal to up to four separate output signals. A DSL Ethernet Port card couples the modem to each twisted pair used. Each DSL Ethernet Port card comprises modem transmitter and receiver circuitry for sending and receiving 100BaseS signals onto twisted pair wires.