Patents Examined by Stephen Chin
  • Patent number: 7054347
    Abstract: Signals sent from a sender by a code division multiple access communication system are input respectively into first to Mth delay units which are disposed parallel to one another. The correlation is examined in each correlator, and the results of a predetermined number of times of correlation are averaged in each averaging section. Based on this, path detection is carried out in each path detector. The results of path detection are input into a correlator control unit which performs control in such a manner that the number of times of averaging in an averaging section is smaller for a higher correlation value.
    Type: Grant
    Filed: July 9, 2001
    Date of Patent: May 30, 2006
    Assignee: NEC Corporation
    Inventor: Toshihiro Hayata
  • Patent number: 7050482
    Abstract: In order to perform synchronization detection with high speed, high precision and high reliability and to measure communication quality (propagation characteristics) at high precision and high efficiency, a mobile station includes synchronization detecting portion for detecting synchronization chip timing of channel to be measured, a synchronization chip timing information portion accumulating information of detected synchronization chip timing, a correlation detecting portion deriving a correlation value between spreading code of the channel to be measured and a received signal for performing communication with a base station and measurement of communication quality with taking the detected synchronization chip timing as a reception chip timing, a time series generating portion for generating a time series data of received signal vector after correlation detection, and a communication quality calculating portion for calculating communication quality from generated time series data.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: May 23, 2006
    Assignee: NTT DoCoMo, Inc.
    Inventors: Tetsuro Imai, Shinichi Mori
  • Patent number: 7050486
    Abstract: A path searcher of a spread spectrum receiver includes a number of correlators each of which produces a replica of a scrambled synchronization code and determines a correlation between the replica and a received spread spectrum signal. Each of the correlators performs a correlation operation between the received spread spectrum signal and the replica at a rate higher than a chip rate of the spread spectrum signal by successively shifting the replica with respect to the spread spectrum signal.
    Type: Grant
    Filed: November 26, 2001
    Date of Patent: May 23, 2006
    Assignee: NEC Corporation
    Inventor: Takahiro Yasaki
  • Patent number: 7050520
    Abstract: If a phase difference between a synchronizing source signal F1 and a comparison signal F2 is higher than a first lower limit a or lower than a first upper limit b, a comparator 3 selects this phase difference, if the phase difference is not higher than the lower limit a, selects the lower limit a, and if the phase difference is not lower than the upper limit b, selects the upper limit b, and a divider 7A outputs a comparison signal F2 obtained by dividing a frequency of an output signal F0, to change a phase of the signal F2 so that if the phase difference is not higher than a second lower limit e lower than the lower limit a, the phase difference may become the lower limit a and, if the phase difference is higher than a second upper limit f higher than the upper limit b, the phase difference may become the upper limit b.
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: May 23, 2006
    Assignee: NEC Corporation
    Inventors: Hideyuki Asakawa, Yoshimasa Endou
  • Patent number: 7050514
    Abstract: A system, wireless device (402) and method receive a set of soft metrics (614) associated with a block of symbols during a predetermined time interval, use the set of soft metrics (614) to form an initial interference power estimate, form a moving-average estimate of interference power (616) corresponding to each predetermined time interval, and scale the set of soft metrics (614) according to the corresponding interference power estimate resulting in a set of scaled metrics (618). Then they limit the dynamic range of the set of scaled metrics (618), linearly quantize the limited metrics, and output the linearly quantized limited metrics (628) to a memory buffer. The size of the memory buffer containing the linearly quantized limited metrics (628) is smaller than the size of a memory buffer required to store the received soft metrics (614). The linearly quantized limited metrics (628) are then used as input to a decoder.
    Type: Grant
    Filed: August 13, 2003
    Date of Patent: May 23, 2006
    Assignee: Motorola, Inc.
    Inventors: Bradley J. Rainbolt, Stephen R. Carsello
  • Patent number: 7050519
    Abstract: A device for detecting a timing synchronization, a method, and a communication device. The device includes a unit for outputting a timing synchronization discriminating signal, which corresponds to a difference between samples that are ahead and behind of the input signal by a semi-symbol period; a unit for semi-symbol delaying a real number element and an imaginary number element of the input signal, and subtracting the delayed signals from the real number element and the imaginary number element of the input signal; a first detector for detecting a power from the semi-symbol delayed signals of the input signal; a power detector for detecting a power from the real number element and the imaginary number element from the timing error detecting unit; and a subtracter for subtracting a value, which is obtained by multiplying the power detected by the second detector by a predetermined coefficient, from the power detected by the first detector.
    Type: Grant
    Filed: January 14, 2002
    Date of Patent: May 23, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Suk-jin Jung
  • Patent number: 7050522
    Abstract: A phase rotator device for phase shifting an oscillating signal, including an input device having at least one input channel for receiving at least one phase of the oscillating signal and an output device having at least one output channel for delivering at least one phase of the oscillating signal with a controlled phase shift. For each output channel, the phase rotator includes a weighting device for weighting the value of the oscillating signal at each input channel by a respective weighting coefficient, and a summing device for summing the weighted signal values at each input channel and delivering the summed value as a shifted output phase at the output channel. Additionally, the phase rotator device includes a weighting coefficient supply device responsive to a phase shift control signal for controllably supplying evolving weighting coefficients to the weighting device, thereby to create a phase shift at the output channel.
    Type: Grant
    Filed: May 22, 2001
    Date of Patent: May 23, 2006
    Assignee: International Business Machines Corporation
    Inventor: Martin Schmatz
  • Patent number: 7046720
    Abstract: A system and method for DC offset compensation wherein a received first signal is despread using a first spreading code to generate a second signal. The second signal along with a first set of pilot symbols is used to estimate a radio channel. The first signal is also despread using a second spreading code to generate a third signal. A DC offset is estimated from the third signal, the estimated radio channel and a second set of pilot symbols. The estimated DC offset may then be subtracted from the second signal.
    Type: Grant
    Filed: November 12, 2001
    Date of Patent: May 16, 2006
    Assignee: Telefonktiebolaget LM Ericsson (publ)
    Inventors: Bengt Lindoff, Peter Malm
  • Patent number: 7046738
    Abstract: A method for generating a premodulation-filtered modulation waveform having a real part and an imaginary part for transmitting octal symbols uses a reduced lookup table. Successive octal symbols, each comprising three information bits, are input to a logic unit. The logic unit forms a first derived bit by combining the first and third information bits and a second derived bit by combining the second and third information bits. The first and second information bits, along with the first and second derived bits, are delayed in respective L-bit shift registers. The bit sequences in the L-bit shift registers are used to determine a corresponding filtered waveform segment for each bit sequence. The waveform segments corresponding to the delayed first information bits and the delayed first derived bits are combined to obtain a segment of said imaginary waveform part.
    Type: Grant
    Filed: February 8, 2000
    Date of Patent: May 16, 2006
    Assignee: Ericsson Inc.
    Inventor: Paul W. Dent
  • Patent number: 7046745
    Abstract: In a data demodulating method, predetermined input data is demodulated based upon a response characteristic of the partial response class 4; the demodulated input data is discrete-filtered to thereby produce filtering data; and the filtering data is maximum likelihood-decoded to thereby produce asymmetrical response data. Further, a magnetic recording/reproducing apparatus is arranged by using this data demodulating method.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: May 16, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Seiichi Mita, Hideki Sawaguchi, Naoya Kobayashi, Masaharu Kondo
  • Patent number: 7046743
    Abstract: A differential detector produces, for each symbol, a phase difference between received phase information and one-symbol-delayed phase information, and delivers the phase difference to a differential circuit and a phase corrector. Another differential detector produces, for each symbol, a phase difference between the one-symbol-delayed phase information and two-symbol-delayed phase information of the received phase information. The differential circuit produces, for each symbol, phase-difference difference information from a difference between both the phase differences. A phase error detector obtains a phase error caused by a difference in the carrier frequency between a sending and a receiving digital radio apparatus, based on the phase-difference difference information and either of both phase differences. A phase corrector subtracts the phase error from the phase difference.
    Type: Grant
    Filed: September 13, 2001
    Date of Patent: May 16, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Hiroji Akahori
  • Patent number: 7046739
    Abstract: A plurality of input signals are pre-distorted for combination into a first combined signal having a constant envelop. The input signals are combined into a second combined signal, and a similarity between each of the input signals and the second combined signal is measured. Ones of the input signals are selected and attenuated based on the similarity measurement. The attenuated input signals and non-attenuated signals are output for combination to form the first combined signal.
    Type: Grant
    Filed: May 18, 2001
    Date of Patent: May 16, 2006
    Assignee: Southwest Research Institute
    Inventor: Michael E. Pilcher
  • Patent number: 7046726
    Abstract: A method and apparatus for a decision feedback equalizer wherein a correction term is used to compensate for slicer errors, thus avoiding error propagation. Filter coefficients for the equalizer are selected so as to minimize a cost function for the equalizer. The cost function calculation includes a correction term. The correction term is a function of the energy of the filter coefficients. In one embodiment, the cost function includes a Mean Squared Error (MSE) calculation. The equalizer includes a coefficient generator responsive to the correction term. The correction term may depend on the Signal-to-Interference-and-Noise Ratio (SINR) at the output of the equalizer.
    Type: Grant
    Filed: July 18, 2002
    Date of Patent: May 16, 2006
    Assignee: Qualcomm, Inc.
    Inventors: Srikant Jayaraman, Ivan Jesus Fernandez Corbaton, John E. Smee
  • Patent number: 7046749
    Abstract: An Automatic Gain Control (AGC) circuit as used in a digital receiver that utilizes a main loop filter that is of a relatively wide bandwidth. A pre-filter, wideband variance is determined from the input digital signal, and a post-filter, narrowband variance is also determined. The wideband and narrowband variances are then compared to determine if the wideband signal power indicates a variance level that is too great to permit normal loop operation. By reapplying this difference in the power levels to the filter output as needed, such as by a scaling operation, the loss in dynamic range is effectively recovered. In a preferred embodiment, an adjustable gain input amplifier feeds an intermediate frequency (IF) signal to an analog-to-digital converter (ADC). The digitized IF signal is then down-converted to a baseband frequency and subjected to digital filtering. A narrowband sample variance (PN) of the digitally filtered (narrowband) data is then determined.
    Type: Grant
    Filed: May 1, 2001
    Date of Patent: May 16, 2006
    Assignee: IPR Licensing, Inc.
    Inventors: Mark J. Takatz, Alton S. Keel, Jr., Stefan Haenggi
  • Patent number: 7042967
    Abstract: The present invention has many aspects. One aspect of the invention is to perform equalization using a sliding window approach. A second aspect reuses information derived for each window for use by a subsequent window. A third aspect utilizes a discrete Fourier transform based approach for the equalization. A fourth aspect relates to handling oversampling of the received signals and channel responses. A fifth aspect relates to handling multiple reception antennas. A sixth embodiment relates to handling both oversampling and multiple reception antennas.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: May 9, 2006
    Assignee: InterDigital Technology Corporation
    Inventors: Alexander Reznik, Rui Yang, Bin Li, Ariela Zeira
  • Patent number: 7042969
    Abstract: A method and apparatus for determining frame alignment in a discrete multitone transceiver by determining a rotation of the coefficients of the shortening channel impulse response for which inter symbol interference (ISI) is minimal. The ISI is determined by multiplying the average value of a transmitted discrete multitone symbol and multiplying it by the coefficients of the shortening channel impulse response in a given rotation.
    Type: Grant
    Filed: January 15, 2002
    Date of Patent: May 9, 2006
    Assignee: Agere Systems Inc.
    Inventor: Yhean-Sen Lai
  • Patent number: 7042935
    Abstract: An equalizer and an equalization method capable of suppressing distortion specific to radio unit and reducing both the oversampling number and the amount of calculations without causing characteristic deterioration.
    Type: Grant
    Filed: December 11, 2001
    Date of Patent: May 9, 2006
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventors: Nobuaki Kawahara, Masashi Naito
  • Patent number: 7042930
    Abstract: A multiple integration hypothesis C/A code acquisition system resolves bit boundaries using parallel correlators providing magnitude hypotheses during acquisition to reduce losses over the 20 ms integration period to improve the performance and sensitivity of C/A code receivers to achieve low C/No performance using inexpensive, imprecise oscillators and long noncoherent dwell periods, well suited for in-building, multipath, and foliage attenuated GPS signaling applicable to E911 communications with several dB of additional improvement in receiver sensitivity due to the ability to detect bit synchronization during acquisition.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: May 9, 2006
    Assignee: The Aerospace Corporation
    Inventor: Philip A. Dafesh
  • Patent number: 7042937
    Abstract: A channel decoder employs a hybrid frequency-time domain equalizer for effectively combining a frequency domain equalizer with a time domain equalizer to achieve superior static and dynamic multi-path performance compared to conventional decision feedback equalizers. A frequency domain equalizer structure is included within the forward path of a time domain, decision feedback equalizer, with both the frequency domain and time domain portions employing a common error vector. Updates to the taps (frequency bins) may be adapted individually, or fully within the frequency domain without altering the feedback filter. Improved performance, including performance for noisy channels with deep notches, is achieved, and the frequency domain equalizer portion is relieved from equalizing minimum phase zeros of the channel.
    Type: Grant
    Filed: April 23, 2001
    Date of Patent: May 9, 2006
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Dagnachew Birru
  • Patent number: 7042960
    Abstract: Various mixer topologies, configured to cancel various low order spurs. The mixer topologies each include a pair of mixers and a plurality of couplers. The couplers are configured to cancel specific spurs. As such, the mixer topology eliminates the need for band splitting thus allowing larger input frequency ranges and allows for simpler and less expensive filtering.
    Type: Grant
    Filed: August 28, 2001
    Date of Patent: May 9, 2006
    Assignee: Northrop Grumman Corporation
    Inventor: Mark Kintis