Patents Examined by T. V. Nguyen
  • Patent number: 5822787
    Abstract: An application binary interface includes linkage structures for interfacing a binary application program to a digital computer. A function in a relocatable shared object module obtains the absolute address of a Global Offset Table (GOT) in the module using relative branch and link instructions through the computer's link register. The GOT contains addresses of global data such as constants and variables that are identified by symbols and are located outside the module. Implementation requires only three simple instructions, one in the GOT and two in the calling function. The module can load the absolute address of a data item into appropriate registers and read or write the data from memory using a conventional RISC relative address read or write instruction.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: October 13, 1998
    Assignee: Sun Microsystems, Inc.
    Inventor: J. Steven Zucker
  • Patent number: 5787493
    Abstract: With the present invention, the page table of the program code non-continuously placed in an external storage device using randomly accessible and rewritable memory is built into an executable sequence in a virtual address space of the CPU according to the execution order. By referring to the address translation tables, including the page table, the system is able to read the program from the external storage device, thereby executing the program. Therefore, the program can be executed without being loaded into main memory. Furthermore, the program and data can be managed without distinction.Further, with the randomly accessible memory according to the present invention, since a sequence of real addresses of the CPU are assigned to the data area, control over the direct execution of the program can be simply achieved. Furthermore, since data and ECC parity can also be read and written sequentially, the system has good compatibility with a hard disk system.
    Type: Grant
    Filed: April 8, 1997
    Date of Patent: July 28, 1998
    Assignee: International Business Machines Corporation
    Inventors: Hideto Niijima, Akashi Satoh
  • Patent number: 5778414
    Abstract: Disclosed is a frame processing engine for receiving and processing a data frame having a header and a payload, comprising a first memory for receiving at least a portion of the header of the data frame; a second memory for receiving the payload of the data frame; and a controller, upon receipt of the data frame, for storing the header (at least most of it) in the first memory and the remainder of the data frame (including the payload) in the second memory, with the first memory having a shorter access time than the second memory.
    Type: Grant
    Filed: June 13, 1996
    Date of Patent: July 7, 1998
    Assignee: Racal-Datacom, Inc.
    Inventors: Stephen J. Winter, Jack E. Stephenson