Abstract: Various embodiments provide methods and systems operable to receive a work queue pair from the host application, to add the work queue pair to a scheduler queue for a virtual HCA scheduler, to update a context associated with the work queue pair, to create at least one data packet corresponding to the work queue pair, and to send the at least one data packet to at least one of a plurality of target nodes via at least one of a plurality of data channel ports.
Abstract: The present invention relates to an application of the Universal Serial Bus (USB) technology, and more particularly, to a USB apparatus with data storage and security token and control method therein. In an embodiment of the present invention, both mass storage and security token are implemented in a USB apparatus with a single controller. Thus, the host needs to enumerate the apparatus only once, and then may operate differentially in response to different commands. The mass storage is capable of swapping a mass of data, and has a file allocation table compatible with the system. The security token can be used for authenticating a person through digital certificates or biometric characteristics, maintaining the security of the computer and network applications.
Abstract: This is directed to methods and systems for handling access requests from a device to a host. The device may be a device that is part of the host, such as an HBA, an NIC, etc. The device may include a processor which runs firmware and which may generate various host access requests. The host access requests may be, for example, memory access requests, or DMA requests. The device may include a module for executing the host access requests, such as a data transfer block (DXB). The DXB may process incoming host access requests and return notifications of completion to the processor. For various reasons, the processor may from time to time issue null or zero length requests. Embodiments of the present invention ensure that the notifications of completion for all requests, including the zero length requests, are sent to the processor in the same order as the requests.
Abstract: A method and mechanism for managing requests to a resource. A request queue receives requests from multiple requestors and maintains a status for each requestor indicating how many requests the requestor has permission to issue. Upon initialization, the request queue allots to each requestor a predetermined number of “hard” entries, and a predetermined number of “free” entries. Un-allotted entries are part of a free pool of entries. If a requestor has an available entry, the requestor may submit a request to the request queue. After receiving a request, the request queue may allot a free pool entry to the requestor if the free pool currently has entries available. Upon de-allocation of a queue entry, if the entry corresponds to a hard entry, then the hard entry is re-allotted to the same requestor. If the entry is a free entry, the entry is made available and a free pool counter is incremented.
Abstract: Systems, methods, apparatus and software can make use of standard input/output (I/O) interface commands to make information about virtual storage devices available to clients of those virtual storage devices. Where the storage virtualization is carried out using a switch, router, or other storage network appliance, the information about virtual devices is stored (and in many cases determined and/or processed) local to the device. Applications operating on the storage clients can conveniently access the information using I/O interface commands and need not have access to some or all of the software or functionality that virtualizes the storage.
Abstract: Embodiments of the invention include a method and apparatus for intelligent handheld device accessory support. A method of one embodiment includes sensing the presence of an accessory plug in a jack of the handheld device, determining a type of accessory device attached to the accessory plug, including receiving electrical signals from pins of the plug and based on the determination, configuring the handheld device, including assigning particular signals to pins of the plug.
Abstract: A scalable first-in-first-out queue implementation adjusts to load on a host system. The scalable FIFO queue implementation is lock-free and linearizable, and scales to large numbers of threads. The FIFO queue implementation includes a central queue and an elimination structure for eliminating enqueue-dequeue operation pairs. The elimination mechanism tracks enqueue operations and/or dequeue operations and eliminates without synchronizing on the FIFO queue implementation.
Abstract: The invention discloses an indexing device for a data storage system which comprises a plurality of data storage devices. The indexing device generates an I/O descriptor index number according to a target data storage device, where the I/O descriptor index number corresponds to a device ID number and a queued command tag number. After receiving from the target data storage device an information packet containing the queued command tag number and a second connection request data frame including the device ID number, the indexing device can calculate the I/O descriptor index number according to the device ID number and the queued command tag number.
Abstract: Roughly described, method for managing data transmission between a host subsystem and a network interface device, in which the host writes data buffer descriptors into a DMA descriptor queue, and the network interface device writes completion events to notify the host when it has completed processing of data buffers. Each of the completion event descriptors notify the host of completion of data transfer between the NIC and one or more of the data buffers, and can also embed a queue empty notification inside the completion event.
Type:
Grant
Filed:
February 3, 2005
Date of Patent:
November 9, 2010
Assignee:
Solarflare Communications, Inc.
Inventors:
Steve Pope, David Riddoch, Ching Yu, Derek Roberts
Abstract: In one embodiment, a portable mass storage device may include a bus hub having a first port to couple to a bus and other ports to connect to multiple multi-channel memory controllers, where each memory controller is coupled to multiple non-volatile storage arrays, and the memory controllers can independently service the arrays to enable overlapping data transfer operations. Other embodiments are described and claimed.
Abstract: A method and apparatus relating to the behavior of border nodes within a high performance serial bus system is disclosed. A method for determining and communicating the existence of a hybrid bus is disclosed. A method for determining a path to a senior border node is disclosed, as is a method for identifying a senior border node Various methods for properly issuing gap tokens within a beta cloud are disclosed.
Type:
Grant
Filed:
August 27, 2007
Date of Patent:
October 26, 2010
Assignee:
Apple Inc.
Inventors:
Jerrold Von Hauck, Colin Whitby-Strevens
Abstract: A mechanism is provided for transmitting data in a data network. A first processor of the data network receives data to be transmitted to a second processor within the data network. A determination is made if the data has previously been routed through an indirect communication link from a source processor, the indirect communication link being a communication link that does not directly couple the source processor to a final destination processor which is to receive the data. A communication link is selected over which to transmit the data from the first processor to the second processor based on results of determining if the data has previously been routed through an indirect communication link. Finally, the data is transmitted from the first processor to the second processor using the selected communication link.
Type:
Grant
Filed:
August 27, 2007
Date of Patent:
October 26, 2010
Assignee:
International Business Machines Corporation
Inventors:
Lakshminarayana B. Arimilli, Ravi K. Arimilli, Ramakrishnan Rajamony
Abstract: Certain exemplary embodiments comprise a programmable cable further comprising a first end connectable to a PLC and a second end connectable to a network communications device, the network communications device further couplable to a user interface device. The programmable cable can be adapted to store a plurality of configuration parameters in an operative embodiment, the programmable cable can be adapted to automatically configure the network communications device by communicating at least one of a plurality of configuration parameters to the network communications device comprising a pin number. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. This abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).
Type:
Grant
Filed:
July 18, 2003
Date of Patent:
October 26, 2010
Assignee:
Siemens Industry, Inc.
Inventors:
Steven Michael Hausman, Temple Luke Fulton
Abstract: There is provided a transfer apparatus having a bridge that transfers a transaction between a first and a second bus, and a data transfer unit that performs a data transfer by DMA between the first and second bus. The transfer apparatus controls a transfer sequence of transaction transfers by the bridge and data transfers by the data transfer unit, in which transaction transfers by the bridge are based on bus sequencing rules and data transfers by the data transfer unit are based on a data transfer activation condition.
Abstract: Methods, circuits, and an apparatus for filtering high-speed serial data is disclosed. In one embodiment, a Programmable Logic Device (PLD) is configured with a filter circuit for filtering serial data at a first clock rate. The filter circuit converts an N number of serial data streams into an N number of M-bit words based on a deserialization factor. The M-bit words are converted to an M number of N-bit data words. The N-Bit data words are filtered at a second clock rate, reformatted, serialized, and outputted as individual serial data streams at the first clock rate. In one embodiment, the N-bit data words are digitally filtered by a Finite Impulse Response (FIR) filter operating at the second clock rate. The data output of the FIR filter is then serialized into an N number of serial data output streams operating at the first clock rate.
Abstract: A system comprising a plurality of controller circuits, a plurality of line buffer circuits and an arbiter. The plurality of control circuits may each be configured to store data. The plurality of line buffer circuits may each be configured to transfer data between an accessed one of the controller circuits and one of a plurality of first busses. The arbiter circuit may be configured to control access to the controller circuits by the line buffer circuits.
Type:
Grant
Filed:
April 11, 2006
Date of Patent:
September 7, 2010
Assignee:
LSI Corporation
Inventors:
Gregory F. Hammitt, John M. Nystuen, Steven M. Emerson
Abstract: An information processing apparatus capable of communication with an external unit connected thereto. The apparatus has a connection unit to connect the external unit, a first control unit connectable to the external unit for controlling communication between the connected external unit and the information processing apparatus, a second control unit connectable to the external unit for controlling communication between the connected external unit and the information processing apparatus, and a switching unit to select the first control unit or the second control unit as a control unit connected to the external unit for communication between the connected external unit and the information processing apparatus.
Abstract: An apparatus and method for enabling a circuit board or data storage module located within a slot in an enclosure to determine the identification of the slot by detecting a characteristic feature of the slot. In this manner the circuit board or data storage module can be instructed to operate in accordance with the function of that slot. This is important when a plurality of slots having different functions contains identical circuit boards or modules.
Abstract: Producers and consumer processes may synchronize and transfer data using a shared data structure. After locating a potential transfer location that indicates an EMPTY status, a producer may store data to be transferred in the transfer location. A producer may use a compare-and-swap (CAS) operation to store the transfer data to the transfer location. A consumer may subsequently read the transfer data from the transfer location and store, such as by using a CAS operation, a DONE status indicator in the transfer location. The producer may notice the DONE indication and may then set the status location back to EMPTY to indicate that the location is available for future transfers, by the same or a different producer. The producer may also monitor the transfer location and time out if no consumer has picked up the transfer data.
Type:
Grant
Filed:
January 4, 2006
Date of Patent:
August 17, 2010
Assignee:
Oracle America, Inc.
Inventors:
Mark S. Moir, Daniel S. Nussbaum, Ori Shalev, Nir N. Shavit
Abstract: A data processing module includes: a data converter having a TranslateData interface for receiving input data and sending output data, a Property interface for sending and receiving parameter data composed of a character string parameter for Property control, and Open/Close interface for initializing the environment and the state, a query interface for obtaining entries of the internal interfaces of the Open/Close interface, the TranslateData interface, and the Property interface, an API interface for dynamically obtaining by the query interface the four kinds of interfaces of the Open, Close, Property, and TranslateData, and a callback interface designated by the Property interface.