Patents Examined by Tariq Hafiz
  • Patent number: 7930439
    Abstract: In a command output control apparatus, one of first and second storage areas that corresponds to the smaller number of subcommands is selected as a storage area subjected to division, according to a comparison result by a subcommand number comparison unit. From partial storage areas constituting the storage area subjected to the division, a partial storage area no smaller than a predetermined size is selected as a partial storage area subjected to the division, according to a comparison result by a size comparison unit. Subcommands for accessing partial storage areas obtained by dividing the partial storage area subjected to the division are generated by an access area division unit. A subcommand for accessing the partial storage area subjected to the division is replaced with the generated subcommands. Subcommands are alternately selected from first and second subcommand groups after the replacement and outputted to a memory.
    Type: Grant
    Filed: February 20, 2007
    Date of Patent: April 19, 2011
    Assignee: Panasonic Corporation
    Inventors: Kazuya Furukawa, Masayuki Masumoto
  • Patent number: 7930448
    Abstract: A method and system for data traffic management in a storage area network subsystem connected to multiple hosts via plural ports through a connection network is provided. Traffic management involves, for each port, determining input/output (IO) traffic utilization load of the port based on workloads from one or more hosts assigned to that port; and detecting if a port is in utilization overload. Then, upon detecting a port utilization overload, port traffic is managed by adjusting traffic utilization of the overloaded port and one or more other ports in the storage subsystem, to reduce traffic utilization of the overloaded port.
    Type: Grant
    Filed: March 13, 2008
    Date of Patent: April 19, 2011
    Assignee: International Business Machines Corporation
    Inventors: Shiva Chaitanya, Karan Gupta, Madhukar R. Korupolu, Prasenjit Sarkar
  • Patent number: 7925800
    Abstract: The present invention discloses a method of editing a multi-media playing schedule for a digital photo frame, a system and a computer readable storage medium thereof, which are characterized in that users can edit a multi-media playing schedule on the data processing apparatus when the digital photo frame is electrically connected to the data processing apparatus, and after editing of the multi-media playing schedule is finished, the multi-media playing schedule is transmitted to the digital photo frame and stored in the digital photo frame. Therefore, the problem of being unable to edit complicated multi-media playing schedules due to simple operation interface of digital photo frames can be solved.
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: April 12, 2011
    Assignee: Elitegroup Computer Systems Co., Ltd.
    Inventor: Yao-Sen Cheng
  • Patent number: 7925798
    Abstract: A device for data packet processing is disclosed. In one embodiment, the device includes a processor implemented on a chip, an on-chip internal segment memory accessible by the processor, an off-chip external segment memory and a data transfer channel between the internal segment memory and the external segment memory. The external segment memory comprises first and second memory segments wherein the first and second memory segments are different in size.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: April 12, 2011
    Assignee: Lantiq Deutschland GmbH
    Inventor: Raimar Thudt
  • Patent number: 7917658
    Abstract: An apparatus and method are provided that enable I/O devices to be shared among multiple operating system domains. The apparatus has a first plurality of I/O ports, a second I/O port, and link training logic. The first plurality of I/O ports is coupled to a plurality of operating system domains through a load-store fabric. Each of the first plurality of I/O ports is configured to route transactions between the plurality of operating system domains and the switching apparatus. The second I/O port is coupled to a first shared input/output endpoint. The first shared input/output endpoint is configured to request/complete the transactions for each of the plurality of operating system domains. The link training logic is coupled to the second I/O port. The link training logic initializes a link between the second I/O port and the first shared input/output endpoint to support the transactions corresponding to the each of the plurality of operating system domains.
    Type: Grant
    Filed: May 25, 2008
    Date of Patent: March 29, 2011
    Assignee: Emulex Design and Manufacturing Corporation
    Inventors: Christopher J. Pettey, Asif Khan, Annette Pagan, Richard E. Pekkala, Robert Haskell Utley
  • Patent number: 7912996
    Abstract: A host I/F unit has a management table for managing an MPPK which is in-charge of the control of input/output processing for a storage area of an LDEV, and if a host computer transmits an input/output request for the LDEV, the host I/F unit transfers the input/output request to the MPPK which is in-charge of the input/output processing for the LDEV based on the management table, an MP of the MPPK performs the input/output processing based on the input/output request, and the MP of the MPPK also judges whether the MPPK that is in-charge of the input/output processing for the LDEV is to be changed, and sets the management table so that an MPPK which is different from the MPPK that is in-charge is to be in-charge of the input/output processing for the LDEV.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: March 22, 2011
    Assignee: Hitachi. Ltd.
    Inventors: Kazuyoshi Serizawa, Yasutomo Yamamoto, Norio Shimozono, Akira Deguchi, Hisaharu Takeuchi, Takao Sato, Hisao Homma
  • Patent number: 7912992
    Abstract: According to an aspect of an embodiment, a disk-drive automatic recognition/setting apparatus for a disk system including a controller, a disk drive, and an expander attached to the controller, the disk drive, or another expander, provides an information obtaining requesting unit issuing a request for obtaining information regarding a device attached to each attachment port of the expander, an information obtaining unit obtaining the information requested, and a routing reset request transmitting unit determining based upon the information obtained, whether a routing method of the attachment port is correctly set, and, if the routing method is wrong, transmitting a reset request for correctly resetting the wrong routing method.
    Type: Grant
    Filed: December 13, 2007
    Date of Patent: March 22, 2011
    Assignee: Fujitsu Limited
    Inventor: Tomonori Suzuki
  • Patent number: 7912999
    Abstract: A buffering apparatus to process digital communication signals includes a plurality of buffers, a processing unit, and programmed memory. The programmed memory has instructions directing the processing unit to process the digital samples corresponding to a group of symbols to be processed in a plurality of buffers. The digital samples start in a first buffer of the plurality of buffers and end in a second buffer of the plurality of buffers. The digital samples are received at a third buffer of the plurality of buffers during the processing of the digital samples.
    Type: Grant
    Filed: July 2, 2003
    Date of Patent: March 22, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Robert W. Boesel, Theodore J. Myers, Tien Q. Nguyen
  • Patent number: 7912998
    Abstract: Methods and systems for performing direct memory access (DMA) transfers are described. An invalidate queue (or other storage device) contains an entry associated with a DMA transfer in progress. If the invalidate queue detects an invalidation of a memory page associated with that entry, then it is marked invalid. If the entry is marked invalid during the DMA transfer, then that DMA transfer is aborted. This enables, among other things, DMA transfers to unpinned virtual memory.
    Type: Grant
    Filed: January 6, 2006
    Date of Patent: March 22, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Michael Steven Schlansker, Erwin Oertli, Jean-Francois Collard
  • Patent number: 7908403
    Abstract: A computer program product, an apparatus, and a method for reducing reserved device access contention at a control unit in communication with a plurality of operating systems via one or more channels are provided. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method that includes receiving a command message at the control unit from a first operating system, including an I/O operation command for a device. A device busy indicator is received, indicating that a second operating system has reserved the device. The command message is queued on a device busy queue in response to the device busy indicator. The control unit monitors for a device end indicator. The device busy queue is serviced to perform the I/O operation command in response to the device end indicator.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: March 15, 2011
    Assignee: International Business Machines Corporation
    Inventors: Mark P Bendyk, Daniel F Casper, John R. Flanagan, Clint A. Hardy, Roger G. Hathorn, Catherine C. Huang, Matthew L. Kalos, Louis W. Ricci, Gustav E. Sittmann, Harry M. Yudenfriend
  • Patent number: 7908413
    Abstract: A method for data distribution, including distributing logical addresses among an initial set of devices so as provide balanced access, and transferring the data to the devices in accordance with the logical addresses. If a device is added to the initial set, forming an extended set, the logical addresses are redistributed among the extended set so as to cause some logical addresses to be transferred from the devices in the initial set to the additional device. There is substantially no transfer of the logical addresses among the initial set. If a surplus device is removed from the initial set, forming a depleted set, the logical addresses oldie surplus device are redistributed among the depleted set. There is substantially no transfer of the logical addresses among the depleted set. In both cases the balanced access is maintained.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: March 15, 2011
    Assignee: International Business Machines Corporation
    Inventors: Ofir Zohar, Yaron Revah, Haim Helman, Dror Cohen
  • Patent number: 7904608
    Abstract: Particular embodiments include a system and method to enable a user-controlled proxy system or coordinating computer to automatically or semi-automatically communicate with multiple devices, determine the currently operating software contents and versions for each device, and to automatically or semi-automatically upgrade each device with updated software without requiring user intervention. The software may include communication, operating system or application-specific program codes that improve a given device's designed function.
    Type: Grant
    Filed: May 4, 2005
    Date of Patent: March 8, 2011
    Inventor: Robert M. Price
  • Patent number: 7904604
    Abstract: Method and apparatus for servicing commands such as the type issued by a host device to load an operating system from an associated data storage device. A controller is adapted to, upon receipt of a selected command sequence comprising a first command followed by a second command, determine an elapsed time interval between the first and second commands. The controller further uses the elapsed time interval to subsequently service the first and second commands during a subsequent receipt of the selected command sequence. Preferably, a command history table is generated to list the commands in the command sequence and the associated time intervals, and to use the time intervals to predict when the next command will occur. Readback data are pre-fetched to a buffer to expedite servicing of the commands, and the controller selectively enters one or more reduced power modes between successive commands to reduce power consumption levels.
    Type: Grant
    Filed: July 19, 2004
    Date of Patent: March 8, 2011
    Assignee: Seagate Technology LLC
    Inventors: CheeWai Lum, KokChoon See, LingLing Chua
  • Patent number: 7899955
    Abstract: The present invention relates to an asynchronous data buffer for transferring m data elements of a burst-transfer between two asynchronous systems. The asynchronous data buffer comprises a data memory for storing m data elements of a data burst and a valid bit memory for storing m input valid bits corresponding to the m data elements. Input control logic circuitry generates the m input valid bits and controls storage of the same and the m data elements. After storage of the m input valid bits an input control signal is provided for inverting the input valid bits of a following data burst. Therefore, after each burst-transfer of m data elements the input valid bit is inverted, automatically rendering all data elements of a previous burst-transfer invalid.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: March 1, 2011
    Assignee: NXP B.V.
    Inventor: Robert Gruijl
  • Patent number: 7890670
    Abstract: DMA transfer completion notification includes: inserting, by an origin DMA engine on an origin node in an injection first-in-first-out (‘FIFO’) buffer, a data descriptor for an application message to be transferred to a target node on behalf of an application on the origin node; inserting, by the origin DMA engine, a completion notification descriptor in the injection FIFO buffer after the data descriptor for the message, the completion notification descriptor specifying a packet header for a completion notification packet; transferring, by the origin DMA engine to the target node, the message in dependence upon the data descriptor; sending, by the origin DMA engine, the completion notification packet to a local reception FIFO buffer using a local memory FIFO transfer operation; and notifying, by the origin DMA engine, the application that transfer of the message is complete in response to receiving the completion notification packet in the local reception FIFO buffer.
    Type: Grant
    Filed: May 9, 2007
    Date of Patent: February 15, 2011
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Archer, Michael A. Blocksome, Jeffrey J. Parker
  • Patent number: 7890671
    Abstract: A CPU reads a system initialization program from a first recording area and stores the read system initialization program to an internal memory, and then reads the system initialization program from the internal memory and executes the system initialization and initialization of a second recording area. A DMA control unit transfers a system control program included in the program from the first recording area to the second recording area without through the CPU. A memory management unit manages a processing state of the transfer of the system control program to the second recording area by the DMA control unit. The CPU reads the program from the second recording area and executes the system control in collaboration with the memory management unit.
    Type: Grant
    Filed: August 31, 2007
    Date of Patent: February 15, 2011
    Assignee: Panasonic Corporation
    Inventors: Kenji Iwahashi, Yoshihisa Shimazu
  • Patent number: 7890664
    Abstract: Methods and apparatus for non-disruptive upgrade by redirecting I/O operations. With this arrangement, a driver upgrade does not require restarting an application. In one embodiment, a method includes installing on a computer a legacy upgrade module in a kernel having a legacy driver with first and second loadable extensions for handling input/output operations for applications to and from devices, retrieving and storing static configuration data from the legacy driver, transferring the stored static configuration data to a new driver, obtaining runtime device configuration data from the devices and transferring the runtime device configuration data to the new driver, and filtering device input/output operations such that prior to cutover input/output operations are directed by the LUM through device stacks for the legacy driver and after cutover input/output operations are directed to the new driver.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: February 15, 2011
    Assignee: EMC Corporation
    Inventors: Tao Tao, Michael E. Bappe, Harold M. Sandstrom, Edith Epstein, Eric I. West, Helen S. Raizen, Santhosh V. Kudva
  • Patent number: 7873755
    Abstract: A method for controlling a reproduction device which reproduces data held in a USB device connected to a USB terminal is provided. The method includes: detecting that the USB device is connected to the USB terminal; transmitting a call to the USB device, if the connection of the USB device is detected; detecting, during a first waiting time, a response from the USB device to the call transmitted to the USB device; detecting, during a second waiting time, different from the first waiting time, a response from the USB device to the call transmitted to the USB device, if the response from the USB device is not detected during the first waiting time; and reproducing the data held in the USB device, if the response from the USB device is detected during the first waiting time or during the second waiting time.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: January 18, 2011
    Assignee: Panasonic Corporation
    Inventors: Norio Hatanaka, Hiroshi Satoh
  • Patent number: 7873756
    Abstract: This invention increases the design efficiency of an upper layer such as a job control means. To accomplish this, an image processing apparatus having a plurality of types of external interfaces (a USB and LAN) different in protocol has an external interface adaptor 203 which dynamically allocates external interfaces as objects of processing to lower layer IDs within a predetermined range, and a job controller 202 which controls execution of various types of jobs by using the lower layer IDs, and a value which the lower layer ID can take is constant regardless of the type of external interface.
    Type: Grant
    Filed: July 5, 2005
    Date of Patent: January 18, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventors: Fumio Shoji, Takao Ikuno, Masahiro Odaira, Yoshiaki Katahira, Toru Fujino, Kenji Kasuya, Noritsugu Okayama, Yasuhito Niikura
  • Patent number: 7870306
    Abstract: A method and apparatus are described to provide shared switch and cache memory. The apparatus may comprise a message switch module, a cache controller module, and shared switch and cache memory to provide shared memory to the message switch module and to the cache controller module. The cache controller module may comprise pointer memory to store a plurality of pointers, each pointer pointing to a location in the shared switch and cache memory (e.g., point to a message header partition in the shared switch and cache memory). If there is a corresponding pointer, a memory read response may be sent to the requesting agent. If there is no corresponding pointer, a write data request may be sent to a corresponding destination agent and, in response to receiving the requested data, a pointer to the stored data in the pointer memory may be provided.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: January 11, 2011
    Assignee: Cisco Technology, Inc.
    Inventor: Keith Iain Wilkinson