Abstract: The present invention provides a pushback FIFO architecture that enables a value that has been unloaded from the FIFO to be pushed back into the FIFO at the beginning of the data stream if a determination as made that the data value should not have been unloaded from the FIFO. Therefore, the pushed back data value will be the first data value unloaded from the FIFO on the following read cycle. Because the data value that should not have been unloaded is not lost, and is placed at the beginning of the data value sequence, the pushback FIFO enables speculative unloads of data values from the FIFO to be performed.

Abstract: Data packet buffering system comprising a data buffer for buffering data packets, a first counter (24) preloaded with the data packet size (32) and decremented at each read clock signal of a number of logical units corresponding to the width of the output bus (18), a second counter (28) preloaded with the data packet size and decremented at each write clock signal of a number of logical units corresponding to the width of the input bus (14), the decrementation of the second counter being started at the same time as the decrementation of the first counter by a start counter signal (38), and a threshold unit (52) for determining the minimum threshold from the contents of the second counter when the first counter has reached zero and providing the minimum threshold to a buffer management logic unit a buffer management logic unit (22) providing write grant signals when data may be read from the data buffer and sent to an output device.

Abstract: The invention provides a task scheduling method which can prevent overflowing of a buffer on a host system or a data encoding/decoding apparatus even when the transfer rate falls in case the compressed data and the non-compressed data are simultaneously transferred between the host system and the data encoding/decoding apparatus. In a task scheduling method, the compressed audio/video data is transferred from the buffer of the host system to an external device with a first transfer priority. The non-compressed audio/video data is transferred from the buffer to the external device with a second transfer priority lower than the first transfer priority.

Abstract: Techniques are provided for processing an Input/Output (I/O) request. At least one data block is allocated for use in completing the I/O request. A current operations record is stored for the I/O request. It is determined whether the I/O request has been completed within a specified period of time. In response to determining that the I/O request has not been completed within the specified period of time, the allocated at least one data block is fenced.

Abstract: In an embodiment, an input/output memory management unit (IOMMU) is configured to receive a completion wait command defined to ensure that one or more preceding invalidation commands are completed by the IOMMU prior to a completion of the completion wait command. The IOMMU is configured to respond to the completion wait command by delaying completion of the completion wait command until: (1) a read response corresponding to each outstanding memory read operation that depends on a translation entry that is invalidated by the preceding invalidation commands is received; and (2) the control unit transmits one or more operations upstream to ensure that each memory write operation that depends on the translation table entry that is invalidated by the preceding invalidation commands has at least reached a bridge to a coherent fabric in the computer system and has become visible to the system.

Abstract: Programmatic detection of time-gap defects in computer system hardware where data is corrupted without detection by the computer system. A detection module initiates data transfers between devices in a computer system. An interrupt service routine interrupts the process by inserting a delay into the data transfer. The detection module then checks for time-gap defects by determining if data was corrupted which went undetected by the computer system. The detection module may repeat the data transfer and insert successively longer delays until a time-gap defect is detected or until a maximum delay value is reached. The results of any time-gap defects found may be output to a user. The length of the delays inserted into a data transfer may be determined dynamically using an iterative search technique to more rapidly converge on time-gap defects. Both bisection and Fibonacci search methods are examples that may be used.

Abstract: An output port determining apparatus is capable of determining a longest match for a network address without the necessity of processing operations in memory devices. Output ports are connected to networks. An address bus has signal lines corresponding to bits of a node address which uniquely identifies a node as a connection destination. A plurality of memory devices are connected to as many the signal lines as the number of bits of network addresses of the networks, and store port information representing the output ports to output data therefrom at memory addresses corresponding to the network addresses. An address register outputs a received node address to the address bus. A selecting circuit selects the port information stored in one of the memory devices which is connected to the most signal lines, from port information outputted from the memory devices according to the node address, and outputs the selected port information.

Abstract: The utility and operation of portable hosts, such as PDAs and other portable computers, is enhanced by methods and devices employing a first-level removable module adapted to receive a second-level removable module with subscriber services information. The first-level removable module processes received messages and services based at least in part on the contents of the subscriber services module.

Abstract: A method of protecting a data storage system including the steps of: providing a disk system including a plurality of disk modules, each disk module containing a disk controller and a disk driver, the disk driver being in detachable electrical communication with the disk controller; and physically disconnecting the disk controller from the disk driver for any of the plurality of disk modules that are not required by the data storage system for the transfer of data.

Abstract: A system and method to facilitate communication between an associated bus, such as employs a standard bus protocol, and a connector to which a removable SFF device can be attached. A desired operating mode is selected based on the device attached at the connector, such as either to pass the protocol between the bus and device generally unchanged or to implement suitable protocol conversion for such communication. Thus, by configuring the SFF device to appear as device currently supported by the bus, the SFF device can operate at the connector with native operating system support.

Abstract: A computer implemented method, apparatus, and computer usable program code for configuring a remote data processing system. A configuration is identified for the remote data processing system to form an identified configuration. The hardware for the remote data processing system is configured. An installation application is sent to the remote data processing system across a communications link after the hardware in the remote data processing system has been configured, wherein the installation application executes on the remote data processing system to configure the remote data processing system. Installation files are sent across the communications link to the installation application executing on the remote data processing system. The installation program uses the installation files to configure install a set of operating systems, install applications, and configure software on the remote data processing system.

Abstract: A disaster recovery technique for computer systems obtains backup copies of data by arranging recording devices like direct-access disk devices into copy pairs of primary and secondary devices. Management of the device copy pairs within a single system and across multiple systems is facilitated by constructing maps of device information that provide a cross-reference between I/O subsystem device numbers and hardware addresses. Information structures are constructed from the maps and used to facilitate defining and managing groups of device copy pairs.

Abstract: A method of accessing internal memory of a processor and the device thereof. The method employs a bank swapping mechanism for the processing unit of a processor and a direct memory access controller to simultaneously access different memory units in internal memory. The processing unit can continuously access and process data in the internal memory to optimize its efficiency. In the device, the processing unit of a processor and a direct memory access controller are coupled to internal memory through a switching circuit, the switch of which enables the processing unit and the direct memory access controller to access different memory units in the internal memory. Therefore, the processing unit can continuously access and process data in the internal memory to optimize its efficiency.

Abstract: In a data processing system that processes serial data transferred from a processor formed as one chip and transmits the resultant data to another chip, a data output processing unit that processes serial data transferred from a single processor or a plurality of processors comprises a bank designation serial data holder that temporarily holds bank designation serial data with which an address of a bank is designated and which is transferred from the processor, and a bank designation serial data comparator that compares a designative value represented by current bank designation serial data, which is currently held, with a designative value represented by the last bank designation serial data that is immediately previously held. If the two designative values are verified to agree with each other, the current bank designation serial data is not transmitted but only current register designation serial data with which a register is designated is transmitted.

Abstract: A method and apparatus for communicating data between a device and a host apparatus through a USB interface detects and corrects USB transaction phase deviation due to erroneous recognition of handshake packets. A method comprises the steps of transmitting a first packet from the device to the host apparatus, the first packet being erroneously recognized by the host apparatus as a first type of packet, receiving a second packet from the host apparatus at the device in response to the first packet, and transmitting a third packet from the device to the host apparatus, the third packet being the first type of packet, in response to receiving the second packet from the host apparatus.

Abstract: A method of generating interrupts and a network interface card, which minimizes the number of times that interrupts are generated, are provided. The method includes receiving data frames; estimating a first and second time delay and counting a number of received data frames; determining whether the first time delay has passed and generating an interrupt if the time reaches the first delay time, counting the number of data frames if the first time delay has not passed and generating the interrupt if the number of data frames is equal to N; determining whether the second time delay has passed if the number of data frames is not equal to N and generating the interrupt if the second time delay has passed; stopping operations of estimating the first and second time delays and counting the number of data frames in response to the interrupt generated, and transmitting the received data frames.

Abstract: A system on a chip for network devices. In one implementation, the system on a chip may include (integrated onto a single integrated circuit), a processor and one or more I/O devices for networking applications. For example, the I/O devices may include one or more network interface circuits for coupling to a network interface. In one embodiment, coherency may be enforced within the boundaries of the system on a chip but not enforced outside of the boundaries.

Abstract: A generic service management system is disclosed. The generic service management system comprises a registration scheme; a search-and-execution scheme; and a detection-and-replacement scheme, used for detecting and replacing the invalid service provider, such as a semiconductor equipment manager. The present invention provides a GEV (Generic Evaluator) having the capabilities of error-detecting and data backup, and further combines Jini infrastructure and the programming technology of design by contract. The GEV archives the credit values of all the service providers for letting a client (such as a factory manager) to select a service provider having a higher credit value.

Abstract: Advertisement response probabilities are utilized to alter advertisement scores. A plurality of possible advertisements is accessed from, for example, an advertisement database or advertisement pipeline. A response probability for each advertisement is determined. A response probability may be a probability that a user will “click,” or otherwise select an advertisement. Advertisements may be associated with probabilistic prediction models that take advertisement recipient attribute values as inputs and provide a probability distribution as output. A score associated with each of the possible advertisements is altered based on the response probability for each of the advertisements. Statistical prediction is used to determine how scores are to be altered. Advertisements with response probabilities less than a mean probability may have associated scores decreased. Conversely, advertisements with response probabilities greater than a mean probability may have associated scores increased.

Abstract: A service element is defined and represented by a data structure. It includes one or more components and/or one or more other service elements. A service element providing a complete function is a service offering. Management of service elements and/or service offerings is facilitated by a Service Development Tool. In different aspects, the management includes various tasks associated with creating, modifying and deleting service elements, establishing relationships, error checking and optimization. In a further aspect, service elements are packaged and distributed to enable customers to deliver the service elements. Additionally, the hosting of software packages is facilitated.