Abstract: A light-emitting device is disclosed, comprising a substrate; a light-emitting structure on the substrate comprising a first region and a second region; a barrier layer on the first region having a bottom surface and a sidewall, wherein an angle between the sidewall and the bottom surface is between 10°70°; and a transparent conductive layer formed on the light-emitting structure and the barrier layer; wherein a difference between a thickness of the transparent conductive layer at the sidewall on the barrier layer and a thickness of the transparent conductive layer on the second region of the light-emitting structure forms a ratio not larger than 10 %.

Abstract: A heat conducting composite material includes a matrix and a graphene sheet. The graphene sheet has a two-dimensional planar structure, and a basal plane of the graphene sheet has a lateral size between 0.1 nm and 100 nm such that the graphene sheet has a quantum well structure. When radiation energy passes through the heat conducting composite material, the radiation energy is converted into infrared light by the quantum well structure of the graphene sheet to achieve high radiating efficiency. A light-emitting diode (LED) having the heat conducting composite material and capable of achieving a heat dissipation effect is further disclosed.

Abstract: A method of forming a current diffusion layer is provided that comprises providing an epitaxial wafer. The method further comprises depositing ITO source material on the epitaxial wafer to form a base ITO layer by a direct current electron gun and depositing ZnO source material, during simultaneous deposition of the ITO source material, on the base ITO layer to form a ZnO doped ITO layer by a pulse current electron gun. The ZnO source material is deposited at a deposition rate higher than the rate at which the ITO source material is deposited. Generation and termination of current may be controlled by adjusting a duty cycle of pulse current provided by the pulse current electron gun and result in discontinuous deposition of the ZnO source material. The method further comprises depositing the ITO source material on the ZnO doped ITO layer to cover the ZnO doped ITO layer and form a finished ITO layer.

Abstract: A power semiconductor package device and a method of preparation the device are disclosed. The package device includes a die paddle, a first pin, a second pin, and a semiconductor chip attached to the die paddle. A first electrode, a second electrode and a third electrode of the semiconductor chip are connected to the first pin, the second pin and the die paddle respectively. A plastic package body covers the semiconductor chip, the die paddle, the first pin and the second pin. The first pin and the second pin are located near two adjacent corners of the plastic package body. The bottom surface and two side surfaces of each of the first pin and the second pin are exposed from the plastic package body. Locking mechanisms are constructed to prevent the first pin and the second pin from falling off the power semiconductor package device during a manufacturing cutting process. Portions of the first pin, portions of the second pin, and portions of the plastic package body can be cut off.

Abstract: A package structure is disclosed, which includes a substrate having a body, a plurality of conductive pads formed on the body and a surface passivation layer formed on the body and having a plurality of openings for exposing the conductive pads; a plurality of conductive vias formed in the openings of the surface passivation layer and electrically connected to the conductive pads; a plurality of circuits formed on the surface passivation layer and electrically connected to the conductive vias, wherein the circuits have a plurality of electrical contacts; at least a pattern portion formed on the surface passivation layer and intersecting with the circuits; and a second passivation layer formed on the surface passivation layer, the circuits and the pattern portion and having a plurality of openings for exposing portions of the electrical contacts of the circuits, thereby strengthening the bonding between the circuits and the passivation layers.

Abstract: A conductive composition includes a mono-acid hybrid that includes an unprotected, single reactive group. The mono-acid hybrid may include substantially non-reactive groups elsewhere such that the mono-acid hybrid is functional as a chain terminator. Methods and devices using the compositions are also disclosed.

Abstract: An optoelectronic semiconductor chip includes a carrier including a carrier element having a mounting side; one electrically conductive n-type wiring layer arranged at the mounting side; a structured, electrically conductive contact layer having a p-side and n-side contact region and arranged at a side of the n-type wiring layer facing away from the carrier element; at least one insulation region electrically insulating the p-side contact region from the n-side contact region; at least one electrically insulating spacer layer arranged at a side of the n-type wiring layer facing away from the carrier element in a vertical direction between the p-side contact region and the n-type wiring layer, wherein the n-side contact region and the n-type wiring layer electrically conductively connect to one another, and the p-side contact region and the spacer layer border the n-side contact region in a lateral direction; an optoelectronic structure connected to the carrier.

Abstract: One embodiment is directed to a welding pad capable of receiving a ball-shaped copper wire at its end, including a first copper pad coated with a protection layer and topped with a second pad containing aluminum having dimensions smaller than those of the first pad and smaller than the ball diameter once said ball has been welded to the welding pad.

Abstract: Pkg resin crack is suppressed after dicing. A light emitting device 1 where a light emitting device 2 that emits light is mounted on a lead frame 3 and that uses a resin cavity molding package 5 having an integrally molded lead frames 3, 4 constituting electrodes that correspond to the light emitting element 2 and resin, wherein roundness is given to a part or all of a cutting plane corner part of a retention section (hanger lead 3a, 4a) that become a cause of crack generation due to the retention sections (hanger leads 3a, 4a) of the lead frames giving stress concentration to resin at the time of cutting by a blade 7.

Abstract: A method including: providing a first wafer stack; applying a first bonding layer on the first wafer stack; providing a second wafer stack, where the second wafer stack includes vias; and applying a second bonding layer to the second wafer stack. The vias extend through the second wafer stack and to the second bonding layer. The second bonding layer is bonded to the first bonding layer. A seed layer is applied on a side of the second wafer stack opposite the second bonding layer such that a material of the seed layer (i) contacts the vias, and (ii) extends over and past ends of the second wafer stack and onto the first bonding layer.

Abstract: “Thick line dies” that, during manufacture, avoid locating an upstanding edge of a photoresist layer (for example, the edge of a dry film photoresist layer) on top of a “discontinuity.” In this way solder does not flow into the mechanical interface between the photoresist layer and the layer under the photoresist layer in the vicinity of an upstanding edge of the photoresist layer.

Abstract: According to one embodiment, a semiconductor light emitting device includes an electrode layer, a first semiconductor layer, a first elongated electrode, a second semiconductor layer, and a light emitting layer. The first semiconductor layer includes a crystal having a cleavage plane. The first semiconductor layer includes a first thin film portion and a thick film portion. The first thin film portion extends in a first direction perpendicular to a stacking direction from the electrode layer toward the first semiconductor layer. The first thin film portion has a first thickness. The thick film portion is arranged with the first thin film portion in a plane perpendicular to the stacking direction. An angle between the first direction and the cleavage plane is not less than 3 degrees and not more than 27 degrees. The first elongated electrode extends in the first direction in contact with the first thin film portion.

Abstract: An LED device includes a substrate having a top surface and a bottom surface. The substrate defines a through hole at a center thereof. The LED device also includes an electrode board. The electrode board defines a concave portion at a center thereof, and a convex portion connected to and surrounding two sides of the concave portion. The concave portion includes a first electrode and a second electrode isolated from each other, and is located in the through hole of the substrate. A bottommost surface of the concave portion is substantially coplanar with the bottom surface of the substrate, and a top surface of the convex portion is substantially coplanar with the top surface of the substrate. An LED chip is arranged on the concave portion, and is electrically connected to the first electrode and the second electrode. A method for manufacturing plural such LED devices is also provided.

Abstract: A microelectronic package can include a substrate having first and second opposed surfaces, and first and second microelectronic elements having front surfaces facing the first surface. The substrate can have a plurality of substrate contacts at the first surface and a plurality of terminals at the second surface. Each microelectronic element can have a plurality of element contacts at the front surface thereof. The element contacts can be joined with corresponding ones of the substrate contacts. The front surface of the second microelectronic element can partially overlie a rear surface of the first microelectronic element and can be attached thereto. The element contacts of the first microelectronic element can be arranged in an area array and are flip-chip bonded with a first set of the substrate contacts. The element contacts of the second microelectronic element can be joined with a second set of the substrate contacts by conductive masses.

Abstract: In one embodiment, a semiconductor die is formed to have sloped sidewalls. A conductor is formed on the sloped sidewalls.

Abstract: A lead frame for a semiconductor device includes a die paddle and leads situated on a perimeter of the lead frame. The die paddle has a metal frame and a number of substantially linear metal connecting bars within the frame. The connecting bars interconnect different locations of the frame to form a multiple triangles, where a triangular-shaped cavity is formed within each triangle. An overall area of the cavities is greater than an overall area of the connecting bars.

Abstract: A module can include a module card and first and second microelectronic elements having front surfaces facing a first surface of the module card. The module card can also have a second surface and a plurality of parallel exposed edge contacts adjacent an edge of at least one of the first and second surfaces for mating with corresponding contacts of a socket when the module is inserted in the socket. Each microelectronic element can be electrically connected to the module card. The front surface of the second microelectronic element can partially overlie a rear surface of the first microelectronic element and can be attached thereto.

Abstract: The light emitting device package has a lengthwise direction as viewed from above and a lateral or widthwise direction perpendicular to the lengthwise direction, and is provided with two lead-frames lined-up in the lengthwise direction and molded resin formed as a single unit with the two lead-frames. The package is characterized in that each of the two lead-frames has a first thin region that is thinned by establishing a recess in the lower surface and/or the upper surface of the lead-frame, and that recess is covered with molded resin. Further, each lead-frame has an extension that narrows as it extends towards the opposite lead-frame. Both extensions are entirely within first thin regions, and as viewed from above, at least parts of the opposing extensions are positioned opposite each other in the lateral direction.

Abstract: A semiconductor light emitting element includes a laminated semiconductor layer including a light emitting layer that emits light by passing a current, the laminated semiconductor layer has a lower semiconductor bottom surface, a semiconductor side surface that rises from an edge of the lower semiconductor bottom surface upwardly and outwardly of the laminated semiconductor layer, and a lower semiconductor top surface that faces upward by extending inwardly of the laminated semiconductor layer from an upper edge of the semiconductor side surface, an edge of the lower semiconductor top surface includes first and second linear portions extending linearly and plural connecting portions connecting the first and second linear portions, and, when viewed from a direction perpendicular to the lower semiconductor top surface, each connecting portion is positioned inside a point of intersection of extended lines of the first and second linear portions connected to the connecting portion.

Abstract: In one embodiment, a semiconductor die is formed to have sloped sidewalls. A conductor is formed on the sloped sidewalls.