Abstract: A storage device includes a volatile memory, a nonvolatile memory, an auxiliary power source, and a controller configured to start a setting process to store a setting value in the volatile memory in response to a setting command received from a host, and operate in accordance with one or more setting values stored in the volatile memory. When the controller determines that a main power supply will stop, power from the auxiliary power source starts to be primarily used, and the controller saves at least part of said one or more setting values stored in the volatile memory to the nonvolatile memory, before power supply from the auxiliary power source ends.

Abstract: A method and apparatus for sequence of event (SOE) data logging. In one embodiment, the method comprises continuously recording, at a power conditioner coupled to a power distribution line, data obtained by sampling a waveform of the power distribution line during a sampling window; analyzing, by the power conditioner, the data to determine whether an event has occurred; and based on the analysis, maintaining the data when it is determined that the event has occurred, and discarding the data when it is determined that the event has not occurred.

Abstract: Embodiments include a method comprising: receiving, by a system-on-a-chip (SOC) from a host, a public key of a public/private key pair; generating a first hash value of the public key; authenticating the first hash value; in response to authenticating the first hash value, transmitting, by the SOC, a first nonce to the host; receiving a signed nonce from the host, the signed nonce being signed using a private key of the public/private key pair; decrypting, using the received public key, the signed nonce to generate a second nonce; based on the first nonce and the second nonce, authenticating the host; in response to authenticating the host, receiving, from the host, a command to configure one or more parameters of the SOC; and configuring the one or more parameters of the SOC.

Abstract: A machine implemented method of communication between server and remote device, the method comprising: determining an availability and address of the remote device on a network for communication with the server; obtaining a public key attributed to the remote device; signing the public key attributed to the remote device with a private key of the server and so generating a digitally signed certificate to verify the ownership of the public key as the remote device; and transmitting the digitally signed certificate to the remote device.

Abstract: A solid-state drive (SSD) includes a connector communicatively coupling the SSD to a host device, a controller coupled to the connector, and a memory device. The SSD also include a regulator configured to receive an instruction to enter a low power mode of the SSD, enter the low power mode upon receipt of the instruction, receive an indication to exit the low power mode, and exit the low power mode upon receipt of the indication.

Abstract: A personal computer or other electronic device may be powered by an external power supply and may have a legacy ambient temperature sensor e.g. because a fan whose speed is controlled by a controller, uses as an input, inter alia, ambient air temperature received from the legacy temperature sensor which may be disposed adjacent the fan. A controller may be provided which limits the current based on ambient air temperature reading/s flowing out of the sensor thereby to optimize power consumption relative to conventional “worst-case-assumption based” control of the current, in which current supplied is limited, mindful of a pre-set worst-case temperature assessment, to an un-necessarily low level of current.

Abstract: Examples herein disclose receiving a basic input output system (BIOS) policy change and authorizing the BIOS policy change. Upon the authorization of the BIOS policy change, a first copy of the BIOS policy is stored in a first memory accessible by a central processing unit. Additionally, a second copy of the BIOS policy change is transmitted for storage in a second memory electrically isolated from the central processing unit.

Abstract: Inductive peripheral retention device techniques are described. In one or more implementations, an apparatus includes a plug configured to removably engage a communication port of a device to form a communicative coupling with the device. The plug is securable to and removable from the device using one or more hands of a user. The apparatus also includes a peripheral securing portion connected to the plug and configured to removably engage a peripheral device via an inductive element formed as a flexible loop and configured to form a communicative coupling between the peripheral device and the device, which may be used to support charging of the apparatus.

Abstract: A power excursion tolerant power system includes at least one powered component. A system capacitance and at least one power supply are coupled to the at least one powered component. The at least one power supply is operable as a voltage controlled current source to supply power to the at least one powered component when a system load is below a predetermined threshold. The at least one power supply is operable as a constant current source, and together with the system capacitance, to supply power to the at least one powered component when the system load is above the predetermined threshold. A load reduction mechanism is coupled to the at least one powered component and operable to perform at least one load reduction action when the system load is above the predetermined threshold.

Abstract: A serial point-to-point link interface to enable communication between a processor and a device, the high speed serial point-to-point link interface including a transmitter to transmit serial data, a receiver to deserialize serial data, and control logic to implement a protocol stack. The protocol stack supports a plurality of power management states, including an active state, a first off state, in which a supply voltage is maintained, and a second off state, in which the supply voltage is not to be provided to the device. The protocol stack provides a default recovery time to allow the device to begin a transition from the first off state to the active state prior to accessing the device. The protocol stack further provides for accessing the device prior to expiration of the default recovery time to complete the transition based on a device-advertised recovery time.

Abstract: An apparatus includes a circuit that has a normal mode of operation and a low-power mode of operation. The circuit consumes more power in the normal mode of operation than in the low-power mode of operation. The apparatus further includes a power-supply circuit. The power-supply circuit provides a normal supply voltage to the circuit in the normal mode of operation. The power-supply circuit includes a non-linear circuit to provide a compressed supply voltage to the circuit in the low-power mode of operation, wherein the normal supply voltage is greater than the compressed supply voltage.

Abstract: A system on a chip (SoC) is provided with a multicore processor, a level-2 (L2) cache controller, an L2 cache, an integrated memory controller, and a serial point-to-point link interface to enable communication between the multicore processor and a device. The interface implements a protocol stack and includes a transmitter to transmit serial data to the device and a receiver to deserialize an incoming serial stream. The protocol stack supports a plurality of power management states, including an active state, a first off state, in which a supply voltage is to be provided to the device, and a second off state, in which the supply voltage is not to be provided to the device. In response to an indication the device is ready to enter the active state, the protocol stack provides for accessing the device prior to expiration of a default recovery time to complete the transition.

Abstract: A calling device may obtain a first calling security parameter by registering with a network and obtain a second calling security parameter in response to causing an application authentication architecture of the network to verify that that the calling device is authorized to access a network service corresponding to a communication application stored by the calling device. The calling device may communicate the first and second calling security parameters to a called device and receive first and second called security parameters from the called device in response to communicating the first and second calling security parameters. The calling device may generate a security key based on the first calling security parameter, the second calling security parameter, first called security parameter, and the second called security parameter, and use the security key to encrypt or decrypt communication between the calling device and the called device.

Abstract: A method includes a power supply system receiving a first request for a first quantity of power for a first time period from a first unit. The system generates a first quote based on an available power generation capacity, environmental factors and a forecasted level of power consumption. The system transmits the first quote to the first unit. The system receives a second request for a second quantity of power for a second time period. The system generates a second quote based on the same factors as the first quote. The system transmits the second quote to the second unit. The value of the first quote and the value of the second quote are set to discourage demand in a first mode and to encourage demand in a second mode to maximize efficient operating levels of the power generation sources in both the first mode and the second mode.

Abstract: In some examples, a controller receives, from a sensor that is part of a device mounted on a moveable platform, measurement data. The controller detects, based on the measurement data, a change in transit motion status of the moveable platform. The controller triggers, in response to detecting the change in transit motion status of the moveable platform, a transition of the device from a first power state to a second, different power state.

Abstract: One embodiment describes a Josephson transmission line (JTL) system. The system includes a plurality of JTL stages that are arranged in series. The system also includes a clock transformer comprising a primary inductor configured to propagate an AC clock signal and a secondary inductor arranged in a series loop with at least two of the plurality of JTL stages. The clock transformer can be configured to propagate a single flux quantum (SFQ) pulse to set a respective one of the plurality of JTL stages in response to a first phase of the AC clock signal and to reset the respective one of the plurality of JTL stages in response to a second phase of the AC clock signal that is opposite the first phase.

Abstract: Volatile memory is described, comprising: (i) a first inverter comprising a first p-type field effect transistor (FET) connected to a first n-type FET; (ii) a second inverter comprising a second p-type FET connected to a second n-type FET; (iii) a third p-type FET; (iv) a fourth p-type FET; and (v) a floating line connecting (i) a source of the third p-type FET, and (ii) a source of the fourth p-type FET, wherein: (a) the first data line is connected to: a gate of the second p-type FET, a gate of the second n-type FET, a drain of the third p-type FET, and a gate of the fourth p-type FET, and (b) the second data line is connected to: a gate of the first p-type FET, a gate of the first n-type FET, a drain of the fourth p-type FET, and a gate of the third p-type FET.

Abstract: Methods and systems for executing an application includes predicting a minimum operational voltage for a next epoch of an application based on performance counters collected in a previous epoch of the application. The next epoch of the application is executed using the predicted minimum operational voltage if the application is in a stable phase and using a nominal safe voltage if the application is in an unstable phase.

Abstract: A hearing assistance system including a hearing instrument designated as a master device and at least another hearing instrument designated as a slave device. The master device is communicatively coupled to the slave device via a wireless link. The master device has a master clock and generates master time stamps for specified events timed by the master clock. The master time stamps are sent to the slave device via the wireless link. The slave device has a slave clock and generates slave time stamps for specified events timed by the slave clock. The slave clock is adjusted for synchronization to the master clock using the master time stamps and the slave time stamps.

Abstract: An example system includes a bask input/output system (BIOS) and a battery having a fuel gauge timer. The BIOS is associated with a real-time clock, and the BIOS uses timer information from the fuel gauge timer to update the real-time clock.