Abstract: A network switch with: Power-over-Ethernet ports to connect to twisted-pair wires and transmit signals with a data packet comprising a target address and direct-current electric power via the twisted-pair wires; a first Powerline Communication port to connect to a pair of line wires supplying alternating-current electric power and to transmit signals with a data packet via the pair of line wires; a controller; and a memory storing target addresses by data packet. The controller may: receive a signal from one of the Power-over-Ethernet ports or the Powerline Communication port; demodulate the inbound signal; produce a data packet from the demodulated inbound signal; determine the target address of the data packet; look up the determined target address; produce an outbound signal modulated for the target port; and send the modulated outbound signal to the target port.

Abstract: A hearing assistance system including a hearing instrument designated as a master device and at least another hearing instrument designated as a slave device. The master device is communicatively coupled to the slave device via a wireless link. The master device has a master clock and generates master time stamps for specified events timed by the master clock. The master time stamps are sent to the slave device via the wireless link. The slave device has a slave clock and generates slave time stamps for specified events timed by the slave clock. The slave clock is adjusted for synchronization to the master clock using the master time stamps and the slave time stamps.

Abstract: Embodiments provide a method to control a power-on phase of an electronic device is provided. The method includes transmitting, by a processing device, a request to a plurality of sensors, the request to read a measurement related to an environmental condition; receiving, by the processing device, the measurement from each of the plurality of sensors; and when the measurement is equal to or above a threshold value, commencing, by the processing device, the power-on phase of the electronic device.

Abstract: In one or more embodiments, one or more systems, methods, and/or processes may determine a temperature change associated with a first battery system; may determine if a temperature change is increasing; if the temperature change associated with the first battery is increasing: may determine if the temperature change is above a maximum threshold; if the temperature change is not above the maximum threshold, may charge the first battery system; if the temperature change is above the maximum threshold: may determine that a second battery system is fully charged; and may charge the first battery system at a reduced charge rate; and if the temperature change is not increasing: may determine if the temperature change is above a minimum threshold; if the temperature change is above the minimum threshold, may charge the first battery; and if the temperature change is not above the minimum threshold, may charge the second battery system.

Abstract: Embodiments provide a method to control a power-on phase of an electronic device is provided. The method includes transmitting, by a processing device, a request to a plurality of sensors, the request to read a measurement related to an environmental condition; receiving, by the processing device, the measurement from each of the plurality of sensors; and when the measurement is equal to or above a threshold value, commencing, by the processing device, the power-on phase of the electronic device.

Abstract: The described embodiments provide a graceful power transition system that can be configured as part of an enterprise computing system, workstations, a carrier grade computing system, and other similar computing systems is described. Power failure can cause potential problems that relate to data integrity, data loss, processing operations completion and timeliness, componentry reliability, and componentry failures, as well as other potential problems. The graceful power transition system recognizes these issues and provides numerous configurable embodiments that allow for smooth power down and power up transitions when power failures, power fluctuations, and return of power events occur. Embodiments of this system can be particularly useful in regions where power failure and power fluctuations are frequent.

Abstract: Micro-idle power in a subsystem of a portable computing device may be actively managed based on client voting. Each client vote may include a client activity status indication and a client latency tolerance indication. Votes are aggregated to provide an aggregate client latency tolerance, which may be used to obtain a set of micro-idle time values. Micro-idle timers in the subsystem may be set to associated micro-idle time values. The micro-idle timers determine whether one or more of the micro-idle time values have elapsed. A power management policy associated with each micro-idle time value determined to have elapsed may be applied to a portion of the subsystem.

Abstract: In some examples, a controller receives, from a sensor that is part of a device mounted on a moveable platform, measurement data. The controller detects, based on the measurement data, a change in transit motion status of the moveable platform. The controller triggers, in response to detecting the change in transit motion status of the moveable platform, a transition of the device from a first power state to a second, different power state.

Abstract: Methods and systems for executing an application includes executing an epoch of the application using a predicted minimum operational voltage that is based on a previous epoch of the application if the application is in a stable phase and using a nominal safe voltage if the application is in an unstable phase.

Abstract: In an embodiment, a device may include an attention detection service. The attention detection service may monitor various peripheral devices in the device for indications that a user is paying attention to the device. Various clients may register for notification of attention detection and attention lost (attention no longer detected) events, or may poll the service for the events. If a user is not paying attention to the device, it may be possible to take various actions to permit reduced energy consumption.

Abstract: The invention provides a detection system and detection circuit for detecting health status of backup power supply module. The detection circuit comprises a boost converter, a controller, and at least one backup power supply module. The boost converter receives an input voltage to generate a first high voltage. When the detection circuit is operated in a detection state, the boost converter is inhibited to output the first high voltage, the backup power supply module can execute a discharging process to provide a discharged energy to a load device, the controller detects a time at which a discharged potential of the backup power supply module is dropped from a first voltage to a second voltage to obtain a discharged time detection value. The controller can know a health status of the backup power supply module by a comparison between the discharged time detection value and a discharged time threshold value.

Abstract: The present disclosure generally relates to an electronic circuit and method of operating thereof to back up write cache data on DDR memory in data storage devices during an emergency power off (EPO). The method involves using a power management integrated circuit (PMIC), a combo driver and one MOSFET for regulator output. The method involves detecting a voltage value that is below a predetermined threshold value, retracting a write head away from a hard disk drive (HDD), backing up data, and then resetting the HDD after the backup is complete. The backing up and retraction may occur in parallel or in sequence. The method utilizes the spindle back-electromotive force (BEMF) power to have sufficient power to make the backup. If the power from the spindle BEMF is too low, then the retraction is suspended and a high impedance is present to lighten the load until the BEMF recovers before the power on reset. As such, the back-up data is not reset and volatized by a lack of power.

Abstract: According to one embodiment, a semiconductor integrated circuit includes the following configuration. A arithmetic processing circuit includes a first processor core performing arithmetic processing and a common unit containing a cache memory storing data and programs, and the first processor core or the common unit is divided into a first circuit and a second circuit. The first clock gating circuit supplies or stops a clock to the first circuit. The first power switch supplies or cuts off a power supply voltage to the first circuit. The second clock gating circuit supplies or stops the clock to the second circuit. The second power switch supplies or cuts off the power supply voltage to the second circuit. The controller controls the clock gating circuits and the power switches.

Abstract: A computer implemented method includes identifying in an original circuit output signals that drive domain crossing logic separating a first clock domain from a second clock domain. A revised circuit is formed with a register attached to the domain crossing logic. The register receives an output signal and a synchronization signal that precludes the output signal from transitioning at selected clock cycle intervals.

Abstract: A monitoring system may receive data indicating work performed by a set of computing devices during a given period of time and may receive data indicating an amount of power consumed by the set of computing devices and support systems that support the set of computing devices during the given period of time. The monitoring system may normalize the amounts of work performed by different types of computing devices in the set and determine an aggregate amount of work performed by the set. The monitoring system may also determine an aggregate amount of electrical power consumed by the set of computing devices and support system that support the set of computing devices during the given period of time. A monitoring system may use the aggregate amount of work performed and aggregate amount of power consumed during the given period of time to determine a performance index efficiency for the set.

Abstract: An array of ultrasonic transducers can be controlled to produce a steerable beam. Beam steering can be skewed by buffer delays in the distribution of a clock signal. The skew can be at least approximately linearized by distributing the clock signal in a diagonal fashion across an array of buffers corresponding to ultrasonic transducer controllers. Potential error in beam steering that can arise from clock skew can be corrected based on the linear tilt.

Abstract: Examples herein disclose receiving a basic input output system (BIOS) policy change and authorizing the BIOS policy change. Upon the authorization of the BIOS policy change, a first copy of the BIOS policy is stored in a first memory accessible by a central processing unit. Additionally, a second copy of the BIOS policy change is transmitted for storage in a second memory electrically isolated from the central processing unit.

Abstract: A method, computer program product, and system includes a processor(s) connecting a first computer system to a boot swarm, initiating formation of a peer to peer network. The processor(s) receive a request from a second computer system, a request for a file. The processor(s) configure the second computer system, including implementing a client application hosted from a resource in the first computer system, to facilitate the second computer system joining the peer to peer network. The processor(s) determine immediate peer(s) in the peer to peer network available to provide the file to the second computer system. The processor(s) generate a magnet link that includes a listing of address(es) of the immediate peer(s), ranking address(es) from best source to worst source for downloading the file. The processor(s) provide the second computer system with the magnet link to utilize in downloading the file from a peer.

Abstract: An integrated circuit of an aspect includes a power control unit having an interface to receive an indication that one or more instructions of a first type are to be performed by a core. The power control unit also has logic to control a maximum clock frequency for the core based on the indication that the instructions of the first type are to be performed by the core.

Abstract: A power delivery controller applied to a power converter includes a voltage compensation circuit and a comparator. The voltage compensation circuit is used for generating a compensation reference voltage, receiving a response signal through a universal serial bus type-C cable, and generating a response voltage when an electronic device coupled to the universal serial bus type-C cable generates the response signal corresponding to a Biphase Mark Coding (BMC) signal, wherein the response voltage and the compensation reference voltage have information relative to an internal resistor of the universal serial bus type-C cable. The comparator is used for generating a comparison signal according to the response voltage and the compensation reference voltage, wherein the power converter transmits power to the electronic device according to a specification corresponding to universal serial bus power delivery (USB-PD) after the comparator generates the comparison signal.