Patents Examined by Than Nguyen
  • Patent number: 11216366
    Abstract: A memory controller is to store a unique tag at the mid-point address within each of allocated memory portions. In addition to the tag data, additional metadata may be stored at the mid-point address of the memory allocation. For each memory access operation, an encoded pointer contains information indicative of a size of the memory allocation as well as its own tag data. The processor circuitry compares the tag data included in the encoded pointer with the tag data stored in the memory allocation. If the tag data included in the encoded pointer matches the tag data stored in the memory allocation, the memory operation proceeds. If the tag data included in the encoded pointer fails to match the tag data stored in the memory allocation, an error or exception is generated.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: January 4, 2022
    Assignee: Intel Corporation
    Inventors: David M. Durham, Michael LeMay
  • Patent number: 11209991
    Abstract: Disk based emulation of tape libraries is provided with features that allow easier management and administration of a backup system and also allow increased flexibility to both archive data on tape at a remote location and also have fast restore access to archived data files. Features include automatic emulation of physical libraries, and the retention and write protection of virtual tapes that correspond to exported physical tapes.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: December 28, 2021
    Assignee: Overland Storage, Inc.
    Inventors: Victoria Gonzalez, Sergio Encarnacao
  • Patent number: 11200159
    Abstract: The system receives a request to write data and associated metadata. The system determines a key associated with the data, wherein the key corresponds to an entry in a data structure maintained by a first storage system. The system writes the metadata to a first non-volatile memory of a first set of storage drives of the first storage system by updating the entry with a logical block address for the data and a physical location in a second set of storage drives of a second storage system. The system writes the key and the data to a second non-volatile memory of the second set of storage drives based on the physical location, wherein the first non-volatile memory is of a lower density than the second non-volatile memory.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: December 14, 2021
    Assignee: Alibaba Group Holding Limited
    Inventor: Shu Li
  • Patent number: 11194727
    Abstract: A computer-implemented method, according to one embodiment, includes: identifying block addresses which are associated with a given object, and combining the block addresses to a first set in response to determining that at least one token is currently issued on one or more of the identified block addresses. A first portion of the block addresses is transitioned to a second set, where the first portion includes ones of the block addresses determined as having a token currently issued thereon. Moreover, a second portion of the block addresses is divided into equal chunks, where the second portion includes the block addresses remaining in the first set. The chunks in the first set are allocated across two or more parallelization units. Furthermore, the block addresses in the second set are divided into equal chunks, and the chunks in the second set are allocated to at least one dedicated parallelization unit.
    Type: Grant
    Filed: January 2, 2020
    Date of Patent: December 7, 2021
    Assignee: International Business Machines Corporation
    Inventors: Amey Gokhale, Ranjith R. Nair, Sandeep R. Patil, Sasikanth Eda
  • Patent number: 11188425
    Abstract: Snapshots may be managed on a data storage system including logical storage unit including data portions. For a first logical storage unit, a first snapshot pointer structure may be provided including entries, each entry corresponding to a physical storage location at which data is stored for a data portion of the first logical storage unit at a particular point in time. A first virtual snapshot lookup table may be provided for a first portion of the first logical storage unit, the first virtual snapshot lookup table including a plurality of entries, each entry corresponding to a respective data portion of the first logical storage unit and including a reference to a respective entry of the first snapshot pointer structure. The virtual lookup table may correspond to multiple snapshots of the first logical storage unit that have a same value for each data portion of the at least first portion.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: November 30, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Kevin M. Tobin, Andrew L. Chanler, Michael Ferrari, Jeffrey Wilson
  • Patent number: 11182283
    Abstract: One embodiment provides for a non-transitory machine-readable medium storing instructions to cause one or more processors to perform operations comprising receiving an instruction to dynamically allocate memory for an object of a data type and dynamically allocating memory for the object from a heap instance that is specific to the data type for the object, the heap instance including a memory allocator for the data type, the memory allocator generated at compile time for the instruction based on a specification of the data type for the heap instance.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: November 23, 2021
    Assignee: Apple Inc.
    Inventor: Filip J. Pizlo
  • Patent number: 11182074
    Abstract: Apparatuses and methods for performing concurrent memory access operations for multiple memory planes are disclosed herein. An example method may include receiving first and second command and address pairs associated with first and second plane, respectively, of a memory. The method may further include, responsive to receiving the first and second command and address pairs, providing a first and second read voltages based on first and second page type determined from the first and second command and address pair. The method may further include configuring a first GAL decoder circuit to provide one of the first read voltage or a pass voltage on each GAL of a first GAL bus. The method may further include configuring a second GAL decoder circuit to provide one of the second read level voltage signal or the pass voltage signal on each GAL of a second GAL bus coupled to the second memory plane.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: November 23, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Shantanu R. Rajwade, Pranav Kalavade, Toru Tanzawa
  • Patent number: 11176040
    Abstract: The present application presents a Uniform Memory Access (UMA) network including a cluster of UMA nodes each having at least one UMA memory unit and a server local to the at least one UMA memory unit. A respective UMA memory unit in a respective UMA node comprises persistent memory; non-persistent memory, a node control device operatively coupled to the persistent memory and the non-persistent memory, a local interface for interfacing with the local server in the respective UMA node, and a network interface for interfacing with the UMA network. The node control device is configured to translate between a local unified memory access (UMA) address space accessible by applications running on the local server and a global UMA address space that is mapped to a physical UMA address space. The physical UMA address space includes physical address spaces associated with different UMA nodes in the cluster of UMA nodes.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: November 16, 2021
    Assignee: Netlist, Inc.
    Inventors: Hyun Lee, Junkil Ryu
  • Patent number: 11163456
    Abstract: Provided are a computer program product, system, and method for using mirror indicators to determine whether to mirror tracks in a data set in a primary volume mirrored to a secondary volume. A table is read. The table is maintained by a primary controller managing the primary volume that includes a mirror indicator for each of a plurality of tracks in at least one data set configured in the primary volume indicating whether a track is to be mirrored to the secondary volume. Record sets are read from a cache of the primary controller for the tracks in primary volume having the mirror indicators in the table indicating that the track is to be mirrored. The write data in the read record sets is applied to tracks in the secondary volume mirroring the tracks in the primary volume.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: November 2, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gregory E. McBride, Dash D. Miller, Miguel A. Perez, David C. Reed
  • Patent number: 11151033
    Abstract: A processor includes a plurality of cache memories, and a plurality of processor cores, each associated with one of the cache memories. Each of at least some of the cache memories is associated with information indicating whether data stored in the cache memory is shared among multiple processor cores.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: October 19, 2021
    Assignee: Tilera Corporation
    Inventors: David M. Wentzlaff, Matthew Mattina, Anant Agarwal
  • Patent number: 11151040
    Abstract: An approximate cache system is disclosed. The system includes a quality aware cache controller (QACC), a cache, a quality table configured to receive addresses and a quality specification from the processor associated with each address and further configured to provide the quality specification for each address to the QACC, wherein the QACC controls approximation is based on one or more of i) approximation through partial read operations; ii) approximation through lower read currents; iii) approximation through skipped write operations; iv) approximation through partial write operations; v) approximations through lower write duration; vi) approximation through lower write currents; and vii) approximations through skipped refreshes.
    Type: Grant
    Filed: March 24, 2019
    Date of Patent: October 19, 2021
    Assignee: Purdue Research Foundation
    Inventors: Ashish Ranjan, Swagath Venkataramani, Zoha Pajouhi, Rangharajan Venkatesan, Kaushik Roy, Anand Raghunathan
  • Patent number: 11119742
    Abstract: A system for cache efficient reading of column values in a database is provided. In some aspects, the system performs operations including pre-fetching, asynchronously and in response to a request for data in a column store database system, a plurality of first values associated with the requested data. The request may identify a row of the column store database system associated with the requested data. The plurality of first values may be located in the row. The operations may further include storing the plurality of first values in a cache memory. The operations may further include pre-fetching, asynchronously and based on the plurality of first values, a plurality of second values. The operations may further include storing the plurality of second values in the cache memory. The operations may further include reading, in response to the storing the plurality of second values, the requested data from the cache memory.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: September 14, 2021
    Assignee: SAP SE
    Inventor: Thomas Legler
  • Patent number: 11106385
    Abstract: A method, computer program product, and computing system for receiving a request for an application-consistent snapshot of at least a portion of a storage array. A plurality of I/O operations submitted to the at least a portion of the storage array may be monitored. A pre-defined pattern of I/O operations may be identified from the plurality of I/O operations submitted to the storage array. A snapshot of the at least a portion of the storage array may be generated.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: August 31, 2021
    Assignee: EMC IP Holding Company, LLC
    Inventor: Nagasimha Haravu
  • Patent number: 11106365
    Abstract: An aspect of performing flow control of IO in a synchronous replication session between a local storage and a remote storage of a storage system includes tracking an amount of time an input/output (IO) request is processed at the remote storage including an amount of time the IO request is in transmit to and from the remote storage system. The amount of time indicates a remote latency value. An aspect also includes tracking an amount of time the IO request is processed at the local storage and calculating a difference between the remote latency value and the amount of time the IO request is processed at the local storage. The difference indicates a local latency value. An aspect further includes modifying an amount of IO requests admitted at the storage system as a function of the local latency value.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: August 31, 2021
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Svetlana Kronrod, Anton Kucherov, Vladimir Shveidel, Xiangping Chen
  • Patent number: 11099992
    Abstract: Embodiments include a method performed by a computing device. The method includes (a) receiving a plurality of access requests to access data of a multilayered storage system; (b) in response to determining that a first access request can be served from a top data layer, executing the first access request by accessing the top data layer; (c) in response to determining that a second access request cannot be served from the top data layer, determining whether a current concurrency number of the top data layer is less than a permitted concurrency number (PCN) of the top data layer; and (d) in response to determining that the current concurrency number of the top data layer is not less than the PCN, waiting until the current concurrency number of the top data layer is less than the PCN and then executing the second access request by accessing another data layer below the top layer.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: August 24, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Xinlei Xu, Ruiyong Jia, Liam Xiongcheng Li, Lifeng Yang, Jian Gao
  • Patent number: 11093408
    Abstract: A system and a method of managing storage of cached data objects on a non-volatile memory (NVM) computer storage media including at least one NVM storage device, by at least one processor, may include: receiving one or more data objects having respective Time to Live (TTL) values; storing the one or more data objects and respective TTL values at one or more physical block addresses (PBAs) of the storage media; and performing a garbage collection (GC) process on one or more PBAs of the storage media based on at least one TTL value stored at a PBA of the storage media.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: August 17, 2021
    Assignee: Lightbits Labs Ltd.
    Inventors: Alexander Solganik, Adir Gabai, Shmuel Ben-Yehuda, Eran Kirzner, Abel Alkon Gordon
  • Patent number: 11093395
    Abstract: Provide a computer program product, system, and method for adjusting insertion points used to determine locations in a cache list at which to indicate tracks based on number of tracks added at insertion points. There are a plurality of insertion points to a cache list for the cache having a least recently used (LRU) end and a most recently used (MRU) end. Each insertion point of the insertion points identifies a track in the cache list. A plurality of tracks are indicated at positions in the cache list with respect to insertion points. For each track indicated at an insertion point of the insertion points, at least one insertion point counter for at least one insertion point with respect to the insertion point at which the track is indicated is incremented. A plurality of the insertion points are adjusted to point to different tracks in the cache list based on insertion point counters for the insertion points.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: August 17, 2021
    Assignee: International Business Machines Corporation
    Inventors: Lokesh M. Gupta, Kyler A. Anderson, Kevin J. Ash, Matthew J. Kalos
  • Patent number: 11093142
    Abstract: Whether a replication relationship is established between a first and a second storage device is determined. If it is determined that the replication relationship is established between the first and second storage device, then whether data in the first region of the first storage device has changed since a previously completed asynchronous data replication process is determined. If the data in the first region of the first storage device has changed since the previously completed asynchronous data replication process, then whether the changed data in the first storage device is data copied from the second region of the first storage device is determined. If the changed data in the first region of the first storage device is data copied from the second region of the first storage device, then data from the second region of the second storage device is replicated to the first region of the second storage device.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: August 17, 2021
    Assignee: International Business Machines Corporation
    Inventors: Manish Bansode, Shrirang S. Bhagwat, Pankaj Deshpande, Subhojit Roy
  • Patent number: 11093341
    Abstract: Methods and systems for data auto-tiering are disclosed. According to some embodiments, the method receives a multiplicity of data streams. For each data stream, the method detects a data change within the data stream. The method further determines a magnitude of the data change. The method further assigns a tier level to the data stream based on the magnitude of the data change.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: August 17, 2021
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Mahesh Reddy A V, Pradeep Viveki, Mahantesh Ambaljeri
  • Patent number: 11086728
    Abstract: The invention provides a method for transmitting insulator on-site monitoring data backup, comprising establishing connections between CPU and communication module, and between communication module and backup terminal, such that leak current data of horizontal and inclined insulators, and environmental humidity data are transmitted to backup terminal for storage to perform the backup; the number of CPUs matches that of backup terminals; each CPU is connected with all backup terminals through a corresponding communication module; CPU is also connected with flash memory. By incorporating other structures and methods, the invention effectively solves the problems in the existing data transmission mode that the data volume of data transmission in a set time and effect of transmission capacity of the communication module on data transmission, i.e.
    Type: Grant
    Filed: December 8, 2019
    Date of Patent: August 10, 2021
    Assignee: Nanjing Institute of Railway Technology
    Inventors: Qihou Song, Honggao Feng, Baichuan Xu