Patents Examined by Thanh T. Nguyen
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Patent number: 11811889Abstract: Systems and methods are disclosed herein to provide information to a user based on a communication from a user associated with multiple media assets. Based on the schedule of the media assets, one is selected and recommended to the user.Type: GrantFiled: December 22, 2022Date of Patent: November 7, 2023Assignee: ROVI GUIDES, INC.Inventors: Timothy Christensen Kelly, Benjamin Maughan, Brian Peterson, David Yon, Walter R. Klappert
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Patent number: 11810817Abstract: A semiconductor structure including a self-assembled monolayer for enhancing metal-dielectric adhesion and preventing metal diffusion is provided. The semiconductor structure includes a substrate and a first dielectric layer on the substrate. A contact structure is embedded in the first dielectric layer and includes a conductive line. The semiconductor structure further includes a self-assembled monolayer on the conductive line, and a second dielectric layer on the first dielectric layer and the conductive line. The self-assembled monolayer is chemically bonded to the conductive line and the second dielectric layer.Type: GrantFiled: October 14, 2020Date of Patent: November 7, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Zhen Yu Guan, Hsun-Chung Kuang
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Patent number: 11805012Abstract: A method includes updating a cloud networking environment from a first network mechanism driver to a second network mechanism driver and identifying a configuration of one or more resources of the cloud networking environment associated with the first network mechanism driver. The method further includes determining one or more features of the configuration of the one or more resources that are incompatible with the second network mechanism driver and updating the one or more features of the configuration of the one or more resources to be compatible with the second network mechanism driver.Type: GrantFiled: October 28, 2021Date of Patent: October 31, 2023Assignee: Red Hat, Inc.Inventors: Eran Kuris, Arie Bregman
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Patent number: 11804538Abstract: A method of forming a high electron mobility transistor (HEMT) includes a first III-V compound layer and a second III-V compound layer disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A source feature and a drain feature are disposed on the second III-V compound layer. A p-type layer is disposed on a portion of the second III-V compound layer between the source feature and the drain feature. A gate electrode is disposed on the p-type layer. A capping layer is disposed on the second III-V compound layer.Type: GrantFiled: May 26, 2021Date of Patent: October 31, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chun-Wei Hsu, Jiun-Lei Jerry Yu, Fu-Wei Yao, Chen-Ju Yu, Fu-Chih Yang, Chun Lin Tsai
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Patent number: 11800816Abstract: Methods and devices based on the use of dopant-modulated etching are described. During fabrication, a memory storage element of a memory cell may be non-uniformly doped with a dopant that affects a subsequent etching rate of the memory storage element. After etching, the memory storage element may have an asymmetric geometry or taper profile corresponding to the non-uniform doping concentration. A multi-deck memory device may also be formed using dopant-modulated etching. Memory storage elements on different memory decks may have different taper profiles and different doping gradients.Type: GrantFiled: October 13, 2020Date of Patent: October 24, 2023Assignee: Micron Technology, Inc.Inventors: Innocenzo Tortorelli, Mattia Robustelli
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Patent number: 11798910Abstract: The present disclosure relates to a semiconductor structure including an interconnect structure disposed over a semiconductor substrate. A lower metal line is disposed at a first height over the semiconductor substrate and extends through a first interlayer dielectric layer. A second interlayer dielectric layer is disposed at a second height over the semiconductor substrate and comprises a first dielectric material. An upper metal line is disposed at a third height over the semiconductor substrate. A via is disposed at the second height. The via extends between the lower metal line and the upper metal line. A protective dielectric structure is disposed at the second height. The protective dielectric structure comprises a protective dielectric material and is disposed along a first set of opposing sidewalls of the via, the protective dielectric material differing from the first dielectric material.Type: GrantFiled: July 20, 2022Date of Patent: October 24, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsin-Chieh Yao, Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Yu-Teng Dai, Wei-Hao Liao
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Patent number: 11792072Abstract: A request to execute a workload is received from a client device. The request includes identification information associated with one or more containers of multiple containers supported by one or more host systems of multiple host systems, where the one or more containers are to execute the workload. Corresponding communication endpoints associated with the one or more containers are identified in view of the identification information. One or more network connections are configured between the corresponding communication endpoints of the one or more containers and the client device while bypassing configuring other network connections between other containers of the multiple containers and the one or more containers and further network connections between the one or more containers that do not communicate with one another when executing the workload.Type: GrantFiled: May 19, 2021Date of Patent: October 17, 2023Assignee: Red Hat, Inc.Inventors: Anil Kumar Vishnoi, Balaji Gargeshwari Varadaraju
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Patent number: 11792285Abstract: Implementations are described which provide for recipient-based filtering of an event that relates to a topic to which consumers are subscribed. Responsive to determining that an attribute of the event includes a set of one or more identifiers for intended recipients for the event, the event is delivered to consumers that correspond to the intended recipients. Alternatively, responsive to determining that the attribute of the event does not include a set of one or more identifiers for intended recipients for the event, the event is delivered to all of the consumers subscribed to the topic to which the event relates.Type: GrantFiled: May 4, 2021Date of Patent: October 17, 2023Assignee: Salesforce, Inc.Inventors: Sivananda Reddy Thummala Abbigari, Lawrence Eugenio McAlpin, Vikram Kommaraju, John Arlan Brock, Soumen Bandyopadhyay
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Patent number: 11791283Abstract: A method of manufacturing a semiconductor device packaging panel is provided. The method includes forming a panel having an active side and a backside. The panel includes a plurality of semiconductor die encapsulated with an encapsulant. An active surface of the semiconductor die is exposed on the active side of the panel. A warpage control carrier is attached onto the backside of the panel. The warpage control carrier includes an electroactive element configured for substantially flattening the panel while a control voltage is applied to the electroactive element.Type: GrantFiled: April 14, 2021Date of Patent: October 17, 2023Assignee: NXP USA, INC.Inventors: Scott M. Hayes, Michael B. Vincent, Zhiwei Gong, Richard Te Gan, Vivek Gupta
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Patent number: 11784254Abstract: A method of fabricating a semiconductor device includes providing a substrate including a semiconductor material having a first lattice constant and then patterning the substrate to form a first semiconductor pattern extending in a first direction. A second semiconductor pattern is also formed on and in contact with the first semiconductor pattern. The second semiconductor pattern extends in the first direction and has a second lattice constant that is sufficiently greater than the first lattice constant so that lattice stress is present at an interface between the first semiconductor pattern and the second semiconductor pattern. The second semiconductor pattern is further patterned to define a sidewall of the second semiconductor pattern that extends in a second direction intersecting the first direction. A gate electrode is formed, which extends in the first direction on the second semiconductor pattern.Type: GrantFiled: December 22, 2021Date of Patent: October 10, 2023Inventor: Hoon-Sung Choi
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Patent number: 11774049Abstract: A light source device includes a substrate, a plurality of light sources arranged on the substrate, a light transmissive member arranged over the light sources, and a light-reflecting pattern. The light-reflecting pattern is arranged above or below the light transmissive member such that a thickness and/or a concentration of material of the light-reflecting pattern in a first region directly above one of the light sources is greater than the thickness and/or the concentration of material of the light-reflecting pattern in a second region above a portion between adjacent ones of the light sources.Type: GrantFiled: April 27, 2021Date of Patent: October 3, 2023Assignee: NICHIA CORPORATIONInventors: Atsushi Yamamoto, Takeshi Tamura
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Patent number: 11770429Abstract: A system and a method for media streaming from multiple sources are disclosed. A content requesting client device accesses a server to receive a list of available sources that may include multiple Content Delivery Networks (CDNs) and independent servers. Based on a pre-set criteria, such as the source delivery performance and cost, the client device partitions the content into parts, allocates a source to each part, and simultaneously receives media streams of the content parts from the allocated sources. The server may be a Video-on-Demand (VOD) server, and the content may be a single file of a video data, such as a movie. The delivery performance of the used sources is measured during the streaming for updating the partition or the allocation. The updated measured performance may be stored locally at the client device, or at a server for use by other clients. The client actions may be implemented as a client-side script.Type: GrantFiled: April 27, 2021Date of Patent: September 26, 2023Assignee: BRIGHT DATA LTD.Inventors: Derry Shribman, Ofer Vilenski
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Patent number: 11769736Abstract: Apparatuses and methods for manufacturing chips are described. An example method includes: forming at least one first dielectric layer above a substrate; forming at least one second dielectric layer above the first dielectric layer; forming a cover layer above the at least one second dielectric layer; forming a groove above the substrate by etching; covering at least an edge surface of the at least one first dielectric layer in the groove with a liner including polymer; forming a hole through the cover layer and a portion of the at least one second dielectric layer; depositing a conductive layer in the hole, on the cover layer and the liner; and forming a conductive pillar on the conductive layer in the hole by electroplating.Type: GrantFiled: April 14, 2021Date of Patent: September 26, 2023Assignee: Micron Technology, Inc.Inventors: Hidenori Yamaguchi, Keizo Kawakita, Wataru Hoshino, Yuta Nomura
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Patent number: 11756884Abstract: An interconnect structure includes dielectric layer, a first conductive feature, a second conductive feature, a third conductive feature, and a dielectric fill. The first conductive feature is disposed in the dielectric layer. The second conductive feature is disposed over the first conductive feature. The second conductive feature includes a first conductive layer disposed over the first conductive feature, a second conductive layer disposed on the first conductive layer, and a third conductive layer disposed on the second conductive layer. The first conductive layer, the second conductive layer and the third conductive layer have substantially the same width. The third conductive feature is disposed over the dielectric layer. The dielectric fill is disposed over the dielectric layer between the second conductive feature and the third conductive feature.Type: GrantFiled: May 6, 2021Date of Patent: September 12, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Wei-Hao Liao, Hsi-Wen Tien, Yu-Teng Dai, Chih Wei Lu, Hsin-Chieh Yao, Chung-Ju Lee
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Patent number: 11757961Abstract: A system and a method for media streaming from multiple sources are disclosed. A content requesting client device accesses a server to receive a list of available sources that may include multiple Content Delivery Networks (CDNs) and independent servers. Based on a pre-set criteria, such as the source delivery performance and cost, the client device partitions the content into parts, allocates a source to each part, and simultaneously receives media streams of the content parts from the allocated sources. The server may be a Video-on-Demand (VOD) server, and the content may be a single file of a video data, such as a movie. The delivery performance of the used sources is measured during the streaming for updating the partition or the allocation. The updated measured performance may be stored locally at the client device, or at a server for use by other clients. The client actions may be implemented as a client-side script.Type: GrantFiled: June 15, 2021Date of Patent: September 12, 2023Assignee: BRIGHT DATA LTD.Inventors: Derry Shribman, Ofer Vilenski
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Patent number: 11757712Abstract: Techniques are provided for configuring management IP addresses to network devices in a data center that have management capabilities. Based on a received request to configure a managed network device in a network, a first connection is established between a management station and a managed switch to which the managed network device is connected. A network identifier of the managed network device is retrieved from the managed switch using the established first connection. Using the retrieved network identifier, a link-local address of the managed network device is derived. A second connection is established between the management station and the managed network device based on the derived link-local address. The management IP addresses of the managed network device are configured using the second connection.Type: GrantFiled: November 18, 2022Date of Patent: September 12, 2023Assignee: Hewlett Packard Enterprise Development LPInventor: Ramakrishnan Thanabalan
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Patent number: 11756792Abstract: Transistors having a control gate isolated from a first region of semiconductor material having a first conductivity type, first and second source/drain regions having a second conductivity type different than the first conductivity type and formed in the first region of semiconductor material, and a second region of semiconductor material having the first conductivity type in contact with the first region of semiconductor material, wherein the first region of semiconductor material is between the control gate and the second region of semiconductor material, wherein the first region of semiconductor material has a first width, and wherein the second region of semiconductor material has a second width, less than or equal to the first width, as well as memory containing such transistors.Type: GrantFiled: June 12, 2020Date of Patent: September 12, 2023Assignee: Micron Technology, Inc.Inventors: Michael Violette, Vladimir Mikhalev
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Patent number: 11750482Abstract: A method of collecting health check metrics for a network is provided. The method, at a deep packet inspector on a physical host in a datacenter, receives a copy of a network packet from a load balancer. The packet includes a plurality of layers. Each layer corresponds to a communication protocol in a plurality of communication protocols. The method identifies an application referenced in the packet. The method analyzes the information in one or more layers of the packet to determine metrics for the source application. The method sends the determined metrics to the load balancer.Type: GrantFiled: May 28, 2021Date of Patent: September 5, 2023Assignee: NICIRA, INC.Inventors: Alok S. Tiagi, Jayant Jain, Anirban Sengupta, Srinivas Nimmagadda, Rick Lund
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Patent number: 11742320Abstract: Alignment of devices formed on substrates that are to be bonded may be achieved through the use of scribe lines between the devices, where the scribe lines progressively increase or decrease in size from a center to an edge of one or more of the substrates to compensate for differences in the thermal expansion rates of the substrates. The devices on the substrates are brought into alignment as the substrates are heated during a bonding operation due to the progressively increased or decreased sizes of the scribe lines. The scribe lines may be arranged in a single direction in a substrate to compensate for thermal expansion along a single axis of the substrate or may be arranged in a plurality of directions to compensate for actinomorphic thermal expansion.Type: GrantFiled: March 11, 2021Date of Patent: August 29, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsi-Cheng Hsu, Jui-Chun Weng, Ching-Hsiang Hu, Ji-Hong Chiang, Kuo-Hao Lee, Chia-Yu Lin, Chia-Chun Hung, Yen-Chieh Tu, Chien-Tai Su, Hsin-Yu Chen
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Patent number: 11735515Abstract: A semiconductor monolithic IC includes a semiconductor substrate having a rectangular shape in plan view, multiple chiplets each comprising a circuit, wherein the multiple chiplets are disposed over the semiconductor substrate and are separated from each other by die-to-die spaces filled with a dielectric material, and a plurality of conductive connection patterns electrically connecting the multiple chiplets so that a combination of the circuit of the multiple chiplet function as one functional circuit. The chip region has a larger area than a maximum exposure area of a lithography apparatus used to fabricate the first and second circuits.Type: GrantFiled: January 29, 2021Date of Patent: August 22, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Murat Kerem Akarvardar, Hon-Sum Philip Wong