Abstract: An organic light emitting display device comprises a partition wall formed on a bank that covers a portion of an auxiliary electrode. The organic light emitting display device includes a first electrode, an auxiliary electrode, a first bank, and a partition wall. The first electrode may be connected to a driving transistor, and the auxiliary electrode may be disposed on the same layer as the first electrode. The first bank may cover a portion of the first electrode and a portion of the auxiliary electrode. A portion of a bottom surface of the partition wall may contact a top surface of the first bank, and the other portion except the portion of the bottom surface may be disposed on the auxiliary electrode.

Abstract: Diode includes first metal layer, coupled to p-type III-N layer and to first terminal, has a substantially equal lateral size to the p-type III-N layer. Central portion of light emitting region on first side and first metal layer includes first via that is etched through p-type portion, light emitting region and first part of n-type III-N portion. Second side of central portion of light emitting region that is opposite to first side includes second via connected to first via. Second via is etched through second part of n-type portion. First via includes second metal layer coupled to intersection between first and second vias. Electrically-insulating layer is coupled to first metal layer, first via, and second metal layer. First terminals are exposed from electrically-insulating layer. Third metal layer including second terminal is coupled to n-type portion on second side of light emitting region and to second metal layer through second via.

Abstract: A semiconductor device is provided that includes an n-type field effect transistor including a plurality of vertically stacked silicon-containing nanowires located in one region of a semiconductor substrate, and a p-type field effect transistor including a plurality of vertically stacked silicon germanium alloy nanowires located in another region of a semiconductor substrate. Each vertically stacked silicon-containing nanowire of the n-type field effect transistor has a different shape than the shape of each vertically stacked silicon germanium alloy nanowire of the p-type field effect transistor.

Abstract: A directed epitaxial heterojunction bipolar transistor (HBT) structure is directly or indirectly formed on a GaAs substrate that is formed by a (100) face towards a (111)B face with an angle of inclination between 0.6° and 25°, and includes a sub-collector layer, a collector, a base layer, an emitter layer, an emitter cap layer and an ohmic contact layer, which are sequentially formed on the substrate. A tunnel collector layer formed by InGaP or InGaAsP is provided between the collector layer and the base layer. Since an epitaxial process is performed on the substrate from a (100) face towards a (111)B face with an angle of inclination between 0.6° and 25°, indium and gallium contained in InGaP or InGaAsP are affected by the ordering effect such that InGaP or InGaAsP used in the emitter layer and/or the tunnel collector layer has a higher electron affinity or a smaller bandgap.

Abstract: A nitride semiconductor light-emitting device with periodic gain active layers includes an n-type semiconductor layer, a p-type semiconductor layer and a resonator. The device further includes a plurality of active layers disposed between the n-type and p-type semiconductor layers so as to correspond to a peak intensity position of light existing in the resonator and at least one interlayer disposed between the active layers. The active layer disposed at the p-type semiconductor layer side has a larger light emission intensity than the active layer disposed at the n-type semiconductor layer side.

Abstract: The present invention provides an array substrate, a manufacturing method thereof, and a display device, belonging to the field of organic electroluminescence display technology, which may solve the problem of low light extraction efficiency of existing array substrates. The array substrate of the present invention comprises an organic light emitting device and a planarization layer disposed therebelow, the OLED comprises: a first electrode layer, a second electrode layer, and a light-emitting layer disposed between the first electrode layer and the second electrode layer, the first electrode layer is a transparent electrode layer and disposed on the planarization layer, and the planarization layer is doped with metal micro/nanoparticles.

Abstract: Embodiments of the present disclosure describe phase-change memory cell implant for dummy array leakage reduction. In an embodiment, an apparatus includes a plurality of phase-change memory (PCM) elements, wherein individual PCM elements of the plurality of PCM elements are dummy cells including a bottom electrode layer, a select device layer disposed on the bottom electrode layer, a middle electrode layer disposed on the select device layer, a phase-change material layer disposed on the middle electrode layer, and a top electrode layer disposed on the phase-change material layer, wherein the phase-change material layer is doped with an impurity to reduce cell leakage of the dummy cells. Other embodiments may be described and/or claimed.

Abstract: An apparatus for and a method of bonding a first substrate and a second substrate are provided. In an embodiment a first wafer chuck has a first curved surface and a second wafer chuck has a second curved surface. A first wafer is placed on the first wafer chuck and a second wafer is placed on a second wafer chuck, such that both the first wafer and the second wafer are pre-warped prior to bonding. Once the first wafer and the second wafer have been pre-warped, the first wafer and the second wafer are bonded together.

Abstract: The present disclosure provides an FET structure including a transistor of a first conductive type. The transistor includes a substrate having a region of a second conductive type, a channel between source and drain, and a gate over the channel. The channel includes dopants of the first conductive type. The gate includes a work function setting layer of the second conductive type. The present disclosure also provides a method for manufacturing an FET with multi-threshold voltages scheme. The method includes exposing channels of a first transistor of a first conductive type and a first transistor of a second conductive type from a first mask, doping the channels with dopants of the first conductive type, exposing channels of a second transistor of the first conductive type and a second conductive type from a second mask, and doping the channels with dopants of the second conductive type.

Abstract: The present invention relates to the field of display technology, and particularly to a display panel and a display device comprising the display panel. The display panel comprises a substrate, which is divided into a plurality of sub-pixel areas, each of which comprises a thin film transistor and an organic light-emitting diode device provided above the thin film transistor, wherein, a pixel define layer and a conductive layer are provided above the thin film transistor and below the organic light-emitting diode device, the pixel define layer is used for defining a light-transmissive region and a non-light-transmissive region of the sub-pixel area, an upper surface of the conductive layer and an upper surface of the pixel define layer are in the same plane, and the conductive layer is electrically connected to a drain of the thin film transistor.

Abstract: In a camera module, a planar part, which is for mitigating deformation of the surface of a second insulating portion on which an imaging device is mounted, is embedded in the second insulating portion of a substrate so as to face the imaging device mounted on the surface (top surface) of the second insulating portion.

Abstract: Disclosed is a display device that may include a pixel electrode formed on source and drain electrodes, the pixel electrode electrically connected with the drain electrode, and a first protection electrode formed on a second metal pattern, the first protection electrode electrically connected with the second metal pattern and at least partially covering the second metal pattern; and a connection electrode formed on a passivation film, the connection electrode connected with a first metal pattern through a first contact hole, and connected with the first protection electrode through a second contact hole, wherein the first protection electrode is formed of the same material as that of the pixel electrode.

Abstract: A light-emitting device includes a support including a substrate, a pair of electrodes and an insulating reflective member, the pair of electrodes being disposed on an upper surface of the substrate, and the reflective member being disposed on the substrate, a light-emitting element flip-chip mounted on the pair of electrodes, and a resin member disposed at least between the light-emitting element and the reflective member, the resin member including a conductive substance which electrically connects the light-emitting element to the pair of electrodes, the reflective member being disposed at least over an entirety of a surface that is located immediately below the resin member.

Abstract: A disclosed magnetic memory element includes: a magnetization free layer formed of a ferromagnetic substance having perpendicular magnetic anisotropy; a response layer provided so as to be opposed to the magnetization free layer and formed of a ferromagnetic substance having perpendicular magnetic anisotropy; a non-magnetic layer provided so as to be opposed to the response layer on a side opposite to the magnetization free layer and formed of a non-magnetic substance; and a reference layer provided so as to be opposed to the non-magnetic layer on a side opposite to the response layer and formed of a ferromagnetic substance having perpendicular magnetic anisotropy. The magnetization free layer includes a first magnetization fixed region and a second magnetization fixed region which have magnetization fixed in directions antiparallel to each other, and a magnetization free region in which a magnetization direction is variable.

Abstract: Embodiments of mechanisms for forming a package are provided. The package includes a substrate and a contact pad formed on the substrate. The package also includes a conductive pillar bonded to the contact pad through solder formed between the conductive pillar and the contact pad. The solder is in direct contact with the conductive pillar.

Abstract: A thin film transistor, a method of manufacturing the thin film transistor, and a display device including the thin film transistor are provided. The thin film transistor comprises a gate electrode formed on the oxide semiconductor layer such that a first surface of the oxide semiconductor layer faces the gate electrode. A source electrode and a drain electrode are electrically connected to the oxide semiconductor layer, respectively. The oxide semiconductor layer, gate electrode, source electrode and drain electrode are arranged in a coplanar transistor configuration. A light-blocking element is also arranged to shield a second surface of the oxide semiconductor layer from external light.

Abstract: The present invention provides an organic light emitting diode array substrate, and a display device, which belongs to the field of display technology, and can solve the problem that the sub-pixels of different colors in the existing organic light emitting diode array substrate have different life times.

Abstract: A method and system for providing a magnetic junction usable in a magnetic device are described. The magnetic junction includes a reference layer, a nonmagnetic spacer layer and a free layer. The nonmagnetic spacer layer is between the reference layer and the free layer. The free layer has a gradient in a magnetic ordering temperature such that a first portion of the free layer has a first magnetic ordering temperature higher than a second magnetic ordering temperature of a second portion of the free layer. The first portion of the free layer is closer to the reference layer than the second portion of the free layer. The magnetic junction is configured such that the free layer is switchable between stable magnetic states when a write current is passed through the magnetic junction.

Abstract: Disclosed is an organic light emitting display device including an anode, a cathode, a plurality of organic layers and a partition member. The plurality of organic layers is disposed between the anode and the cathode, where at least one layer is separated to minimize current leakage into neighboring pixels. The partition member is disposed between the neighboring pixels and configured to separate the plurality of organic layers. The least one separated layer includes a charge generation layer. Because at least one layer is separated, current leakage into neighboring pixels can be minimized. Accordingly, defects resulting from light leakage and the mixing of colors of light from neighboring pixels may be reduced and display quality is enhanced.

Abstract: Embodiments of cleaning a surface of a polysilicon layer during a chemical mechanical polishing (CMP) process are provided. The method includes providing a substrate, and forming a gate structure on the substrate, and the gate structure includes a polysilicon layer. The method further includes forming an inter-layer dielectric layer (ILD) over the gate structure. The method also includes performing a CMP process to planarize the inter-layer dielectric layer (ILD) and to expose the polysilicon layer, and the CMP process includes: providing an oxidation solution to a surface of the substrate to perform an oxidation operation to form an oxide layer on the polysilicon layer; and providing a cleaning solution to the surface of the substrate to perform a cleaning operation.