Abstract: The present invention makes it possible, in a manufacturing process of a semiconductor device, to inhibit: impurities from diffusing from a substrate to a semiconductor layer; and the withstand voltage of a transistor from deteriorating. In the present invention, a first electrically conductive type epitaxial layer is formed over a first electrically conductive type base substrate. The impurity concentration of the epitaxial layer is lower than that of the base substrate. A second electrically conductive type first embedded layer and a second electrically conductive type second embedded layer are formed in the epitaxial layer. The second embedded layer is deeper than the first embedded layer, is kept away from the first embedded layer, and has an impurity concentration lower than the first embedded layer. A transistor is further formed in the epitaxial layer.

Abstract: A method of forming an improved field-effect transistor device is provided. The method includes forming a tensile stressor near a first semiconductor fin. The first semiconductor fin is a fin of an n-channel field-effect transistor. The n-channel field-effect transistor is formed on a substrate. The method also includes forming a compressive stressor near a second semiconductor fin. The second semiconductor fin is a fin of a p-channel field effect transistor. The p-channel field-effect transistor is formed on the substrate. The method can also include forming neutral material over the at least one n-channel and p-channel field effect transistor. The method can also include achieving different device performance by configuring a stressor distance to fin and/or by configuring a stressor volume.

Abstract: A light guide grid can include a grid structure having a plurality of intersecting grid lines, each grid line having a width w, and a plurality of openings for photosensor elements between intersecting grid lines. The grid structure has a diagonal grid width between two adjacent ones of the plurality of openings in a diagonal direction. The diagonal grid width has a value exceeding approximately ?3 w. An image sensor can include a light guide grid having a grid structure as described above and further include a micro-lens such as a sinking micro-lens and a color filter. A method of fabricating a light guide grid can include forming a grid above at least one photo sensor, the grid having intersecting grid lines of width w and a diagonal grid width in a diagonal direction having a value exceeding approximately ?3 w.

Abstract: A chip contact pad and a method of making a chip contact pad are disclosed. An embodiment of the present invention includes forming a plurality of contact pads over a workpiece, each contact pad having lower sidewalls and upper sidewalls and reducing a lower width of each contact pad so that an upper width of each contact pad is larger than the lower width. The method further includes forming a photoresist over the plurality of contact pads and removing portions of the photoresist thereby forming sidewall spacers along the lower sidewalls.

Abstract: A device includes a semiconductor substrate, a contact plug over the semiconductor substrate, and an Inter-Layer Dielectric (ILD) layer over the semiconductor substrate, with the contact plug being disposed in the ILD. An air gap is sealed by a portion of the ILD and the semiconductor substrate. The air gap forms a full air gap ring encircling a portion of the semiconductor substrate.

Abstract: Embodiments relate to use of a particle accelerator beam to form thin films of material from a bulk substrate. In particular embodiments, a bulk substrate (e.g. donor substrate) having a top surface is exposed to a beam of accelerated particles. In certain embodiments, this bulk substrate may comprise GaN; in other embodiments this bulk substrate may comprise Si, SiC, or other materials. Then, a thin film or wafer of material is separated from the bulk substrate by performing a controlled cleaving process along a cleave region formed by particles implanted from the beam. In certain embodiments this separated material is incorporated directly into an optoelectronic device, for example a GaN film cleaved from GaN bulk material. In some embodiments, this separated material may be employed as a template for further growth of semiconductor materials (e.g. GaN) that are useful for optoelectronic devices.

Abstract: A structure and method of making a semiconductor device includes a single-gated vertical field effect transistor (VFET), that has a first fin on a first bottom source/drain region, a gate of a first work force metal (WFM) surrounding the first fin, and a single gate contact connected to the first WFM. Also included is a double-gated VFET, that has a second fin on a second bottom source/drain region, a first gate of the first WFM disposed on a first side of the second fin, a second wider gate of a second WFM disposed on a second side of the second fin, a first gate contact contacting the first narrow gate, and a second gate contact contacting the second wider gate of the second WFM on the second side.

Abstract: The performances of a semiconductor device are improved. A semiconductor device has a photodiode and a transfer transistor formed in a pixel region. Further, the semiconductor device has a second transistor formed in a peripheral circuit region. The transfer transistor includes a first gate electrode, and a film part formed of a thick hard mask film formed over the first gate electrode. The second transistor includes a second gate electrode, source/drain regions, silicide layers formed at the upper surface of the second gate electrode, and the upper surfaces of the source/drain regions.

Abstract: A field-effect transistor includes a substrate; a source electrode, a drain electrode, and a gate electrode that are formed on the substrate; a semiconductor layer by which a channel is formed between the source electrode and the drain electrode when a predetermined voltage is applied to the gate electrode; and a gate insulating layer provided between the gate electrode and the semiconductor layer. The gate insulating layer is formed of an amorphous composite metal oxide insulating film including one or two or more alkaline-earth metal elements and one or two or more elements selected from a group consisting of Ga, Sc, Y, and lanthanoid except Ce.

Abstract: The amount of water and hydrogen contained in an oxide semiconductor film is reduced, and oxygen is supplied sufficiently from a base film to the oxide semiconductor film in order to reduce oxygen deficiencies. A stacked base film is formed, a first heat treatment is performed, an oxide semiconductor film is formed over and in contact with the stacked base film, and a second heat treatment is performed. In the stacked base film, a first base film and a second base film are stacked in this order. The first base film is an insulating oxide film from which oxygen is released by heating. The second base film is an insulating metal oxide film. An oxygen diffusion coefficient of the second base film is smaller than that of the first base film.

Abstract: A display device according to the invention includes: a first substrate that includes a flexible substrate, is segmented into a display area and a non-display area outside the display area, and includes a thin film transistor and an electroluminescent light-emitting element formed on the display area of the flexible substrate; and an IC chip that is bonded on the non-display area of the first substrate via an anisotropic conductive film, wherein the first substrate includes, between the flexible substrate and the anisotropic conductive film, at least one or more support layers whose plan view shape is larger than that of the IC chip and whose hardness is higher than that of the flexible substrate, and the IC chip is located inside the at least one or more support layers in a plan view.

Abstract: A display device includes: a lower substrate comprising an active area, and a peripheral area outside the active area; a thin film transistor layer on the lower substrate; a plurality of pixel electrodes on the thin film transistor layer and in the active area; an encapsulating portion on the pixel electrode and encapsulating the pixel electrode; and a pattern layer comprising a plurality of patterns on the encapsulating portion, wherein the encapsulating portion covers a first area of the lower substrate and exposes a second area outside the first area, and the pattern layer comprises a crack preventing portion at the peripheral area.

Abstract: An integrated circuit is produced on a bulk semiconductor substrate in a given CMOS technology and includes a semiconductor device for protection against electrostatic discharges. The semiconductor device has a doublet of floating-gate, thyristors coupled in parallel and head-to-tail. Each thyristor has a pair of electrode regions. The two thyristors respectively have two separate gates and a common semiconductor gate region. The product of the current gains of the two transistors of each thyristor is greater than 1. Each electrode region of at least one of the thyristors has a dimension, measured perpendicularly to the spacing direction of the two electrodes of the corresponding pair, which is adjusted so as to impart to the thyristor an intrinsic triggering voltage less than the breakdown voltage of a transistor to be protected, and produced in the CMOS technology.

Abstract: A super junction includes a substrate and an epitaxial layer over the substrate, the epitaxial layer having a first dopant type. The super junction further includes an angled trench in the epitaxial layer, the angled trench having sidewalls disposed at an angle ranging from about 85-degrees to about 89-degrees with respect to a top surface of the epitaxial layer. The super junction further includes a doped body in the epitaxial layer surrounding the angled trench, the doped body having a second dopant type, the second dopant type opposite that of the first dopant type.

Abstract: A plurality of semiconductor fins is formed on a surface of an insulator layer. Gate structures are then formed that are orientated perpendicular and straddle each semiconductor fin. A dielectric spacer is then formed on vertical sidewalls of each gate structure. Next, an etch is performed that removes exposed portions of each semiconductor fin and a portion of the insulator layer not protected by the dielectric spacers and the gate structures. The etch provides semiconductor fin portions that have exposed vertical sidewalls. A doped semiconductor material is then formed from each exposed vertical sidewall of each semiconductor fin portion, followed by an anneal which causes diffusion of dopants from the doped semiconductor material into each semiconductor fin portion and the formation of source/drain regions. The source/drain regions are present along the sidewalls of each semiconductor fin portion and are located beneath the dielectric spacers.

Abstract: InGaN-based light-emitting devices fabricated on an InGaN template layer are disclosed.

Abstract: A display substrate having a black matrix with a curved surface, a method for manufacturing the same and a display device are provided. The display substrate includes a black matrix disposed between adjacent pixels, wherein a sidewall of the black matrix is a concave curved surface. During the formation of a color film, since the sidewall of the black matrix is formed as a concave curved surface, color film droplets in one sub-pixel may return into the sub-pixel along the curved surface while splashing to the sidewall of the black matrix, thereby the contamination to adjacent pixels caused by the droplets splashing may be avoided, and a yield of the substrate may be ensured.

Abstract: According to an exemplary embodiment, a method of forming a vertical structure is provided. The method includes the following operations: providing a substrate; providing the vertical structure with a source and a channel over the substrate; forming a spacer over the vertical structure; etching a portion of the spacer to expose the source; forming a first metal layer over the vertical structure; and thermal annealing the first metal layer to form a bottom silicide penetrating the source; and substantially removing the spacer.

Abstract: An organic light emitting display device includes a substrate; an anode electrode on the substrate; an auxiliary electrode on the substrate in a same layer as the anode electrode; a partition supporter on the auxiliary electrode; a partition on the partition supporter; an organic emitting layer on the anode electrode and on the partition such that portions separated on the partition are separated from other portions; and a cathode electrode connected with the organic emitting layer and the auxiliary electrode. A lower surface of the partition supporter includes a pair of short sides; and a pair of long sides connecting the pair of short sides and including at least one inclined surface.

Abstract: An organic light emitting display device includes: a substrate; a semiconductor on the substrate and including a switching channel of a switching transistor and a driving channel of a driving transistor, wherein the switching transistor and the driving transistor are spaced; a first insulating layer covering the semiconductor; a switching gate electrode on the first insulating layer and overlapped with the switching channel and a driving gate electrode on the first insulating layer and overlapped with the driving channel; a second insulating layer covering the switching gate electrode and the driving gate electrode; a data line on the second insulating layer and configured to transmit a data signal, a driving voltage line on the second insulating layer and configured to transmit a driving voltage; a passivation layer; a pixel electrode on the passivation layer; and a pixel connecting member on the passivation layer.