Patents Examined by Thuan Du
  • Patent number: 9870042
    Abstract: A processing apparatus for managing power based on data is provided. The processing apparatus may obtain, in response to an access request from a processor for particular data stored in a memory, existing power information having a predefined correspondence to the particular data, and control a power mode of the processor based on the existing power information.
    Type: Grant
    Filed: May 12, 2014
    Date of Patent: January 16, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min Young Son, Seung Won Lee, Shi Hwa Lee, Jae Don Lee, Chae Seok Im, Min Kyu Jeong
  • Patent number: 9766677
    Abstract: Some embodiments involve a method of managing power for a first multiple-data-storage-devices enclosure. The method can include: checking out a first token over a network connection from a token pool shared by multiple-data-storage-devices enclosures including the first enclosure, wherein each token of the token pool is available to be checked out by a single device and wherein the enclosures share power drawn from a power supply; after checking out the first token, initiating activation of a data storage device within the first enclosure; monitoring power consumption within the first enclosure; and releasing the first token back to the token pool when the power consumption in the first enclosure substantially reaches a steady-state after the activation of the data storage device is initiated.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: September 19, 2017
    Assignee: NetApp, Inc.
    Inventor: David Slik
  • Patent number: 9653925
    Abstract: A power transmission device includes a reception unit configured to receive, from each of a plurality of power reception devices as power transmission objects, identification information for identification of the power reception device, a device determination unit configured to determine, based on the identification information, whether each of the power reception devices is a registered device that has been registered beforehand, and a power transmission unit configured to transmit power to the registered device.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: May 16, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takehiro Ito
  • Patent number: 9575472
    Abstract: An automation system including a plurality of peripheral devices, each configured to perform at least one function relating to energy consumption in a facility and an automation controller in communication with the plurality of peripheral devices and providing for the control of the performance of the function by each device, wherein the automation controller includes a compiler configured to take high level rules and information about the peripheral devices and produce at least one program that will respond to data from the peripheral devices and to timer, calendar, clock, and preprogrammed events and a server component that provides the data as input to the at least one program and takes actions based on the output of the program.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: February 21, 2017
    Assignee: Autani, LLC
    Inventors: Randy Clayton, Kenneth Noppinger
  • Patent number: 9570919
    Abstract: A power transmission device includes a reception unit configured to receive, from each of a plurality of power reception devices as power transmission objects, identification information for identification of the power reception device, a device determination unit configured to determine, based on the identification information, whether each of the power reception devices is a registered device that has been registered beforehand, and a power transmission unit configured to transmit power to the registered device.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: February 14, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takehiro Ito
  • Patent number: 9569195
    Abstract: An upgrade method for a Unix or Unix-like operating system, a server, and a cloud-based system include operating a server with an old operating system with a partition structure for media, wherein the partition structure includes a root partition and a usr partition; copying media to the root partition and the usr partition associated with a new operating system while the old operating system is operating; rebooting the server with the new operating system set to load; and subsequent to the rebooting, making the root partition persistent using memory and the usr partition persistent using a NULL file system.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: February 14, 2017
    Assignee: Zscaler, Inc.
    Inventors: Arcady Schekochikhin, Srikanth Devarajan
  • Patent number: 9529419
    Abstract: The discussion makes reference to methods and apparatuses for message-driven switch power, power control, and central processing unit (CPU)-assisted full switch power-down. The link layer in computer networking can be used to save power in switching elements.
    Type: Grant
    Filed: May 14, 2013
    Date of Patent: December 27, 2016
    Assignee: Broadcom Corporation
    Inventor: Stephen Wilson Bailey
  • Patent number: 9478195
    Abstract: Some embodiments enable a first electronic device (e.g., a notebook computer) to obtain state information directly from another electronic device (e.g., a smartphone) so that the first electronic device may replicate a state of content of the other computing device. This is useful when a user of an electronic device desires to switch between one device and another device such that the user may continue an activity (e.g., playing a video game) on another device without having to restart the activity. This is also useful when a user of a first electronic device attempts to replicate the state of the activity on a second device from another user such that both users may participate in the same activity. In some embodiments, a user of a device may obtain content from a server and state information from another device to replicate the state of content on the other device.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: October 25, 2016
    Assignee: Amazon Technologies, Inc.
    Inventor: Steven Ka Cheung Moy
  • Patent number: 9471094
    Abstract: A chip select signal is trained where the chip select signal is delayed to centrally align its pulses with a positive edge of a memory device's clock cycle. Over repeated iterations, the memory device stops its clock for an interval and a delayed pulse of the chip select signal is generated. The pulse delay is incrementally changed with each iteration. When the delay results in the trailing edge of the delayed pulse aligning with the positive edge of the last cycle before the stoppage interval, the memory device captures the contents of a computer bus, thus detecting a trailing edge delay value. When the delay results in the leading edge of the delayed pulse aligning with the positive edge of the last cycle, the device no longer captures the contents, thus detecting a leading edge delay value. A value between these values is then set as the optimal delay.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: October 18, 2016
    Assignee: Cadence Design Systems, Inc.
    Inventors: Sandeep Brahmadathan, Jeffrey Scott Earl, Todd Barth
  • Patent number: 9462556
    Abstract: An integrated circuit device comprises a signal processing system having at least one first signal processing module fabricated by way of a first production process; and at least one second signal processing module fabricated by way of a second production process, wherein the second production process is different to the first production process. The signal processing system further comprises a signal processing management module arranged to: determine a desired system performance of the integrated circuit device; determine at least one operating condition of the signal processing system; and configure a signal processing operating mode of the signal processing system based at least partly on: the determined desired system performance; the at least one determined operating condition; and at least one of the first production process and the second production process.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: October 4, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Michael Priel, Dan Kuzmin, Anton Rozen
  • Patent number: 9454204
    Abstract: Includes receiving, from a link partner, a message specifying a link partner receive wake time and resolving to the lesser of the received link partner receive wake time and a local transmit wake time.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: September 27, 2016
    Assignee: Intel Corporation
    Inventors: Aviad Wertheimer, Robert Hays
  • Patent number: 9448614
    Abstract: A method of controlling power within a multiple-data-storage-devices enclosure is disclosed. In at least one embodiment, the method comprises receiving a network connection and power from a data connection port to which a network cable is removably coupled; identifying one or more target data storage devices within the multiple-data-storage-devices enclosure to activate, wherein the one or more target data storage devices are a subset of all data storage devices within the multiple-data-storage-devices enclosure; powering off at least one of the data storage devices that draws power from the data connection port to make available additional power to supply from the data connection port; and powering the target data storage devices with the power received through the data connection port to activate the target data storage devices after all other data storage devices are powered off.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: September 20, 2016
    Assignee: NETAPP, INC.
    Inventor: David Slik
  • Patent number: 9430031
    Abstract: The present invention relates to a method and device that conserves power. In some embodiments, the device is a battery powered storage device. The invention employs a large cache and aggressive caching algorithm to serve data from the storage media (hard disk or SSD) or write data to the storage media. The cache provides an efficient location from which to serve data, especially multi-media. In one embodiment, the algorithm determines when to place the drive into a lower power state, such as idle, or standby, based on the amount of anticipated idle time provided by the large cache.
    Type: Grant
    Filed: January 7, 2014
    Date of Patent: August 30, 2016
    Assignee: Western Digital Technologies, Inc.
    Inventors: John E. Maroney, Hai Le
  • Patent number: 9423821
    Abstract: An integrated circuit includes a generator. The generator, based on a summation signal, generates a clock signal having a frequency. Multiple devices generate respective requests. Each of the requests requests transfer of data on a bus. Each of the devices is configured to, based on the frequency of the clock signal, transfer the data for the corresponding request on the bus. A summer receives the requests and based on a number of the requests being in an asserted state during a first period of time, generates the summation signal. A first module, based on the summation signal, increases a second period of time that a first request is in an asserted state. The second period of time is increased to include or overlap the first period of time. The summer, as a result of the increase, generates the summation signal further based on the first request.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: August 23, 2016
    Assignee: Marvell International Ltd.
    Inventor: Timothy J. Donovan
  • Patent number: 9417687
    Abstract: Bandwidth for information transfers between devices is dynamically changed to accommodate transitions between power modes employed in a system. The bandwidth is changed by selectively enabling and disabling individual control links and data links that carry the information. During a highest bandwidth mode for the system, all of the data and control links are enabled to provide maximum information throughout. During one or more lower bandwidth modes for the system, at least one data link and/or at least one control link is disabled to reduce the power consumption of the devices. At least one data link and at least one control link remain enabled during each low bandwidth mode. For these links, the same signaling rate is used for both bandwidth modes to reduce latency that would otherwise be caused by changing signaling rates. Also, calibration information is generated for disabled links so that these links may be quickly brought back into service.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: August 16, 2016
    Assignee: Rambus Inc.
    Inventor: Frederick A. Ware
  • Patent number: 9411390
    Abstract: A programmable SoC (system on a chip) having optimized power domains and power islands. The SoC is an integrated circuit device including a plurality of power domains, each of the power domains having a respective voltage rail to supply power to the power domain. A plurality of power islands are included within the integrated circuit device, wherein each power domain includes at least one power island. A plurality of functional blocks are included within the integrated circuit device, wherein each power island includes at least one functional block. Each functional block is configured to provide a specific device functionality. The integrated circuit device adjusts power consumption in relation to a requested device functionality by individually turning on or turning off power to a selected one or more power domains, and for each turned on power domain, individually power gating one or more power islands.
    Type: Grant
    Filed: February 11, 2008
    Date of Patent: August 9, 2016
    Assignee: NVIDIA CORPORATION
    Inventors: Brian Smith, Parthasarathy Sriram, Stephane Le Provost
  • Patent number: 9411360
    Abstract: A system for managing a change in a frequency of a clock signal, including a clock generator configured to output the clock signal, a clock divider coupled to the output of the clock generator, a processor configured to select the frequency of the clock signal, and a clock management circuit. The clock management circuit may be configured to set the clock generator to adjust the clock signal to the selected frequency. The clock management circuit may be further configured to adjust a divisor value of the clock divider in a plurality of steps in response to a determination the clock signal stabilized at the selected frequency. A new divisor value may be selected during each step in the plurality of steps and each step may occur after a given time period.
    Type: Grant
    Filed: January 13, 2014
    Date of Patent: August 9, 2016
    Assignee: Apple Inc.
    Inventors: Jong-Suk Lee, Wei-Han Lien, Shih-Chieh R. Wen
  • Patent number: 9412340
    Abstract: Some embodiments enable a first electronic device (e.g., a notebook computer) to obtain state information directly from another electronic device (e.g., a smartphone) so that the first electronic device may replicate a state of content of the other computing device. This is useful when a user of an electronic device desires to switch between one device and another device such that the user may continue an activity (e.g., playing a video game) on another device without having to restart the activity. This is also useful when a user of a first electronic device attempts to replicate the state of the activity on a second device from another user such that both users may participate in the same activity. In some embodiments, a user of a device may obtain content from a server and state information from another device to replicate the state of content on the other device.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: August 9, 2016
    Assignee: Amazon Technologies, Inc.
    Inventor: Steven Ka Cheung Moy
  • Patent number: 9405352
    Abstract: A computer system is provided. The computer system includes a device which operates according to a clock frequency, a battery unit, which comprises a plurality of battery cells, for supplying power to the device, a temperature sensor provided at a location outside of the battery unit for detecting a temperature of the battery cells, a current sensor coupled to the battery unit for detecting a value of a current supplied from the battery unit to the device, and a controller, which is coupled to the temperature sensor and the current sensor, configured to control the clock frequency of the device according to the detected temperature and the detected current value, wherein the controller is configured to decrease the clock frequency if the detected temperature is greater than a first reference value or if the detected current value is greater than a second reference value.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: August 2, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-deok Cha, Jong-tae Chun
  • Patent number: 9395795
    Abstract: Embodiments of an apparatus and method are disclosed that may allow for managing power of a computing system. The apparatus may include a clock generation circuit, a bus interface unit, and a control circuit. The clock generation circuit may be configured to generate multiple clock signals. Each clock signal may provide a timing reference to different functional blocks within a device coupled to the communication bus. The bus interface unit may be configured to receive messages from the device via the communication bus. The messages may include a latency value and a request to activate a low power mode. The control circuit may be configured to deactivate one or more of the multiple clock signals dependent upon the latency value and multiple threshold values.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: July 19, 2016
    Assignee: Apple Inc.
    Inventors: David S. Warren, Inna Levit, Timothy R. Paaske